1 /* 2 * Autogenerated file 3 * 4 * SPDX-License-Identifier: Apache 2.0 5 */ 6 7 #include "gd32f999xx-afio.h" 8 9 /* ANALOG */ 10 #define ANALOG_PA0 \ 11 GD32_PINMUX_AFIO('A', 0, ANALOG, NORMP) 12 #define ANALOG_PA1 \ 13 GD32_PINMUX_AFIO('A', 1, ANALOG, NORMP) 14 #define ANALOG_PA2 \ 15 GD32_PINMUX_AFIO('A', 2, ANALOG, NORMP) 16 #define ANALOG_PA3 \ 17 GD32_PINMUX_AFIO('A', 3, ANALOG, NORMP) 18 #define ANALOG_PA4 \ 19 GD32_PINMUX_AFIO('A', 4, ANALOG, NORMP) 20 #define ANALOG_PA5 \ 21 GD32_PINMUX_AFIO('A', 5, ANALOG, NORMP) 22 23 /* PERIPH0_SIGA */ 24 #define PERIPH0_SIGA_PA0 \ 25 GD32_PINMUX_AFIO('A', 0, ANALOG, NORMP) 26 27 /* PERIPH1_SIGA */ 28 #define PERIPH1_SIGA_PA0_NORMP \ 29 GD32_PINMUX_AFIO('A', 0, ALTERNATE, PERIPH1_NORMP) 30 #define PERIPH1_SIGA_PA1_RMP \ 31 GD32_PINMUX_AFIO('A', 1, ALTERNATE, PERIPH1_RMP) 32 33 /* PERIPH1_SIGB */ 34 #define PERIPH1_SIGB_PA1_NORMP \ 35 GD32_PINMUX_AFIO('A', 1, GPIO_IN, PERIPH1_NORMP) 36 #define PERIPH1_SIGB_PA0_RMP \ 37 GD32_PINMUX_AFIO('A', 0, GPIO_IN, PERIPH1_RMP) 38 39 /* PERIPH2_SIGA */ 40 #define PERIPH2_SIGA_PA2_OUT_NORMP \ 41 GD32_PINMUX_AFIO('A', 2, ALTERNATE, PERIPH2_NORMP) 42 #define PERIPH2_SIGA_PA2_INP_NORMP \ 43 GD32_PINMUX_AFIO('A', 2, GPIO_IN, PERIPH2_NORMP) 44 #define PERIPH2_SIGA_PA3_OUT_PRMP \ 45 GD32_PINMUX_AFIO('A', 3, ALTERNATE, PERIPH2_PRMP) 46 #define PERIPH2_SIGA_PA3_INP_PRMP \ 47 GD32_PINMUX_AFIO('A', 3, GPIO_IN, PERIPH2_PRMP) 48 #define PERIPH2_SIGA_PA4_OUT_FRMP \ 49 GD32_PINMUX_AFIO('A', 4, ALTERNATE, PERIPH2_FRMP) 50 #define PERIPH2_SIGA_PA4_INP_FRMP \ 51 GD32_PINMUX_AFIO('A', 4, GPIO_IN, PERIPH2_FRMP) 52 53 /* PERIPH2_SIGB */ 54 #define PERIPH2_SIGB_PA3_OUT_NORMP \ 55 GD32_PINMUX_AFIO('A', 3, ALTERNATE, PERIPH2_NORMP) 56 #define PERIPH2_SIGB_PA3_INP_NORMP \ 57 GD32_PINMUX_AFIO('A', 3, GPIO_IN, PERIPH2_NORMP) 58 #define PERIPH2_SIGB_PA4_OUT_PRMP \ 59 GD32_PINMUX_AFIO('A', 4, ALTERNATE, PERIPH2_PRMP) 60 #define PERIPH2_SIGB_PA4_INP_PRMP \ 61 GD32_PINMUX_AFIO('A', 4, GPIO_IN, PERIPH2_PRMP) 62 #define PERIPH2_SIGB_PA5_OUT_FRMP \ 63 GD32_PINMUX_AFIO('A', 5, ALTERNATE, PERIPH2_FRMP) 64 #define PERIPH2_SIGB_PA5_INP_FRMP \ 65 GD32_PINMUX_AFIO('A', 5, GPIO_IN, PERIPH2_FRMP) 66 67 /* PERIPH2_SIGC */ 68 #define PERIPH2_SIGC_PA4_OUT_NORMP \ 69 GD32_PINMUX_AFIO('A', 4, ALTERNATE, PERIPH2_NORMP) 70 #define PERIPH2_SIGC_PA4_INP_NORMP \ 71 GD32_PINMUX_AFIO('A', 4, GPIO_IN, PERIPH2_NORMP) 72 #define PERIPH2_SIGC_PA5_OUT_PRMP \ 73 GD32_PINMUX_AFIO('A', 5, ALTERNATE, PERIPH2_PRMP) 74 #define PERIPH2_SIGC_PA5_INP_PRMP \ 75 GD32_PINMUX_AFIO('A', 5, GPIO_IN, PERIPH2_PRMP) 76 #define PERIPH2_SIGC_PA2_OUT_FRMP \ 77 GD32_PINMUX_AFIO('A', 2, ALTERNATE, PERIPH2_FRMP) 78 #define PERIPH2_SIGC_PA2_INP_FRMP \ 79 GD32_PINMUX_AFIO('A', 2, GPIO_IN, PERIPH2_FRMP) 80 81 /* PERIPH2_SIGD */ 82 #define PERIPH2_SIGD_PA5_OUT_NORMP \ 83 GD32_PINMUX_AFIO('A', 5, ALTERNATE, PERIPH2_NORMP) 84 #define PERIPH2_SIGD_PA5_INP_NORMP \ 85 GD32_PINMUX_AFIO('A', 5, GPIO_IN, PERIPH2_NORMP) 86 #define PERIPH2_SIGD_PA2_OUT_PRMP \ 87 GD32_PINMUX_AFIO('A', 2, ALTERNATE, PERIPH2_PRMP) 88 #define PERIPH2_SIGD_PA2_INP_PRMP \ 89 GD32_PINMUX_AFIO('A', 2, GPIO_IN, PERIPH2_PRMP) 90 #define PERIPH2_SIGD_PA3_OUT_FRMP \ 91 GD32_PINMUX_AFIO('A', 3, ALTERNATE, PERIPH2_FRMP) 92 #define PERIPH2_SIGD_PA3_INP_FRMP \ 93 GD32_PINMUX_AFIO('A', 3, GPIO_IN, PERIPH2_FRMP) 94
