1 /*!
2 \file gd32vf103_pmu.c
3 \brief PMU driver
4
5 \version 2019-06-05, V1.0.0, firmware for GD32VF103
6 \version 2020-08-04, V1.1.0, firmware for GD32VF103
7 */
8
9 /*
10 Copyright (c) 2020, GigaDevice Semiconductor Inc.
11
12 Redistribution and use in source and binary forms, with or without modification,
13 are permitted provided that the following conditions are met:
14
15 1. Redistributions of source code must retain the above copyright notice, this
16 list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright notice,
18 this list of conditions and the following disclaimer in the documentation
19 and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holder nor the names of its contributors
21 may be used to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
30 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
33 OF SUCH DAMAGE.
34 */
35
36 #include "gd32vf103_pmu.h"
37 #include "riscv_encoding.h"
38
39 /*!
40 \brief reset PMU register
41 \param[in] none
42 \param[out] none
43 \retval none
44 */
pmu_deinit(void)45 void pmu_deinit(void)
46 {
47 /* reset PMU */
48 rcu_periph_reset_enable(RCU_PMURST);
49 rcu_periph_reset_disable(RCU_PMURST);
50 }
51
52 /*!
53 \brief select low voltage detector threshold
54 \param[in] lvdt_n:
55 only one parameter can be selected which is shown as below:
56 \arg PMU_LVDT_0: voltage threshold is 2.2V
57 \arg PMU_LVDT_1: voltage threshold is 2.3V
58 \arg PMU_LVDT_2: voltage threshold is 2.4V
59 \arg PMU_LVDT_3: voltage threshold is 2.5V
60 \arg PMU_LVDT_4: voltage threshold is 2.6V
61 \arg PMU_LVDT_5: voltage threshold is 2.7V
62 \arg PMU_LVDT_6: voltage threshold is 2.8V
63 \arg PMU_LVDT_7: voltage threshold is 2.9V
64 \param[out] none
65 \retval none
66 */
pmu_lvd_select(uint32_t lvdt_n)67 void pmu_lvd_select(uint32_t lvdt_n)
68 {
69 /* disable LVD */
70 PMU_CTL &= ~PMU_CTL_LVDEN;
71 /* clear LVDT bits */
72 PMU_CTL &= ~PMU_CTL_LVDT;
73 /* set LVDT bits according to lvdt_n */
74 PMU_CTL |= lvdt_n;
75 /* enable LVD */
76 PMU_CTL |= PMU_CTL_LVDEN;
77 }
78
79 /*!
80 \brief disable PMU lvd
81 \param[in] none
82 \param[out] none
83 \retval none
84 */
pmu_lvd_disable(void)85 void pmu_lvd_disable(void)
86 {
87 /* disable LVD */
88 PMU_CTL &= ~PMU_CTL_LVDEN;
89 }
90
91 /*!
92 \brief PMU work at sleep mode
93 \param[in] sleepmodecmd:
94 only one parameter can be selected which is shown as below:
95 \arg WFI_CMD: use WFI command
96 \arg WFE_CMD: use WFE command
97 \param[out] none
98 \retval none
99 */
pmu_to_sleepmode(uint8_t sleepmodecmd)100 void pmu_to_sleepmode(uint8_t sleepmodecmd)
101 {
102 /* clear sleepdeep bit of RISC-V system control register */
103 clear_csr(0x811U, 0x1U);
104
105 /* select WFI or WFE command to enter sleep mode */
106 if(WFI_CMD == sleepmodecmd){
107 __WFI();
108 }else{
109 clear_csr(mstatus, MSTATUS_MIE);
110 set_csr(0x810U, 0x1U);
111 __WFI();
112 clear_csr(0x810U, 0x1U);
113 set_csr(mstatus, MSTATUS_MIE);
114 }
115 }
116
117 /*!
118 \brief PMU work at deepsleep mode
119 \param[in] ldo:
120 only one parameter can be selected which is shown as below:
121 \arg PMU_LDO_NORMAL: LDO work at normal power mode when pmu enter deepsleep mode
122 \arg PMU_LDO_LOWPOWER: LDO work at low power mode when pmu enter deepsleep mode
123 \param[in] deepsleepmodecmd:
124 only one parameter can be selected which is shown as below:
125 \arg WFI_CMD: use WFI command
126 \arg WFE_CMD: use WFE command
127 \param[out] none
128 \retval none
129 */
pmu_to_deepsleepmode(uint32_t ldo,uint8_t deepsleepmodecmd)130 void pmu_to_deepsleepmode(uint32_t ldo,uint8_t deepsleepmodecmd)
131 {
132 /* clear stbmod and ldolp bits */
133 PMU_CTL &= ~((uint32_t)(PMU_CTL_STBMOD | PMU_CTL_LDOLP));
134 /* set ldolp bit according to pmu_ldo */
135 PMU_CTL |= ldo;
136 /* set CSR_SLEEPVALUE bit of RISC-V system control register */
137 set_csr(0x811U, 0x1U);
138 /* select WFI or WFE command to enter deepsleep mode */
139 if(WFI_CMD == deepsleepmodecmd){
140 __WFI();
141 }else{
142 clear_csr(mstatus, MSTATUS_MIE);
143 set_csr(0x810U, 0x1U);
144 __WFI();
145 clear_csr(0x810U, 0x1U);
146 set_csr(mstatus, MSTATUS_MIE);
147 }
148 /* reset sleepdeep bit of RISC-V system control register */
149 clear_csr(0x811U, 0x1U);
150 }
151
152 /*!
153 \brief pmu work at standby mode
154 \param[in] standbymodecmd:
155 only one parameter can be selected which is shown as below:
156 \arg WFI_CMD: use WFI command
157 \arg WFE_CMD: use WFE command
158 \param[out] none
159 \retval none
160 */
pmu_to_standbymode(uint8_t standbymodecmd)161 void pmu_to_standbymode(uint8_t standbymodecmd)
162 {
163 /* set CSR_SLEEPVALUE bit of RISC-V system control register */
164 set_csr(0x811U, 0x1U);
165
166 /* set stbmod bit */
167 PMU_CTL |= PMU_CTL_STBMOD;
168
169 /* reset wakeup flag */
170 PMU_CTL |= PMU_CTL_WURST;
171
172 /* select WFI or WFE command to enter standby mode */
173 if(WFI_CMD == standbymodecmd){
174 __WFI();
175 }else{
176 clear_csr(mstatus, MSTATUS_MIE);
177 set_csr(0x810U, 0x1U);
178 __WFI();
179 clear_csr(0x810U, 0x1U);
180 set_csr(mstatus, MSTATUS_MIE);
181 }
182 clear_csr(0x811U, 0x1U);
183 }
184
185 /*!
186 \brief enable wakeup pin
187 \param[in] none
188 \param[out] none
189 \retval none
190 */
pmu_wakeup_pin_enable(void)191 void pmu_wakeup_pin_enable(void)
192 {
193 PMU_CS |= PMU_CS_WUPEN;
194 }
195
196 /*!
197 \brief disable wakeup pin
198 \param[in] none
199 \param[out] none
200 \retval none
201 */
pmu_wakeup_pin_disable(void)202 void pmu_wakeup_pin_disable(void)
203 {
204 PMU_CS &= ~PMU_CS_WUPEN;
205 }
206
207 /*!
208 \brief enable write access to the registers in backup domain
209 \param[in] none
210 \param[out] none
211 \retval none
212 */
pmu_backup_write_enable(void)213 void pmu_backup_write_enable(void)
214 {
215 PMU_CTL |= PMU_CTL_BKPWEN;
216 }
217
218 /*!
219 \brief disable write access to the registers in backup domain
220 \param[in] none
221 \param[out] none
222 \retval none
223 */
pmu_backup_write_disable(void)224 void pmu_backup_write_disable(void)
225 {
226 PMU_CTL &= ~PMU_CTL_BKPWEN;
227 }
228
229 /*!
230 \brief get flag state
231 \param[in] flag:
232 only one parameter can be selected which is shown as below:
233 \arg PMU_FLAG_WAKEUP: wakeup flag
234 \arg PMU_FLAG_STANDBY: standby flag
235 \arg PMU_FLAG_LVD: lvd flag
236 \param[out] none
237 \retval FlagStatus SET or RESET
238 */
pmu_flag_get(uint32_t flag)239 FlagStatus pmu_flag_get(uint32_t flag)
240 {
241 if(PMU_CS & flag){
242 return SET;
243 }else{
244 return RESET;
245 }
246 }
247
248 /*!
249 \brief clear flag bit
250 \param[in] flag_reset:
251 only one parameter can be selected which is shown as below:
252 \arg PMU_FLAG_RESET_WAKEUP: reset wakeup flag
253 \arg PMU_FLAG_RESET_STANDBY: reset standby flag
254 \param[out] none
255 \retval none
256 */
pmu_flag_clear(uint32_t flag_reset)257 void pmu_flag_clear(uint32_t flag_reset)
258 {
259 switch(flag_reset){
260 case PMU_FLAG_RESET_WAKEUP:
261 /* reset wakeup flag */
262 PMU_CTL |= PMU_CTL_WURST;
263 break;
264 case PMU_FLAG_RESET_STANDBY:
265 /* reset standby flag */
266 PMU_CTL |= PMU_CTL_STBRST;
267 break;
268 default :
269 break;
270 }
271 }
272
