1 /*!
2 \file gd32l23x_usart.c
3 \brief USART driver
4
5 \version 2021-08-04, V1.0.0, firmware for GD32L23x
6 */
7
8 /*
9 Copyright (c) 2021, GigaDevice Semiconductor Inc.
10
11 Redistribution and use in source and binary forms, with or without modification,
12 are permitted provided that the following conditions are met:
13
14 1. Redistributions of source code must retain the above copyright notice, this
15 list of conditions and the following disclaimer.
16 2. Redistributions in binary form must reproduce the above copyright notice,
17 this list of conditions and the following disclaimer in the documentation
18 and/or other materials provided with the distribution.
19 3. Neither the name of the copyright holder nor the names of its contributors
20 may be used to endorse or promote products derived from this software without
21 specific prior written permission.
22
23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 OF SUCH DAMAGE.
33 */
34
35 #include "gd32l23x_usart.h"
36
37 /*!
38 \brief reset USART
39 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
40 \param[out] none
41 \retval none
42 */
usart_deinit(uint32_t usart_periph)43 void usart_deinit(uint32_t usart_periph)
44 {
45 switch(usart_periph) {
46 case USART0:
47 /* reset USART0 */
48 rcu_periph_reset_enable(RCU_USART0RST);
49 rcu_periph_reset_disable(RCU_USART0RST);
50 break;
51 case USART1:
52 /* reset USART1 */
53 rcu_periph_reset_enable(RCU_USART1RST);
54 rcu_periph_reset_disable(RCU_USART1RST);
55 break;
56 case UART3:
57 /* reset UART3 */
58 rcu_periph_reset_enable(RCU_UART3RST);
59 rcu_periph_reset_disable(RCU_UART3RST);
60 break;
61 case UART4:
62 /* reset UART4 */
63 rcu_periph_reset_enable(RCU_UART4RST);
64 rcu_periph_reset_disable(RCU_UART4RST);
65 break;
66 default:
67 break;
68 }
69 }
70
71 /*!
72 \brief configure USART baud rate value
73 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
74 \param[in] baudval: baud rate value
75 \param[out] none
76 \retval none
77 */
usart_baudrate_set(uint32_t usart_periph,uint32_t baudval)78 void usart_baudrate_set(uint32_t usart_periph, uint32_t baudval)
79 {
80 uint32_t uclk = 0U, intdiv = 0U, fradiv = 0U, udiv = 0U;
81 switch(usart_periph) {
82 /* get clock frequency */
83 case USART0:
84 /* get USART0 clock */
85 uclk = rcu_clock_freq_get(CK_USART0);
86 break;
87 case USART1:
88 /* get USART1 clock */
89 uclk = rcu_clock_freq_get(CK_USART1);
90 break;
91 case UART3:
92 /* get UART3 clock */
93 uclk = rcu_clock_freq_get(CK_APB1);
94 break;
95 case UART4:
96 /* get UART4 clock */
97 uclk = rcu_clock_freq_get(CK_APB1);
98 break;
99 default:
100 break;
101 }
102 if(USART_CTL0(usart_periph) & USART_CTL0_OVSMOD) {
103 /* oversampling by 8, configure the value of USART_BAUD */
104 udiv = ((2U * uclk) + baudval / 2U) / baudval;
105 intdiv = udiv & 0x0000fff0U;
106 fradiv = (udiv >> 1U) & 0x00000007U;
107 USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv));
108 } else {
109 /* oversampling by 16, configure the value of USART_BAUD */
110 udiv = (uclk + baudval / 2U) / baudval;
111 intdiv = udiv & 0x0000fff0U;
112 fradiv = udiv & 0x0000000fU;
113 USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv));
114 }
115 }
116
117 /*!
118 \brief configure USART parity
119 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
120 \param[in] paritycfg: USART parity configure
121 only one parameter can be selected which is shown as below:
122 \arg USART_PM_NONE: no parity
123 \arg USART_PM_ODD: odd parity
124 \arg USART_PM_EVEN: even parity
125 \param[out] none
126 \retval none
127 */
usart_parity_config(uint32_t usart_periph,uint32_t paritycfg)128 void usart_parity_config(uint32_t usart_periph, uint32_t paritycfg)
129 {
130 /* disable USART */
131 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
132 /* clear USART_CTL0 PM,PCEN bits */
133 USART_CTL0(usart_periph) &= ~(USART_CTL0_PM | USART_CTL0_PCEN);
134 /* configure USART parity mode */
135 USART_CTL0(usart_periph) |= paritycfg;
136 }
137
138 /*!
139 \brief configure USART word length
140 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
141 \param[in] wlen: USART word length configure
142 only one parameter can be selected which is shown as below:
143 \arg USART_WL_8BIT: 8 bits
144 \arg USART_WL_9BIT: 9 bits
145 \param[out] none
146 \retval none
147 */
usart_word_length_set(uint32_t usart_periph,uint32_t wlen)148 void usart_word_length_set(uint32_t usart_periph, uint32_t wlen)
149 {
150 /* disable USART */
151 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
152 /* clear USART_CTL0 WL bit */
153 USART_CTL0(usart_periph) &= ~USART_CTL0_WL;
154 /* configure USART word length */
155 USART_CTL0(usart_periph) |= wlen;
156 }
157
158 /*!
159 \brief configure USART stop bit length
160 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
161 \param[in] stblen: USART stop bit configure
162 only one parameter can be selected which is shown as below:
163 \arg USART_STB_1BIT: 1 bit
164 \arg USART_STB_0_5BIT: 0.5bit
165 \arg USART_STB_2BIT: 2 bits
166 \arg USART_STB_1_5BIT: 1.5bit
167 \param[out] none
168 \retval none
169 */
usart_stop_bit_set(uint32_t usart_periph,uint32_t stblen)170 void usart_stop_bit_set(uint32_t usart_periph, uint32_t stblen)
171 {
172 /* disable USART */
173 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
174 /* clear USART_CTL1 STB bits */
175 USART_CTL1(usart_periph) &= ~USART_CTL1_STB;
176 USART_CTL1(usart_periph) |= stblen;
177 }
178
179 /*!
180 \brief enable USART
181 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
182 \param[out] none
183 \retval none
184 */
usart_enable(uint32_t usart_periph)185 void usart_enable(uint32_t usart_periph)
186 {
187 USART_CTL0(usart_periph) |= USART_CTL0_UEN;
188 }
189
190 /*!
191 \brief disable USART
192 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
193 \param[out] none
194 \retval none
195 */
usart_disable(uint32_t usart_periph)196 void usart_disable(uint32_t usart_periph)
197 {
198 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
199 }
200
201 /*!
202 \brief configure USART transmitter
203 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
204 \param[in] txconfig: enable or disable USART transmitter
205 only one parameter can be selected which is shown as below:
206 \arg USART_TRANSMIT_ENABLE: enable USART transmission
207 \arg USART_TRANSMIT_DISABLE: enable USART transmission
208 \param[out] none
209 \retval none
210 */
usart_transmit_config(uint32_t usart_periph,uint32_t txconfig)211 void usart_transmit_config(uint32_t usart_periph, uint32_t txconfig)
212 {
213 USART_CTL0(usart_periph) &= ~USART_CTL0_TEN;
214 /* configure transfer mode */
215 USART_CTL0(usart_periph) |= txconfig;
216 }
217
218 /*!
219 \brief configure USART receiver
220 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
221 \param[in] rxconfig: enable or disable USART receiver
222 only one parameter can be selected which is shown as below:
223 \arg USART_RECEIVE_ENABLE: enable USART reception
224 \arg USART_RECEIVE_DISABLE: disable USART reception
225 \param[out] none
226 \retval none
227 */
usart_receive_config(uint32_t usart_periph,uint32_t rxconfig)228 void usart_receive_config(uint32_t usart_periph, uint32_t rxconfig)
229 {
230 USART_CTL0(usart_periph) &= ~USART_CTL0_REN;
231 /* configure receiver mode */
232 USART_CTL0(usart_periph) |= rxconfig;
233 }
234
235 /*!
236 \brief data is transmitted/received with the LSB/MSB first
237 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
238 \param[in] msbf: LSB/MSB
239 only one parameter can be selected which is shown as below:
240 \arg USART_MSBF_LSB: LSB first
241 \arg USART_MSBF_MSB: MSB first
242 \param[out] none
243 \retval none
244 */
usart_data_first_config(uint32_t usart_periph,uint32_t msbf)245 void usart_data_first_config(uint32_t usart_periph, uint32_t msbf)
246 {
247 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
248 /* configure LSB or MSB first */
249 USART_CTL1(usart_periph) &= ~(USART_CTL1_MSBF);
250 USART_CTL1(usart_periph) |= (USART_CTL1_MSBF & msbf);
251 }
252
253 /*!
254 \brief configure USART inverted
255 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
256 \param[in] invertpara: refer to usart_invert_enum
257 only one parameter can be selected which is shown as below:
258 \arg USART_DINV_ENABLE: data bit level inversion
259 \arg USART_DINV_DISABLE: data bit level not inversion
260 \arg USART_TXPIN_ENABLE: TX pin level inversion
261 \arg USART_TXPIN_DISABLE: TX pin level not inversion
262 \arg USART_RXPIN_ENABLE: RX pin level inversion
263 \arg USART_RXPIN_DISABLE: RX pin level not inversion
264 \arg USART_SWAP_ENABLE: swap TX/RX pins
265 \arg USART_SWAP_DISABLE: not swap TX/RX pins
266 \param[out] none
267 \retval none
268 */
usart_invert_config(uint32_t usart_periph,usart_invert_enum invertpara)269 void usart_invert_config(uint32_t usart_periph, usart_invert_enum invertpara)
270 {
271 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
272 /* inverted or not the specified signal */
273 switch(invertpara) {
274 case USART_DINV_ENABLE:
275 USART_CTL1(usart_periph) |= USART_CTL1_DINV;
276 break;
277 case USART_DINV_DISABLE:
278 USART_CTL1(usart_periph) &= ~(USART_CTL1_DINV);
279 break;
280 case USART_TXPIN_ENABLE:
281 USART_CTL1(usart_periph) |= USART_CTL1_TINV;
282 break;
283 case USART_TXPIN_DISABLE:
284 USART_CTL1(usart_periph) &= ~(USART_CTL1_TINV);
285 break;
286 case USART_RXPIN_ENABLE:
287 USART_CTL1(usart_periph) |= USART_CTL1_RINV;
288 break;
289 case USART_RXPIN_DISABLE:
290 USART_CTL1(usart_periph) &= ~(USART_CTL1_RINV);
291 break;
292 case USART_SWAP_ENABLE:
293 USART_CTL1(usart_periph) |= USART_CTL1_STRP;
294 break;
295 case USART_SWAP_DISABLE:
296 USART_CTL1(usart_periph) &= ~(USART_CTL1_STRP);
297 break;
298 default:
299 break;
300 }
301 }
302
303 /*!
304 \brief enable the USART overrun function
305 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
306 \param[out] none
307 \retval none
308 */
usart_overrun_enable(uint32_t usart_periph)309 void usart_overrun_enable(uint32_t usart_periph)
310 {
311 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
312 /* enable overrun function */
313 USART_CTL2(usart_periph) &= ~(USART_CTL2_OVRD);
314 }
315
316 /*!
317 \brief disable the USART overrun function
318 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
319 \param[out] none
320 \retval none
321 */
usart_overrun_disable(uint32_t usart_periph)322 void usart_overrun_disable(uint32_t usart_periph)
323 {
324 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
325 /* disable overrun function */
326 USART_CTL2(usart_periph) |= USART_CTL2_OVRD;
327 }
328
329 /*!
330 \brief configure the USART oversample mode
331 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
332 \param[in] oversamp: oversample value
333 only one parameter can be selected which is shown as below:
334 \arg USART_OVSMOD_8: oversampling by 8
335 \arg USART_OVSMOD_16: oversampling by 16
336 \param[out] none
337 \retval none
338 */
usart_oversample_config(uint32_t usart_periph,uint32_t oversamp)339 void usart_oversample_config(uint32_t usart_periph, uint32_t oversamp)
340 {
341 /* disable USART */
342 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
343 /* clear OVSMOD bit */
344 USART_CTL0(usart_periph) &= ~(USART_CTL0_OVSMOD);
345 USART_CTL0(usart_periph) |= oversamp;
346 }
347
348 /*!
349 \brief configure the sample bit method
350 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
351 \param[in] osb: sample bit
352 only one parameter can be selected which is shown as below:
353 \arg USART_OSB_1BIT: 1 bit
354 \arg USART_OSB_3BIT: 3 bits
355 \param[out] none
356 \retval none
357 */
usart_sample_bit_config(uint32_t usart_periph,uint32_t osb)358 void usart_sample_bit_config(uint32_t usart_periph, uint32_t osb)
359 {
360 /* disable USART */
361 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
362
363 USART_CTL2(usart_periph) &= ~(USART_CTL2_OSB);
364 USART_CTL2(usart_periph) |= osb;
365 }
366
367 /*!
368 \brief enable receiver timeout
369 \param[in] usart_periph: USARTx(x=0, 1)
370 \param[out] none
371 \retval none
372 */
usart_receiver_timeout_enable(uint32_t usart_periph)373 void usart_receiver_timeout_enable(uint32_t usart_periph)
374 {
375 USART_CTL1(usart_periph) |= USART_CTL1_RTEN;
376 }
377
378 /*!
379 \brief disable receiver timeout
380 \param[in] usart_periph: USARTx(x=0, 1)
381 \param[out] none
382 \retval none
383 */
usart_receiver_timeout_disable(uint32_t usart_periph)384 void usart_receiver_timeout_disable(uint32_t usart_periph)
385 {
386 USART_CTL1(usart_periph) &= ~(USART_CTL1_RTEN);
387 }
388
389 /*!
390 \brief configure receiver timeout threshold
391 \param[in] usart_periph: USARTx(x=0, 1)
392 \param[in] rtimeout: 0x00000000-0x00FFFFFF, receiver timeout value in terms of number of baud clocks
393 \param[out] none
394 \retval none
395 */
usart_receiver_timeout_threshold_config(uint32_t usart_periph,uint32_t rtimeout)396 void usart_receiver_timeout_threshold_config(uint32_t usart_periph, uint32_t rtimeout)
397 {
398 USART_RT(usart_periph) &= ~(USART_RT_RT);
399 USART_RT(usart_periph) |= rtimeout;
400 }
401
402 /*!
403 \brief USART transmit data function
404 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
405 \param[in] data: data of transmission
406 \param[out] none
407 \retval none
408 */
usart_data_transmit(uint32_t usart_periph,uint32_t data)409 void usart_data_transmit(uint32_t usart_periph, uint32_t data)
410 {
411 USART_TDATA(usart_periph) = (USART_TDATA_TDATA & data);
412 }
413
414 /*!
415 \brief USART receive data function
416 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
417 \param[out] none
418 \retval data of received
419 */
usart_data_receive(uint32_t usart_periph)420 uint16_t usart_data_receive(uint32_t usart_periph)
421 {
422 return (uint16_t)(GET_BITS(USART_RDATA(usart_periph), 0U, 8U));
423 }
424
425 /*!
426 \brief enable USART command
427 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
428 \param[in] cmdtype: command type
429 only one parameter can be selected which is shown as below:
430 \arg USART_CMD_ABDCMD: auto baudrate detection command
431 \arg USART_CMD_SBKCMD: send break command
432 \arg USART_CMD_MMCMD: mute mode command
433 \arg USART_CMD_RXFCMD: receive data flush command
434 \arg USART_CMD_TXFCMD: transmit data flush request
435 \param[out] none
436 \retval none
437 */
usart_command_enable(uint32_t usart_periph,uint32_t cmdtype)438 void usart_command_enable(uint32_t usart_periph, uint32_t cmdtype)
439 {
440 USART_CMD(usart_periph) |= (cmdtype);
441 }
442
443 /*!
444 \brief enable auto baud rate detection
445 \param[in] usart_periph: USARTx(x=0,1)
446 \param[out] none
447 \retval none
448 */
usart_autobaud_detection_enable(uint32_t usart_periph)449 void usart_autobaud_detection_enable(uint32_t usart_periph)
450 {
451 USART_CTL1(usart_periph) |= USART_CTL1_ABDEN;
452 }
453
454 /*!
455 \brief disable auto baud rate detection
456 \param[in] usart_periph: USARTx(x=0,1)
457 \param[out] none
458 \retval none
459 */
usart_autobaud_detection_disable(uint32_t usart_periph)460 void usart_autobaud_detection_disable(uint32_t usart_periph)
461 {
462 USART_CTL1(usart_periph) &= ~(USART_CTL1_ABDEN);
463 }
464
465 /*!
466 \brief configure auto baud rate detection mode
467 \param[in] usart_periph: USARTx(x=0,1)
468 \param[in] abdmod: auto baud rate detection mode
469 only one parameter can be selected which is shown as below:
470 \arg USART_ABDM_FTOR: falling edge to rising edge measurement
471 \arg USART_ABDM_FTOF: falling edge to falling edge measurement
472 \param[out] none
473 \retval none
474 */
usart_autobaud_detection_mode_config(uint32_t usart_periph,uint32_t abdmod)475 void usart_autobaud_detection_mode_config(uint32_t usart_periph, uint32_t abdmod)
476 {
477 /* reset ABDM bits */
478 USART_CTL1(usart_periph) &= ~(USART_CTL1_ABDM);
479 USART_CTL1(usart_periph) |= abdmod;
480 }
481
482 /*!
483 \brief configure address of the USART
484 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
485 \param[in] addr: 0x00-0xFF, address of USART terminal
486 \param[out] none
487 \retval none
488 */
usart_address_config(uint32_t usart_periph,uint8_t addr)489 void usart_address_config(uint32_t usart_periph, uint8_t addr)
490 {
491 /* disable USART */
492 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
493
494 USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDR);
495 USART_CTL1(usart_periph) |= (USART_CTL1_ADDR & (((uint32_t)addr) << 24U));
496 }
497
498 /*!
499 \brief configure address detection mode
500 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
501 \param[in] addmod: address detection mode
502 only one parameter can be selected which is shown as below:
503 \arg USART_ADDM_4BIT: 4 bits
504 \arg USART_ADDM_FULLBIT: full bits
505 \param[out] none
506 \retval none
507 */
usart_address_detection_mode_config(uint32_t usart_periph,uint32_t addmod)508 void usart_address_detection_mode_config(uint32_t usart_periph, uint32_t addmod)
509 {
510 /* disable USART */
511 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
512
513 USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDM);
514 USART_CTL1(usart_periph) |= USART_CTL1_ADDM & (addmod);
515 }
516
517 /*!
518 \brief enable mute mode
519 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
520 \param[out] none
521 \retval none
522 */
usart_mute_mode_enable(uint32_t usart_periph)523 void usart_mute_mode_enable(uint32_t usart_periph)
524 {
525 USART_CTL0(usart_periph) |= USART_CTL0_MEN;
526 }
527
528 /*!
529 \brief disable mute mode
530 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
531 \param[out] none
532 \retval none
533 */
usart_mute_mode_disable(uint32_t usart_periph)534 void usart_mute_mode_disable(uint32_t usart_periph)
535 {
536 USART_CTL0(usart_periph) &= ~(USART_CTL0_MEN);
537 }
538
539 /*!
540 \brief configure wakeup method in mute mode
541 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
542 \param[in] wmethod: two methods be used to enter or exit the mute mode
543 only one parameter can be selected which is shown as below:
544 \arg USART_WM_IDLE: idle line
545 \arg USART_WM_ADDR: address mark
546 \param[out] none
547 \retval none
548 */
usart_mute_mode_wakeup_config(uint32_t usart_periph,uint32_t wmethod)549 void usart_mute_mode_wakeup_config(uint32_t usart_periph, uint32_t wmethod)
550 {
551 /* disable USART */
552 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
553
554 USART_CTL0(usart_periph) &= ~(USART_CTL0_WM);
555 USART_CTL0(usart_periph) |= wmethod;
556 }
557
558 /*!
559 \brief enable LIN mode
560 \param[in] usart_periph: USARTx(x=0,1)
561 \param[out] none
562 \retval none
563 */
usart_lin_mode_enable(uint32_t usart_periph)564 void usart_lin_mode_enable(uint32_t usart_periph)
565 {
566 /* disable USART */
567 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
568
569 USART_CTL1(usart_periph) |= USART_CTL1_LMEN;
570 }
571
572 /*!
573 \brief disable LIN mode
574 \param[in] usart_periph: USARTx(x=0,1)
575 \param[out] none
576 \retval none
577 */
usart_lin_mode_disable(uint32_t usart_periph)578 void usart_lin_mode_disable(uint32_t usart_periph)
579 {
580 /* disable USART */
581 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
582
583 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN);
584 }
585
586 /*!
587 \brief LIN break detection length
588 \param[in] usart_periph: USARTx(x=0,1)
589 \param[in] lblen: LIN break detection length
590 only one parameter can be selected which is shown as below:
591 \arg USART_LBLEN_10B: 10 bits break detection
592 \arg USART_LBLEN_11B: 11 bits break detection
593 \param[out] none
594 \retval none
595 */
usart_lin_break_detection_length_config(uint32_t usart_periph,uint32_t lblen)596 void usart_lin_break_detection_length_config(uint32_t usart_periph, uint32_t lblen)
597 {
598 /* disable USART */
599 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
600 USART_CTL1(usart_periph) &= ~(USART_CTL1_LBLEN);
601 USART_CTL1(usart_periph) |= USART_CTL1_LBLEN & (lblen);
602 }
603
604 /*!
605 \brief enable half-duplex mode
606 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
607 \param[out] none
608 \retval none
609 */
usart_halfduplex_enable(uint32_t usart_periph)610 void usart_halfduplex_enable(uint32_t usart_periph)
611 {
612 /* disable USART */
613 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
614
615 USART_CTL2(usart_periph) |= USART_CTL2_HDEN;
616 }
617
618 /*!
619 \brief disable half-duplex mode
620 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
621 \param[out] none
622 \retval none
623 */
usart_halfduplex_disable(uint32_t usart_periph)624 void usart_halfduplex_disable(uint32_t usart_periph)
625 {
626 /* disable USART */
627 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
628
629 USART_CTL2(usart_periph) &= ~(USART_CTL2_HDEN);
630 }
631
632 /*!
633 \brief enable clock
634 \param[in] usart_periph: USARTx(x=0,1)
635 \param[out] none
636 \retval none
637 */
usart_clock_enable(uint32_t usart_periph)638 void usart_clock_enable(uint32_t usart_periph)
639 {
640 /* disable USART */
641 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
642
643 USART_CTL1(usart_periph) |= USART_CTL1_CKEN;
644 }
645
646 /*!
647 \brief disable clock
648 \param[in] usart_periph: USARTx(x=0,1)
649 \param[out] none
650 \retval none
651 */
usart_clock_disable(uint32_t usart_periph)652 void usart_clock_disable(uint32_t usart_periph)
653 {
654 /* disable USART */
655 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
656
657 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN);
658 }
659
660 /*!
661 \brief configure USART synchronous mode parameters
662 \param[in] usart_periph: USARTx(x=0,1)
663 \param[in] clen: last bit clock pulse
664 only one parameter can be selected which is shown as below:
665 \arg USART_CLEN_NONE: clock pulse of the last data bit (MSB) is not output to the CK pin
666 \arg USART_CLEN_EN: clock pulse of the last data bit (MSB) is output to the CK pin
667 \param[in] cph: clock phase
668 only one parameter can be selected which is shown as below:
669 \arg USART_CPH_1CK: first clock transition is the first data capture edge
670 \arg USART_CPH_2CK: second clock transition is the first data capture edge
671 \param[in] cpl: clock polarity
672 only one parameter can be selected which is shown as below:
673 \arg USART_CPL_LOW: steady low value on CK pin
674 \arg USART_CPL_HIGH: steady high value on CK pin
675 \param[out] none
676 \retval none
677 */
usart_synchronous_clock_config(uint32_t usart_periph,uint32_t clen,uint32_t cph,uint32_t cpl)678 void usart_synchronous_clock_config(uint32_t usart_periph, uint32_t clen, uint32_t cph, uint32_t cpl)
679 {
680 /* disable USART */
681 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
682 /* reset USART_CTL1 CLEN,CPH,CPL bits */
683 USART_CTL1(usart_periph) &= ~(USART_CTL1_CLEN | USART_CTL1_CPH | USART_CTL1_CPL);
684
685 USART_CTL1(usart_periph) |= (USART_CTL1_CLEN & clen);
686 USART_CTL1(usart_periph) |= (USART_CTL1_CPH & cph);
687 USART_CTL1(usart_periph) |= (USART_CTL1_CPL & cpl);
688 }
689
690 /*!
691 \brief configure guard time value in smartcard mode
692 \param[in] usart_periph: USARTx(x=0,1)
693 \param[in] guat: 0x00-0xFF
694 \param[out] none
695 \retval none
696 */
usart_guard_time_config(uint32_t usart_periph,uint32_t guat)697 void usart_guard_time_config(uint32_t usart_periph, uint32_t guat)
698 {
699 /* disable USART */
700 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
701
702 USART_GP(usart_periph) &= ~(USART_GP_GUAT);
703 USART_GP(usart_periph) |= (USART_GP_GUAT & ((guat) << 8U));
704 }
705
706 /*!
707 \brief enable smartcard mode
708 \param[in] usart_periph: USARTx(x=0,1)
709 \param[out] none
710 \retval none
711 */
usart_smartcard_mode_enable(uint32_t usart_periph)712 void usart_smartcard_mode_enable(uint32_t usart_periph)
713 {
714 /* disable USART */
715 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
716
717 USART_CTL2(usart_periph) |= USART_CTL2_SCEN;
718 }
719
720 /*!
721 \brief disable smartcard mode
722 \param[in] usart_periph: USARTx(x=0,1)
723 \param[out] none
724 \retval none
725 */
usart_smartcard_mode_disable(uint32_t usart_periph)726 void usart_smartcard_mode_disable(uint32_t usart_periph)
727 {
728 /* disable USART */
729 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
730
731 USART_CTL2(usart_periph) &= ~(USART_CTL2_SCEN);
732 }
733
734 /*!
735 \brief enable NACK in smartcard mode
736 \param[in] usart_periph: USARTx(x=0,1)
737 \param[out] none
738 \retval none
739 */
usart_smartcard_mode_nack_enable(uint32_t usart_periph)740 void usart_smartcard_mode_nack_enable(uint32_t usart_periph)
741 {
742 /* disable USART */
743 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
744
745 USART_CTL2(usart_periph) |= USART_CTL2_NKEN;
746 }
747
748 /*!
749 \brief disable NACK in smartcard mode
750 \param[in] usart_periph: USARTx(x=0,1)
751 \param[out] none
752 \retval none
753 */
usart_smartcard_mode_nack_disable(uint32_t usart_periph)754 void usart_smartcard_mode_nack_disable(uint32_t usart_periph)
755 {
756 /* disable USART */
757 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
758
759 USART_CTL2(usart_periph) &= ~(USART_CTL2_NKEN);
760 }
761
762 /*!
763 \brief enable early NACK in smartcard mode
764 \param[in] usart_periph: USARTx(x=0,1)
765 \param[out] none
766 \retval none
767 */
usart_smartcard_mode_early_nack_enable(uint32_t usart_periph)768 void usart_smartcard_mode_early_nack_enable(uint32_t usart_periph)
769 {
770 USART_RFCS(usart_periph) |= USART_RFCS_ELNACK;
771 }
772
773 /*!
774 \brief disable early NACK in smartcard mode
775 \param[in] usart_periph: USARTx(x=0,1)
776 \param[out] none
777 \retval none
778 */
usart_smartcard_mode_early_nack_disable(uint32_t usart_periph)779 void usart_smartcard_mode_early_nack_disable(uint32_t usart_periph)
780 {
781 USART_RFCS(usart_periph) &= ~USART_RFCS_ELNACK;
782 }
783
784 /*!
785 \brief configure smartcard auto-retry number
786 \param[in] usart_periph: USARTx(x=0,1)
787 \param[in] scrtnum: 0x00000000-0x00000007, smartcard auto-retry number
788 \param[out] none
789 \retval none
790 */
usart_smartcard_autoretry_config(uint32_t usart_periph,uint32_t scrtnum)791 void usart_smartcard_autoretry_config(uint32_t usart_periph, uint32_t scrtnum)
792 {
793 /* disable USART */
794 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
795 USART_CTL2(usart_periph) &= ~(USART_CTL2_SCRTNUM);
796 USART_CTL2(usart_periph) |= (USART_CTL2_SCRTNUM & (scrtnum << 17U));
797 }
798
799 /*!
800 \brief configure block length
801 \param[in] usart_periph: USARTx(x=0,1)
802 \param[in] bl: 0x00000000-0x000000FF
803 \param[out] none
804 \retval none
805 */
usart_block_length_config(uint32_t usart_periph,uint32_t bl)806 void usart_block_length_config(uint32_t usart_periph, uint32_t bl)
807 {
808 USART_RT(usart_periph) &= ~(USART_RT_BL);
809 USART_RT(usart_periph) |= (USART_RT_BL & ((bl) << 24U));
810 }
811
812 /*!
813 \brief enable IrDA mode
814 \param[in] usart_periph: USARTx(x=0,1)
815 \param[out] none
816 \retval none
817 */
usart_irda_mode_enable(uint32_t usart_periph)818 void usart_irda_mode_enable(uint32_t usart_periph)
819 {
820 /* disable USART */
821 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
822
823 USART_CTL2(usart_periph) |= USART_CTL2_IREN;
824 }
825
826 /*!
827 \brief disable IrDA mode
828 \param[in] usart_periph: USARTx(x=0,1)
829 \param[out] none
830 \retval none
831 */
usart_irda_mode_disable(uint32_t usart_periph)832 void usart_irda_mode_disable(uint32_t usart_periph)
833 {
834 /* disable USART */
835 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
836
837 USART_CTL2(usart_periph) &= ~(USART_CTL2_IREN);
838 }
839
840 /*!
841 \brief configure the peripheral clock prescaler in USART IrDA low-power or SmartCard mode
842 \param[in] usart_periph: USARTx(x=0,1)
843 \param[in] psc: 0x00000000-0x000000FF
844 \param[out] none
845 \retval none
846 */
usart_prescaler_config(uint32_t usart_periph,uint32_t psc)847 void usart_prescaler_config(uint32_t usart_periph, uint32_t psc)
848 {
849 /* disable USART */
850 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
851 USART_GP(usart_periph) &= ~(USART_GP_PSC);
852 USART_GP(usart_periph) |= psc;
853 }
854
855 /*!
856 \brief configure IrDA low-power
857 \param[in] usart_periph: USARTx(x=0)
858 \param[in] irlp: IrDA low-power or normal
859 only one parameter can be selected which is shown as below:
860 \arg USART_IRLP_LOW: low-power
861 \arg USART_IRLP_NORMAL: normal
862 \param[out] none
863 \retval none
864 */
usart_irda_lowpower_config(uint32_t usart_periph,uint32_t irlp)865 void usart_irda_lowpower_config(uint32_t usart_periph, uint32_t irlp)
866 {
867 /* disable USART */
868 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
869 USART_CTL2(usart_periph) &= ~(USART_CTL2_IRLP);
870 USART_CTL2(usart_periph) |= (USART_CTL2_IRLP & irlp);
871 }
872
873 /*!
874 \brief configure hardware flow control RTS
875 \param[in] usart_periph: USARTx(x=0,1)
876 \param[in] rtsconfig: enable or disable RTS
877 only one parameter can be selected which is shown as below:
878 \arg USART_RTS_ENABLE: enable RTS
879 \arg USART_RTS_DISABLE: disable RTS
880 \param[out] none
881 \retval none
882 */
usart_hardware_flow_rts_config(uint32_t usart_periph,uint32_t rtsconfig)883 void usart_hardware_flow_rts_config(uint32_t usart_periph, uint32_t rtsconfig)
884 {
885 /* disable USART */
886 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
887
888 USART_CTL2(usart_periph) &= ~(USART_CTL2_RTSEN);
889 USART_CTL2(usart_periph) |= rtsconfig;
890 }
891
892 /*!
893 \brief configure hardware flow control CTS
894 \param[in] usart_periph: USARTx(x=0,1)
895 \param[in] ctsconfig: enable or disable CTS
896 only one parameter can be selected which is shown as below:
897 \arg USART_CTS_ENABLE: enable CTS
898 \arg USART_CTS_DISABLE: disable CTS
899 \param[out] none
900 \retval none
901 */
usart_hardware_flow_cts_config(uint32_t usart_periph,uint32_t ctsconfig)902 void usart_hardware_flow_cts_config(uint32_t usart_periph, uint32_t ctsconfig)
903 {
904 /* disable USART */
905 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
906
907 USART_CTL2(usart_periph) &= ~USART_CTL2_CTSEN;
908 USART_CTL2(usart_periph) |= ctsconfig;
909 }
910
911 /*!
912 \brief configure hardware flow control coherence mode
913 \param[in] usart_periph: USARTx(x=0,1)
914 \param[in] hcm:
915 only one parameter can be selected which is shown as below:
916 \arg USART_HCM_NONE: nRTS signal equals to the rxne status register
917 \arg USART_HCM_EN: nRTS signal is set when the last data bit has been sampled
918 \param[out] none
919 \retval none
920 */
usart_hardware_flow_coherence_config(uint32_t usart_periph,uint32_t hcm)921 void usart_hardware_flow_coherence_config(uint32_t usart_periph, uint32_t hcm)
922 {
923 USART_CHC(usart_periph) &= ~(USART_CHC_HCM);
924 USART_CHC(usart_periph) |= (USART_CHC_HCM & hcm);
925 }
926
927 /*!
928 \brief enable RS485 driver
929 \param[in] usart_periph: USARTx(x=0,1)
930 \param[out] none
931 \retval none
932 */
usart_rs485_driver_enable(uint32_t usart_periph)933 void usart_rs485_driver_enable(uint32_t usart_periph)
934 {
935 /* disable USART */
936 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
937
938 USART_CTL2(usart_periph) |= USART_CTL2_DEM;
939 }
940
941 /*!
942 \brief disable RS485 driver
943 \param[in] usart_periph: USARTx(x=0,1)
944 \param[out] none
945 \retval none
946 */
usart_rs485_driver_disable(uint32_t usart_periph)947 void usart_rs485_driver_disable(uint32_t usart_periph)
948 {
949 /* disable USART */
950 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
951
952 USART_CTL2(usart_periph) &= ~(USART_CTL2_DEM);
953 }
954
955 /*!
956 \brief configure driver enable assertion time
957 \param[in] usart_periph: USARTx(x=0,1)
958 \param[in] deatime: 0x00000000-0x0000001F
959 \param[out] none
960 \retval none
961 */
usart_driver_assertime_config(uint32_t usart_periph,uint32_t deatime)962 void usart_driver_assertime_config(uint32_t usart_periph, uint32_t deatime)
963 {
964 /* disable USART */
965 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
966
967 USART_CTL0(usart_periph) &= ~(USART_CTL0_DEA);
968 USART_CTL0(usart_periph) |= (USART_CTL0_DEA & ((deatime) << 21U));
969 }
970
971 /*!
972 \brief configure driver enable de-assertion time
973 \param[in] usart_periph: USARTx(x=0,1)
974 \param[in] dedtime: 0x00000000-0x0000001F
975 \param[out] none
976 \retval none
977 */
usart_driver_deassertime_config(uint32_t usart_periph,uint32_t dedtime)978 void usart_driver_deassertime_config(uint32_t usart_periph, uint32_t dedtime)
979 {
980 /* disable USART */
981 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
982
983 USART_CTL0(usart_periph) &= ~(USART_CTL0_DED);
984 USART_CTL0(usart_periph) |= (USART_CTL0_DED & ((dedtime) << 16U));
985 }
986
987 /*!
988 \brief configure driver enable polarity mode
989 \param[in] usart_periph: USARTx(x=0,1)
990 \param[in] dep: DE signal
991 only one parameter can be selected which is shown as below:
992 \arg USART_DEP_HIGH: DE signal is active high
993 \arg USART_DEP_LOW: DE signal is active low
994 \param[out] none
995 \retval none
996 */
usart_depolarity_config(uint32_t usart_periph,uint32_t dep)997 void usart_depolarity_config(uint32_t usart_periph, uint32_t dep)
998 {
999 /* disable USART */
1000 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
1001 /* reset DEP bit */
1002 USART_CTL2(usart_periph) &= ~(USART_CTL2_DEP);
1003 USART_CTL2(usart_periph) |= (USART_CTL2_DEP & dep);
1004 }
1005
1006 /*!
1007 \brief configure USART DMA reception
1008 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1009 \param[in] dmacmd: enable or disable DMA for reception
1010 only one parameter can be selected which is shown as below:
1011 \arg USART_DENR_ENABLE: DMA enable for reception
1012 \arg USART_DENR_DISABLE: DMA disable for reception
1013 \param[out] none
1014 \retval none
1015 */
usart_dma_receive_config(uint32_t usart_periph,uint32_t dmacmd)1016 void usart_dma_receive_config(uint32_t usart_periph, uint32_t dmacmd)
1017 {
1018 USART_CTL2(usart_periph) &= ~USART_CTL2_DENR;
1019 /* configure DMA reception */
1020 USART_CTL2(usart_periph) |= dmacmd;
1021 }
1022
1023 /*!
1024 \brief configure USART DMA transmission
1025 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1026 \param[in] dmacmd: enable or disable DMA for transmission
1027 only one parameter can be selected which is shown as below:
1028 \arg USART_DENT_ENABLE: DMA enable for transmission
1029 \arg USART_DENT_DISABLE: DMA disable for transmission
1030 \param[out] none
1031 \retval none
1032 */
usart_dma_transmit_config(uint32_t usart_periph,uint32_t dmacmd)1033 void usart_dma_transmit_config(uint32_t usart_periph, uint32_t dmacmd)
1034 {
1035 USART_CTL2(usart_periph) &= ~USART_CTL2_DENT;
1036 /* configure DMA transmission */
1037 USART_CTL2(usart_periph) |= dmacmd;
1038 }
1039
1040 /*!
1041 \brief disable DMA on reception error
1042 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1043 \param[out] none
1044 \retval none
1045 */
usart_reception_error_dma_disable(uint32_t usart_periph)1046 void usart_reception_error_dma_disable(uint32_t usart_periph)
1047 {
1048 /* disable USART */
1049 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
1050
1051 USART_CTL2(usart_periph) |= USART_CTL2_DDRE;
1052 }
1053
1054 /*!
1055 \brief enable DMA on reception error
1056 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1057 \param[out] none
1058 \retval none
1059 */
usart_reception_error_dma_enable(uint32_t usart_periph)1060 void usart_reception_error_dma_enable(uint32_t usart_periph)
1061 {
1062 /* disable USART */
1063 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
1064
1065 USART_CTL2(usart_periph) &= ~(USART_CTL2_DDRE);
1066 }
1067
1068 /*!
1069 \brief enable USART to wakeup the mcu from deep-sleep mode
1070 \param[in] usart_periph: USARTx(x=0,1)
1071 \param[out] none
1072 \retval none
1073 */
usart_wakeup_enable(uint32_t usart_periph)1074 void usart_wakeup_enable(uint32_t usart_periph)
1075 {
1076 USART_CTL0(usart_periph) |= USART_CTL0_UESM;
1077 }
1078
1079 /*!
1080 \brief disable USART to wakeup the mcu from deep-sleep mode
1081 \param[in] usart_periph: USARTx(x=0,1)
1082 \param[out] none
1083 \retval none
1084 */
usart_wakeup_disable(uint32_t usart_periph)1085 void usart_wakeup_disable(uint32_t usart_periph)
1086 {
1087 USART_CTL0(usart_periph) &= ~(USART_CTL0_UESM);
1088 }
1089
1090 /*!
1091 \brief configure the USART wakeup mode from deep-sleep mode
1092 \param[in] usart_periph: USARTx(x=0,1)
1093 \param[in] wum: wakeup mode
1094 only one parameter can be selected which is shown as below:
1095 \arg USART_WUM_ADDR: WUF active on address match
1096 \arg USART_WUM_STARTB: WUF active on start bit
1097 \arg USART_WUM_RBNE: WUF active on RBNE
1098 \param[out] none
1099 \retval none
1100 */
usart_wakeup_mode_config(uint32_t usart_periph,uint32_t wum)1101 void usart_wakeup_mode_config(uint32_t usart_periph, uint32_t wum)
1102 {
1103 /* disable USART */
1104 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
1105 /* reset WUM bit */
1106 USART_CTL2(usart_periph) &= ~(USART_CTL2_WUM);
1107 USART_CTL2(usart_periph) |= USART_CTL2_WUM & (wum);
1108 }
1109
1110 /*!
1111 \brief enable receive FIFO
1112 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1113 \param[out] none
1114 \retval none
1115 */
usart_receive_fifo_enable(uint32_t usart_periph)1116 void usart_receive_fifo_enable(uint32_t usart_periph)
1117 {
1118 USART_RFCS(usart_periph) |= USART_RFCS_RFEN;
1119 }
1120
1121 /*!
1122 \brief disable receive FIFO
1123 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1124 \param[out] none
1125 \retval none
1126 */
usart_receive_fifo_disable(uint32_t usart_periph)1127 void usart_receive_fifo_disable(uint32_t usart_periph)
1128 {
1129 USART_RFCS(usart_periph) &= ~(USART_RFCS_RFEN);
1130 }
1131
1132 /*!
1133 \brief read receive FIFO counter number
1134 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1135 \param[out] none
1136 \retval receive FIFO counter number
1137 */
usart_receive_fifo_counter_number(uint32_t usart_periph)1138 uint8_t usart_receive_fifo_counter_number(uint32_t usart_periph)
1139 {
1140 return (uint8_t)(GET_BITS(USART_RFCS(usart_periph), 12U, 14U));
1141 }
1142
1143 /*!
1144 \brief get flag in STAT/CHC/RFCS register
1145 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1146 \param[in] flag: flag type
1147 only one parameter can be selected which is shown as below:
1148 \arg USART_FLAG_PERR: parity error flag
1149 \arg USART_FLAG_FERR: frame error flag
1150 \arg USART_FLAG_NERR: noise error flag
1151 \arg USART_FLAG_ORERR: overrun error
1152 \arg USART_FLAG_IDLE: idle line detected flag
1153 \arg USART_FLAG_RBNE: read data buffer not empty
1154 \arg USART_FLAG_TC: transmission completed
1155 \arg USART_FLAG_TBE: transmit data register empty
1156 \arg USART_FLAG_LBD: LIN break detected flag
1157 \arg USART_FLAG_CTSF: CTS change flag
1158 \arg USART_FLAG_CTS: CTS level
1159 \arg USART_FLAG_RT: receiver timeout flag
1160 \arg USART_FLAG_EB: end of block flag
1161 \arg USART_FLAG_ABDE: auto baudrate detection error
1162 \arg USART_FLAG_ABD: auto baudrate detection flag
1163 \arg USART_FLAG_BSY: busy flag
1164 \arg USART_FLAG_AM: address match flag
1165 \arg USART_FLAG_SB: send break flag
1166 \arg USART_FLAG_RWU: receiver wakeup from mute mode.
1167 \arg USART_FLAG_WU: wakeup from deep-sleep mode flag
1168 \arg USART_FLAG_TEA: transmit enable acknowledge flag
1169 \arg USART_FLAG_REA: receive enable acknowledge flag
1170 \arg USART_FLAG_EPERR: early parity error flag
1171 \arg USART_FLAG_RFE: receive FIFO empty flag
1172 \arg USART_FLAG_RFF: receive FIFO full flag
1173 \arg USART_FLAG_RFFINT: receive FIFO full interrupt flag
1174 \param[out] none
1175 \retval FlagStatus: SET or RESET
1176 */
usart_flag_get(uint32_t usart_periph,usart_flag_enum flag)1177 FlagStatus usart_flag_get(uint32_t usart_periph, usart_flag_enum flag)
1178 {
1179 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))) {
1180 return SET;
1181 } else {
1182 return RESET;
1183 }
1184 }
1185
1186 /*!
1187 \brief clear USART status
1188 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1189 \param[in] flag: flag type
1190 only one parameter can be selected which is shown as below:
1191 \arg USART_FLAG_PERR: parity error flag
1192 \arg USART_FLAG_FERR: frame error flag
1193 \arg USART_FLAG_NERR: noise detected flag
1194 \arg USART_FLAG_ORERR: overrun error flag
1195 \arg USART_FLAG_IDLE: idle line detected flag
1196 \arg USART_FLAG_TC: transmission complete flag
1197 \arg USART_FLAG_LBD: LIN break detected flag
1198 \arg USART_FLAG_CTSF: CTS change flag
1199 \arg USART_FLAG_RT: receiver timeout flag
1200 \arg USART_FLAG_EB: end of block flag
1201 \arg USART_FLAG_AM: address match flag
1202 \arg USART_FLAG_WU: wakeup from deep-sleep mode flag
1203 \arg USART_FLAG_EPERR: early parity error flag
1204 \param[out] none
1205 \retval none
1206 */
usart_flag_clear(uint32_t usart_periph,usart_flag_enum flag)1207 void usart_flag_clear(uint32_t usart_periph, usart_flag_enum flag)
1208 {
1209 USART_INTC(usart_periph) |= BIT(USART_BIT_POS(flag));
1210 }
1211
1212 /*!
1213 \brief enable USART interrupt
1214 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1215 \param[in] interrupt: interrupt type
1216 only one parameter can be selected which is shown as below:
1217 \arg USART_INT_IDLE: idle interrupt
1218 \arg USART_INT_RBNE: read data buffer not empty interrupt and
1219 overrun error interrupt enable interrupt
1220 \arg USART_INT_TC: transmission complete interrupt
1221 \arg USART_INT_TBE: transmit data register empty interrupt
1222 \arg USART_INT_PERR: parity error interrupt
1223 \arg USART_INT_AM: address match interrupt
1224 \arg USART_INT_RT: receiver timeout interrupt
1225 \arg USART_INT_EB: end of block interrupt
1226 \arg USART_INT_LBD: LIN break detection interrupt
1227 \arg USART_INT_ERR: error interrupt enable in multibuffer communication
1228 \arg USART_INT_CTS: CTS interrupt
1229 \arg USART_INT_WU: wakeup from deep-sleep mode interrupt
1230 \arg USART_INT_RFF: receive FIFO full interrupt enable
1231 \param[out] none
1232 \retval none
1233 */
usart_interrupt_enable(uint32_t usart_periph,usart_interrupt_enum interrupt)1234 void usart_interrupt_enable(uint32_t usart_periph, usart_interrupt_enum interrupt)
1235 {
1236 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt));
1237 }
1238
1239 /*!
1240 \brief disable USART interrupt
1241 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1242 \param[in] interrupt: interrupt type
1243 only one parameter can be selected which is shown as below:
1244 \arg USART_INT_IDLE: idle interrupt
1245 \arg USART_INT_RBNE: read data buffer not empty interrupt and
1246 overrun error interrupt
1247 \arg USART_INT_TC: transmission complete interrupt
1248 \arg USART_INT_TBE: transmit data register empty interrupt
1249 \arg USART_INT_PERR: parity error interrupt
1250 \arg USART_INT_AM: address match interrupt
1251 \arg USART_INT_RT: receiver timeout interrupt
1252 \arg USART_INT_EB: end of block interrupt
1253 \arg USART_INT_LBD: LIN break detection interrupt
1254 \arg USART_INT_ERR: error interrupt enable in multibuffer communication
1255 \arg USART_INT_CTS: CTS interrupt
1256 \arg USART_INT_WU: wakeup from deep-sleep mode interrupt
1257 \arg USART_INT_RFF: receive FIFO full interrupt enable
1258 \param[out] none
1259 \retval none
1260 */
usart_interrupt_disable(uint32_t usart_periph,usart_interrupt_enum interrupt)1261 void usart_interrupt_disable(uint32_t usart_periph, usart_interrupt_enum interrupt)
1262 {
1263 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt));
1264 }
1265
1266 /*!
1267 \brief get USART interrupt and flag status
1268 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1269 \param[in] int_flag: interrupt and flag type, refer to usart_interrupt_flag_enum
1270 only one parameter can be selected which is shown as below:
1271 \arg USART_INT_FLAG_EB: end of block interrupt and flag
1272 \arg USART_INT_FLAG_RT: receiver timeout interrupt and flag
1273 \arg USART_INT_FLAG_AM: address match interrupt and flag
1274 \arg USART_INT_FLAG_PERR: parity error interrupt and flag
1275 \arg USART_INT_FLAG_TBE: transmitter buffer empty interrupt and flag
1276 \arg USART_INT_FLAG_TC: transmission complete interrupt and flag
1277 \arg USART_INT_FLAG_RBNE: read data buffer not empty interrupt and flag
1278 \arg USART_INT_FLAG_RBNE_ORERR: read data buffer not empty interrupt and overrun error flag
1279 \arg USART_INT_FLAG_IDLE: IDLE line detected interrupt and flag
1280 \arg USART_INT_FLAG_LBD: LIN break detected interrupt and flag
1281 \arg USART_INT_FLAG_WU: wakeup from deep-sleep mode interrupt and flag
1282 \arg USART_INT_FLAG_CTS: CTS interrupt and flag
1283 \arg USART_INT_FLAG_ERR_NERR: error interrupt and noise error flag
1284 \arg USART_INT_FLAG_ERR_ORERR: error interrupt and overrun error
1285 \arg USART_INT_FLAG_ERR_FERR: error interrupt and frame error flag
1286 \arg USART_INT_FLAG_RFF: receive FIFO full interrupt and flag
1287 \param[out] none
1288 \retval FlagStatus: SET or RESET
1289 */
usart_interrupt_flag_get(uint32_t usart_periph,usart_interrupt_flag_enum int_flag)1290 FlagStatus usart_interrupt_flag_get(uint32_t usart_periph, usart_interrupt_flag_enum int_flag)
1291 {
1292 uint32_t intenable = 0U, flagstatus = 0U;
1293 /* get the interrupt enable bit status */
1294 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag)));
1295 /* get the corresponding flag bit status */
1296 flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag)));
1297
1298 if(flagstatus && intenable) {
1299 return SET;
1300 } else {
1301 return RESET;
1302 }
1303 }
1304
1305 /*!
1306 \brief clear USART interrupt flag
1307 \param[in] usart_periph: USARTx(x=0,1), UARTx(x=3,4)
1308 \param[in] int_flag: USART interrupt flag
1309 only one parameter can be selected which is shown as below:
1310 \arg USART_INT_FLAG_PERR: parity error flag
1311 \arg USART_INT_FLAG_ERR_FERR: frame error flag
1312 \arg USART_INT_FLAG_ERR_NERR: noise detected flag
1313 \arg USART_INT_FLAG_RBNE_ORERR: read data buffer not empty interrupt and overrun error flag
1314 \arg USART_INT_FLAG_ERR_ORERR: error interrupt and overrun error
1315 \arg USART_INT_FLAG_IDLE: idle line detected flag
1316 \arg USART_INT_FLAG_TC: transmission complete flag
1317 \arg USART_INT_FLAG_LBD: LIN break detected flag
1318 \arg USART_INT_FLAG_CTS: CTS change flag
1319 \arg USART_INT_FLAG_RT: receiver timeout flag
1320 \arg USART_INT_FLAG_EB: end of block flag
1321 \arg USART_INT_FLAG_AM: address match flag
1322 \arg USART_INT_FLAG_WU: wakeup from deep-sleep mode flag
1323 \arg USART_INT_FLAG_RFF: receive FIFO full interrupt and flag
1324 \param[out] none
1325 \retval none
1326 */
usart_interrupt_flag_clear(uint32_t usart_periph,usart_interrupt_flag_enum int_flag)1327 void usart_interrupt_flag_clear(uint32_t usart_periph, usart_interrupt_flag_enum int_flag)
1328 {
1329 if(USART_INT_FLAG_RFF == int_flag) {
1330 USART_RFCS(usart_periph) &= (uint32_t)(~USART_RFCS_RFFINT);
1331 } else {
1332 USART_INTC(usart_periph) |= BIT(USART_BIT_POS2(int_flag));
1333 }
1334 }
1335