1 /*!
2 \file gd32l23x_fwdgt.c
3 \brief FWDGT driver
4
5 \version 2021-08-04, V1.0.0, firmware for GD32L23x
6 */
7
8 /*
9 Copyright (c) 2021, GigaDevice Semiconductor Inc.
10
11 Redistribution and use in source and binary forms, with or without modification,
12 are permitted provided that the following conditions are met:
13
14 1. Redistributions of source code must retain the above copyright notice, this
15 list of conditions and the following disclaimer.
16 2. Redistributions in binary form must reproduce the above copyright notice,
17 this list of conditions and the following disclaimer in the documentation
18 and/or other materials provided with the distribution.
19 3. Neither the name of the copyright holder nor the names of its contributors
20 may be used to endorse or promote products derived from this software without
21 specific prior written permission.
22
23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 OF SUCH DAMAGE.
33 */
34
35 #include "gd32l23x_fwdgt.h"
36
37 /* write value to FWDGT_CTL_CMD bit field */
38 #define CTL_CMD(regval) (BITS(0,15) & ((uint32_t)(regval) << 0U)) /*!< write value to FWDGT_CTL_CMD bit field */
39 /* write value to FWDGT_RLD_RLD bit field */
40 #define RLD_RLD(regval) (BITS(0,11) & ((uint32_t)(regval) << 0U)) /*!< write value to FWDGT_RLD_RLD bit field */
41 /* write value to FWDGT_WND_WND bit field */
42 #define WND_WND(regval) (BITS(0,11) & ((uint32_t)(regval) << 0U)) /*!< write value to FWDGT_WND_WND bit field */
43
44 /*!
45 \brief enable write access to FWDGT_PSC, FWDGT_RLD and FWDGT_WND
46 \param[in] none
47 \param[out] none
48 \retval none
49 */
fwdgt_write_enable(void)50 void fwdgt_write_enable(void)
51 {
52 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
53 }
54
55 /*!
56 \brief disable write access to FWDGT_PSC, FWDGT_RLD and FWDGT_WND
57 \param[in] none
58 \param[out] none
59 \retval none
60 */
fwdgt_write_disable(void)61 void fwdgt_write_disable(void)
62 {
63 FWDGT_CTL = FWDGT_WRITEACCESS_DISABLE;
64 }
65
66 /*!
67 \brief start the FWDGT counter
68 \param[in] none
69 \param[out] none
70 \retval none
71 */
fwdgt_enable(void)72 void fwdgt_enable(void)
73 {
74 FWDGT_CTL = FWDGT_KEY_ENABLE;
75 }
76
77 /*!
78 \brief configure the FWDGT counter prescaler value
79 \param[in] prescaler_value: specify prescaler value
80 only one parameter can be selected which is shown as below:
81 \arg FWDGT_PSC_DIV4: FWDGT prescaler set to 4
82 \arg FWDGT_PSC_DIV8: FWDGT prescaler set to 8
83 \arg FWDGT_PSC_DIV16: FWDGT prescaler set to 16
84 \arg FWDGT_PSC_DIV32: FWDGT prescaler set to 32
85 \arg FWDGT_PSC_DIV64: FWDGT prescaler set to 64
86 \arg FWDGT_PSC_DIV128: FWDGT prescaler set to 128
87 \arg FWDGT_PSC_DIV256: FWDGT prescaler set to 256
88 \param[out] none
89 \retval ErrStatus: ERROR or SUCCESS
90 */
fwdgt_prescaler_value_config(uint16_t prescaler_value)91 ErrStatus fwdgt_prescaler_value_config(uint16_t prescaler_value)
92 {
93 uint32_t timeout = FWDGT_PSC_TIMEOUT;
94 uint32_t flag_status = RESET;
95
96 /* enable write access to FWDGT_PSC */
97 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
98
99 /* wait until the PUD flag to be reset */
100 do {
101 flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
102 } while((--timeout > (uint32_t)0) && (RESET != flag_status));
103
104 if(RESET != flag_status) {
105 return ERROR;
106 }
107
108 /* configure FWDGT */
109 FWDGT_PSC = (uint32_t)prescaler_value;
110
111 return SUCCESS;
112 }
113
114 /*!
115 \brief configure the FWDGT counter reload value
116 \param[in] reload_value: specify reload value(0x0000 - 0x0FFF)
117 \param[out] none
118 \retval ErrStatus: ERROR or SUCCESS
119 */
fwdgt_reload_value_config(uint16_t reload_value)120 ErrStatus fwdgt_reload_value_config(uint16_t reload_value)
121 {
122 uint32_t timeout = FWDGT_RLD_TIMEOUT;
123 uint32_t flag_status = RESET;
124
125 /* enable write access to FWDGT_RLD */
126 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
127
128 /* wait until the RUD flag to be reset */
129 do {
130 flag_status = FWDGT_STAT & FWDGT_STAT_RUD;
131 } while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
132
133 if((uint32_t)RESET != flag_status) {
134 return ERROR;
135 }
136
137 FWDGT_RLD = RLD_RLD(reload_value);
138
139 return SUCCESS;
140 }
141
142 /*!
143 \brief configure the FWDGT counter window value
144 \param[in] window_value: specify window value(0x0000 - 0x0FFF)
145 \param[out] none
146 \retval ErrStatus: ERROR or SUCCESS
147 */
fwdgt_window_value_config(uint16_t window_value)148 ErrStatus fwdgt_window_value_config(uint16_t window_value)
149 {
150 uint32_t time_index = FWDGT_WND_TIMEOUT;
151 uint32_t flag_status = RESET;
152
153 /* enable write access to FWDGT_WND */
154 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
155
156 /* wait until the WUD flag to be reset */
157 do {
158 flag_status = FWDGT_STAT & FWDGT_STAT_WUD;
159 } while((--time_index > 0U) && ((uint32_t)RESET != flag_status));
160
161 if((uint32_t)RESET != flag_status) {
162 return ERROR;
163 }
164
165 FWDGT_WND = WND_WND(window_value);
166
167 return SUCCESS;
168 }
169
170 /*!
171 \brief reload the counter of FWDGT
172 \param[in] none
173 \param[out] none
174 \retval none
175 */
fwdgt_counter_reload(void)176 void fwdgt_counter_reload(void)
177 {
178 FWDGT_CTL = FWDGT_KEY_RELOAD;
179 }
180
181 /*!
182 \brief configure counter reload value, and prescaler divider value
183 \param[in] reload_value: specify reload value(0x0000 - 0x0FFF)
184 \param[in] prescaler_div: FWDGT prescaler value
185 only one parameter can be selected which is shown as below:
186 \arg FWDGT_PSC_DIV4: FWDGT prescaler set to 4
187 \arg FWDGT_PSC_DIV8: FWDGT prescaler set to 8
188 \arg FWDGT_PSC_DIV16: FWDGT prescaler set to 16
189 \arg FWDGT_PSC_DIV32: FWDGT prescaler set to 32
190 \arg FWDGT_PSC_DIV64: FWDGT prescaler set to 64
191 \arg FWDGT_PSC_DIV128: FWDGT prescaler set to 128
192 \arg FWDGT_PSC_DIV256: FWDGT prescaler set to 256
193 \param[out] none
194 \retval ErrStatus: ERROR or SUCCESS
195 */
fwdgt_config(uint16_t reload_value,uint8_t prescaler_div)196 ErrStatus fwdgt_config(uint16_t reload_value, uint8_t prescaler_div)
197 {
198 uint32_t timeout = FWDGT_PSC_TIMEOUT;
199 uint32_t flag_status = RESET;
200
201 /* enable write access to FWDGT_PSC,and FWDGT_RLD */
202 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
203
204 /* wait until the PUD flag to be reset */
205 do {
206 flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
207 } while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
208
209 if((uint32_t)RESET != flag_status) {
210 return ERROR;
211 }
212
213 /* configure FWDGT */
214 FWDGT_PSC = (uint32_t)prescaler_div;
215
216 timeout = FWDGT_RLD_TIMEOUT;
217 /* wait until the RUD flag to be reset */
218 do {
219 flag_status = FWDGT_STAT & FWDGT_STAT_RUD;
220 } while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
221
222 if((uint32_t)RESET != flag_status) {
223 return ERROR;
224 }
225
226 FWDGT_RLD = RLD_RLD(reload_value);
227
228 /* reload the counter */
229 FWDGT_CTL = FWDGT_KEY_RELOAD;
230
231 return SUCCESS;
232 }
233
234 /*!
235 \brief get flag state of FWDGT
236 \param[in] flag: flag to get
237 only one parameter can be selected which is shown as below:
238 \arg FWDGT_FLAG_PUD: a write operation to FWDGT_PSC register is on going
239 \arg FWDGT_FLAG_RUD: a write operation to FWDGT_RLD register is on going
240 \arg FWDGT_FLAG_WUD: a write operation to FWDGT_WND register is on going
241 \param[out] none
242 \retval FlagStatus: SET or RESET
243 */
fwdgt_flag_get(uint16_t flag)244 FlagStatus fwdgt_flag_get(uint16_t flag)
245 {
246 if(RESET != (FWDGT_STAT & flag)) {
247 return SET;
248 }
249 return RESET;
250 }
251
