1 /*!
2 \file gd32f403_fwdgt.c
3 \brief FWDGT driver
4
5 \version 2017-02-10, V1.0.0, firmware for GD32F403
6 \version 2018-12-25, V2.0.0, firmware for GD32F403
7 \version 2020-09-30, V2.1.0, firmware for GD32F403
8 */
9
10 /*
11 Copyright (c) 2020, GigaDevice Semiconductor Inc.
12
13 Redistribution and use in source and binary forms, with or without modification,
14 are permitted provided that the following conditions are met:
15
16 1. Redistributions of source code must retain the above copyright notice, this
17 list of conditions and the following disclaimer.
18 2. Redistributions in binary form must reproduce the above copyright notice,
19 this list of conditions and the following disclaimer in the documentation
20 and/or other materials provided with the distribution.
21 3. Neither the name of the copyright holder nor the names of its contributors
22 may be used to endorse or promote products derived from this software without
23 specific prior written permission.
24
25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
34 OF SUCH DAMAGE.
35 */
36
37 #include "gd32f403_fwdgt.h"
38
39 /* write value to FWDGT_CTL_CMD bit field */
40 #define CTL_CMD(regval) (BITS(0,15) & ((uint32_t)(regval) << 0))
41 /* write value to FWDGT_RLD_RLD bit field */
42 #define RLD_RLD(regval) (BITS(0,11) & ((uint32_t)(regval) << 0))
43
44 /*!
45 \brief enable write access to FWDGT_PSC and FWDGT_RLD
46 \param[in] none
47 \param[out] none
48 \retval none
49 */
fwdgt_write_enable(void)50 void fwdgt_write_enable(void)
51 {
52 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
53 }
54
55 /*!
56 \brief disable write access to FWDGT_PSC and FWDGT_RLD
57 \param[in] none
58 \param[out] none
59 \retval none
60 */
fwdgt_write_disable(void)61 void fwdgt_write_disable(void)
62 {
63 FWDGT_CTL = FWDGT_WRITEACCESS_DISABLE;
64 }
65
66 /*!
67 \brief start the free watchdog timer counter
68 \param[in] none
69 \param[out] none
70 \retval none
71 */
fwdgt_enable(void)72 void fwdgt_enable(void)
73 {
74 FWDGT_CTL = FWDGT_KEY_ENABLE;
75 }
76
77 /*!
78 \brief reload the counter of FWDGT
79 \param[in] none
80 \param[out] none
81 \retval none
82 */
fwdgt_counter_reload(void)83 void fwdgt_counter_reload(void)
84 {
85 FWDGT_CTL = FWDGT_KEY_RELOAD;
86 }
87
88 /*!
89 \brief configure counter reload value, and prescaler divider value
90 \param[in] reload_value: specify reload value(0x0000 - 0x0FFF)
91 \param[in] prescaler_div: FWDGT prescaler value
92 only one parameter can be selected which is shown as below:
93 \arg FWDGT_PSC_DIV4: FWDGT prescaler set to 4
94 \arg FWDGT_PSC_DIV8: FWDGT prescaler set to 8
95 \arg FWDGT_PSC_DIV16: FWDGT prescaler set to 16
96 \arg FWDGT_PSC_DIV32: FWDGT prescaler set to 32
97 \arg FWDGT_PSC_DIV64: FWDGT prescaler set to 64
98 \arg FWDGT_PSC_DIV128: FWDGT prescaler set to 128
99 \arg FWDGT_PSC_DIV256: FWDGT prescaler set to 256
100 \param[out] none
101 \retval ErrStatus: ERROR or SUCCESS
102 */
fwdgt_config(uint16_t reload_value,uint8_t prescaler_div)103 ErrStatus fwdgt_config(uint16_t reload_value, uint8_t prescaler_div)
104 {
105 uint32_t timeout = FWDGT_PSC_TIMEOUT;
106 uint32_t flag_status = RESET;
107
108 /* enable write access to FWDGT_PSC,and FWDGT_RLD */
109 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
110
111 /* wait until the PUD flag to be reset */
112 do{
113 flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
114 }while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
115
116 if ((uint32_t)RESET != flag_status){
117 return ERROR;
118 }
119
120 /* configure FWDGT */
121 FWDGT_PSC = (uint32_t)prescaler_div;
122
123 timeout = FWDGT_RLD_TIMEOUT;
124 /* wait until the RUD flag to be reset */
125 do{
126 flag_status = FWDGT_STAT & FWDGT_STAT_RUD;
127 }while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
128
129 if ((uint32_t)RESET != flag_status){
130 return ERROR;
131 }
132
133 FWDGT_RLD = RLD_RLD(reload_value);
134
135 /* reload the counter */
136 FWDGT_CTL = FWDGT_KEY_RELOAD;
137
138 return SUCCESS;
139 }
140
141 /*!
142 \brief get flag state of FWDGT
143 \param[in] flag: flag to get
144 only one parameter can be selected which is shown as below:
145 \arg FWDGT_FLAG_PUD: a write operation to FWDGT_PSC register is on going
146 \arg FWDGT_FLAG_RUD: a write operation to FWDGT_RLD register is on going
147 \param[out] none
148 \retval FlagStatus: SET or RESET
149 */
fwdgt_flag_get(uint16_t flag)150 FlagStatus fwdgt_flag_get(uint16_t flag)
151 {
152 if(RESET != (FWDGT_STAT & flag)){
153 return SET;
154 }
155
156 return RESET;
157 }
158
