1 /*!
2 \file gd32f3x0_usart.c
3 \brief USART driver
4
5 \version 2017-06-06, V1.0.0, firmware for GD32F3x0
6 \version 2019-06-01, V2.0.0, firmware for GD32F3x0
7 \version 2020-09-30, V2.1.0, firmware for GD32F3x0
8 */
9
10 /*
11 Copyright (c) 2020, GigaDevice Semiconductor Inc.
12
13 Redistribution and use in source and binary forms, with or without modification,
14 are permitted provided that the following conditions are met:
15
16 1. Redistributions of source code must retain the above copyright notice, this
17 list of conditions and the following disclaimer.
18 2. Redistributions in binary form must reproduce the above copyright notice,
19 this list of conditions and the following disclaimer in the documentation
20 and/or other materials provided with the distribution.
21 3. Neither the name of the copyright holder nor the names of its contributors
22 may be used to endorse or promote products derived from this software without
23 specific prior written permission.
24
25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
34 OF SUCH DAMAGE.
35 */
36
37 #include "gd32f3x0_usart.h"
38
39 /* USART register bit offset */
40 #define CTL1_ADDR_OFFSET ((uint32_t)24U) /* bit offset of ADDR in USART_CTL1 */
41 #define GP_GUAT_OFFSET ((uint32_t)8U) /* bit offset of GUAT in USART_GP */
42 #define CTL2_SCRTNUM_OFFSET ((uint32_t)17U) /* bit offset of SCRTNUM in USART_CTL2 */
43 #define RT_BL_OFFSET ((uint32_t)24U) /* bit offset of BL in USART_RT */
44 #define CTL0_DEA_OFFSET ((uint32_t)21U) /* bit offset of DEA in USART_CTL0 */
45 #define CTL0_DED_OFFSET ((uint32_t)16U) /* bit offset of DED in USART_CTL0 */
46
47 /*!
48 \brief reset USART
49 \param[in] usart_periph: USARTx(x=0,1)
50 \param[out] none
51 \retval none
52 */
usart_deinit(uint32_t usart_periph)53 void usart_deinit(uint32_t usart_periph)
54 {
55 switch(usart_periph){
56 case USART0:
57 /* reset USART0 */
58 rcu_periph_reset_enable(RCU_USART0RST);
59 rcu_periph_reset_disable(RCU_USART0RST);
60 break;
61 case USART1:
62 /* reset USART1 */
63 rcu_periph_reset_enable(RCU_USART1RST);
64 rcu_periph_reset_disable(RCU_USART1RST);
65 break;
66 default:
67 break;
68 }
69 }
70
71 /*!
72 \brief configure USART baud rate value
73 \param[in] usart_periph: USARTx(x=0,1)
74 \param[in] baudval: baud rate value
75 \param[out] none
76 \retval none
77 */
usart_baudrate_set(uint32_t usart_periph,uint32_t baudval)78 void usart_baudrate_set(uint32_t usart_periph, uint32_t baudval)
79 {
80 uint32_t uclk = 0U, intdiv = 0U, fradiv = 0U, udiv = 0U;
81 switch(usart_periph){
82 /* get clock frequency */
83 case USART0:
84 /* get USART0 clock */
85 uclk = rcu_clock_freq_get(CK_USART);
86 break;
87 case USART1:
88 /* get USART1 clock */
89 uclk = rcu_clock_freq_get(CK_APB1);
90 break;
91 default:
92 break;
93 }
94 if(USART_CTL0(usart_periph) & USART_CTL0_OVSMOD){
95 /* oversampling by 8, configure the value of USART_BAUD */
96 udiv = ((2U*uclk)+baudval/2U)/baudval;
97 intdiv = udiv & 0x0000fff0U;
98 fradiv = (udiv>>1U) & 0x00000007U;
99 USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv));
100 }else{
101 /* oversampling by 16, configure the value of USART_BAUD */
102 udiv = (uclk+baudval/2U)/baudval;
103 intdiv = udiv & 0x0000fff0U;
104 fradiv = udiv & 0x0000000fU;
105 USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv));
106 }
107 }
108
109 /*!
110 \brief configure USART parity
111 \param[in] usart_periph: USARTx(x=0,1)
112 \param[in] paritycfg: USART parity configure
113 only one parameter can be selected which is shown as below:
114 \arg USART_PM_NONE: no parity
115 \arg USART_PM_ODD: odd parity
116 \arg USART_PM_EVEN: even parity
117 \param[out] none
118 \retval none
119 */
usart_parity_config(uint32_t usart_periph,uint32_t paritycfg)120 void usart_parity_config(uint32_t usart_periph, uint32_t paritycfg)
121 {
122 /* disable USART */
123 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
124 /* clear USART_CTL0 PM,PCEN bits */
125 USART_CTL0(usart_periph) &= ~(USART_CTL0_PM | USART_CTL0_PCEN);
126 /* configure USART parity mode */
127 USART_CTL0(usart_periph) |= paritycfg;
128 }
129
130 /*!
131 \brief configure USART word length
132 \param[in] usart_periph: USARTx(x=0,1)
133 \param[in] wlen: USART word length configure
134 only one parameter can be selected which is shown as below:
135 \arg USART_WL_8BIT: 8 bits
136 \arg USART_WL_9BIT: 9 bits
137 \param[out] none
138 \retval none
139 */
usart_word_length_set(uint32_t usart_periph,uint32_t wlen)140 void usart_word_length_set(uint32_t usart_periph, uint32_t wlen)
141 {
142 /* disable USART */
143 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
144 /* clear USART_CTL0 WL bit */
145 USART_CTL0(usart_periph) &= ~USART_CTL0_WL;
146 /* configure USART word length */
147 USART_CTL0(usart_periph) |= wlen;
148 }
149
150 /*!
151 \brief configure USART stop bit length
152 \param[in] usart_periph: USARTx(x=0,1)
153 \param[in] stblen: USART stop bit configure
154 only one parameter can be selected which is shown as below:
155 \arg USART_STB_1BIT: 1 bit
156 \arg USART_STB_0_5BIT: 0.5bit
157 \arg USART_STB_2BIT: 2 bits
158 \arg USART_STB_1_5BIT: 1.5bit
159 \param[out] none
160 \retval none
161 */
usart_stop_bit_set(uint32_t usart_periph,uint32_t stblen)162 void usart_stop_bit_set(uint32_t usart_periph, uint32_t stblen)
163 {
164 /* disable USART */
165 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
166 /* clear USART_CTL1 STB bits */
167 USART_CTL1(usart_periph) &= ~USART_CTL1_STB;
168 USART_CTL1(usart_periph) |= stblen;
169 }
170
171 /*!
172 \brief enable USART
173 \param[in] usart_periph: USARTx(x=0,1)
174 \param[out] none
175 \retval none
176 */
usart_enable(uint32_t usart_periph)177 void usart_enable(uint32_t usart_periph)
178 {
179 USART_CTL0(usart_periph) |= USART_CTL0_UEN;
180 }
181
182 /*!
183 \brief disable USART
184 \param[in] usart_periph: USARTx(x=0,1)
185 \param[out] none
186 \retval none
187 */
usart_disable(uint32_t usart_periph)188 void usart_disable(uint32_t usart_periph)
189 {
190 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
191 }
192
193 /*!
194 \brief configure USART transmitter
195 \param[in] usart_periph: USARTx(x=0,1)
196 \param[in] txconfig: enable or disable USART transmitter
197 only one parameter can be selected which is shown as below:
198 \arg USART_TRANSMIT_ENABLE: enable USART transmission
199 \arg USART_TRANSMIT_DISABLE: enable USART transmission
200 \param[out] none
201 \retval none
202 */
usart_transmit_config(uint32_t usart_periph,uint32_t txconfig)203 void usart_transmit_config(uint32_t usart_periph, uint32_t txconfig)
204 {
205 USART_CTL0(usart_periph) &= ~USART_CTL0_TEN;
206 /* configure transfer mode */
207 USART_CTL0(usart_periph) |= txconfig;
208 }
209
210 /*!
211 \brief configure USART receiver
212 \param[in] usart_periph: USARTx(x=0,1)
213 \param[in] rxconfig: enable or disable USART receiver
214 only one parameter can be selected which is shown as below:
215 \arg USART_RECEIVE_ENABLE: enable USART reception
216 \arg USART_RECEIVE_DISABLE: disable USART reception
217 \param[out] none
218 \retval none
219 */
usart_receive_config(uint32_t usart_periph,uint32_t rxconfig)220 void usart_receive_config(uint32_t usart_periph, uint32_t rxconfig)
221 {
222 USART_CTL0(usart_periph) &= ~USART_CTL0_REN;
223 /* configure receiver mode */
224 USART_CTL0(usart_periph) |= rxconfig;
225 }
226
227 /*!
228 \brief data is transmitted/received with the LSB/MSB first
229 \param[in] usart_periph: USARTx(x=0,1)
230 \param[in] msbf: LSB/MSB
231 only one parameter can be selected which is shown as below:
232 \arg USART_MSBF_LSB: LSB first
233 \arg USART_MSBF_MSB: MSB first
234 \param[out] none
235 \retval none
236 */
usart_data_first_config(uint32_t usart_periph,uint32_t msbf)237 void usart_data_first_config(uint32_t usart_periph, uint32_t msbf)
238 {
239 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
240 /* configure LSB or MSB first */
241 USART_CTL1(usart_periph) &= ~(USART_CTL1_MSBF);
242 USART_CTL1(usart_periph) |= (USART_CTL1_MSBF & msbf);
243 }
244
245 /*!
246 \brief USART inverted configure
247 \param[in] usart_periph: USARTx(x=0,1)
248 \param[in] invertpara: refer to usart_invert_enum
249 only one parameter can be selected which is shown as below:
250 \arg USART_DINV_ENABLE: data bit level inversion
251 \arg USART_DINV_DISABLE: data bit level not inversion
252 \arg USART_TXPIN_ENABLE: TX pin level inversion
253 \arg USART_TXPIN_DISABLE: TX pin level not inversion
254 \arg USART_RXPIN_ENABLE: RX pin level inversion
255 \arg USART_RXPIN_DISABLE: RX pin level not inversion
256 \arg USART_SWAP_ENABLE: swap TX/RX pins
257 \arg USART_SWAP_DISABLE: not swap TX/RX pins
258 \param[out] none
259 \retval none
260 */
usart_invert_config(uint32_t usart_periph,usart_invert_enum invertpara)261 void usart_invert_config(uint32_t usart_periph, usart_invert_enum invertpara)
262 {
263 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
264 /* inverted or not the specified signal */
265 switch(invertpara){
266 case USART_DINV_ENABLE:
267 USART_CTL1(usart_periph) |= USART_CTL1_DINV;
268 break;
269 case USART_DINV_DISABLE:
270 USART_CTL1(usart_periph) &= ~(USART_CTL1_DINV);
271 break;
272 case USART_TXPIN_ENABLE:
273 USART_CTL1(usart_periph) |= USART_CTL1_TINV;
274 break;
275 case USART_TXPIN_DISABLE:
276 USART_CTL1(usart_periph) &= ~(USART_CTL1_TINV);
277 break;
278 case USART_RXPIN_ENABLE:
279 USART_CTL1(usart_periph) |= USART_CTL1_RINV;
280 break;
281 case USART_RXPIN_DISABLE:
282 USART_CTL1(usart_periph) &= ~(USART_CTL1_RINV);
283 break;
284 case USART_SWAP_ENABLE:
285 USART_CTL1(usart_periph) |= USART_CTL1_STRP;
286 break;
287 case USART_SWAP_DISABLE:
288 USART_CTL1(usart_periph) &= ~(USART_CTL1_STRP);
289 break;
290 default:
291 break;
292 }
293 }
294
295 /*!
296 \brief enable the USART overrun function
297 \param[in] usart_periph: USARTx(x=0,1)
298 \param[out] none
299 \retval none
300 */
usart_overrun_enable(uint32_t usart_periph)301 void usart_overrun_enable(uint32_t usart_periph)
302 {
303 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
304 /* enable overrun function */
305 USART_CTL2(usart_periph) &= ~(USART_CTL2_OVRD);
306 }
307
308 /*!
309 \brief disable the USART overrun function
310 \param[in] usart_periph: USARTx(x=0,1)
311 \param[out] none
312 \retval none
313 */
usart_overrun_disable(uint32_t usart_periph)314 void usart_overrun_disable(uint32_t usart_periph)
315 {
316 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
317 /* disable overrun function */
318 USART_CTL2(usart_periph) |= USART_CTL2_OVRD;
319 }
320
321 /*!
322 \brief configure the USART oversample mode
323 \param[in] usart_periph: USARTx(x=0,1)
324 \param[in] oversamp: oversample value
325 only one parameter can be selected which is shown as below:
326 \arg USART_OVSMOD_8: oversampling by 8
327 \arg USART_OVSMOD_16: oversampling by 16
328 \param[out] none
329 \retval none
330 */
usart_oversample_config(uint32_t usart_periph,uint32_t oversamp)331 void usart_oversample_config(uint32_t usart_periph, uint32_t oversamp)
332 {
333 /* disable USART */
334 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
335 /* clear OVSMOD bit */
336 USART_CTL0(usart_periph) &= ~(USART_CTL0_OVSMOD);
337 USART_CTL0(usart_periph) |= oversamp;
338 }
339
340 /*!
341 \brief configure the sample bit method
342 \param[in] usart_periph: USARTx(x=0,1)
343 \param[in] osb: sample bit
344 only one parameter can be selected which is shown as below:
345 \arg USART_OSB_1BIT: 1 bit
346 \arg USART_OSB_3BIT: 3 bits
347 \param[out] none
348 \retval none
349 */
usart_sample_bit_config(uint32_t usart_periph,uint32_t osb)350 void usart_sample_bit_config(uint32_t usart_periph, uint32_t osb)
351 {
352 /* disable USART */
353 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
354
355 USART_CTL2(usart_periph) &= ~(USART_CTL2_OSB);
356 USART_CTL2(usart_periph) |= osb;
357 }
358
359 /*!
360 \brief enable receiver timeout
361 \param[in] usart_periph: USARTx(x=0)
362 \param[out] none
363 \retval none
364 */
usart_receiver_timeout_enable(uint32_t usart_periph)365 void usart_receiver_timeout_enable(uint32_t usart_periph)
366 {
367 USART_CTL1(usart_periph) |= USART_CTL1_RTEN;
368 }
369
370 /*!
371 \brief disable receiver timeout
372 \param[in] usart_periph: USARTx(x=0)
373 \param[out] none
374 \retval none
375 */
usart_receiver_timeout_disable(uint32_t usart_periph)376 void usart_receiver_timeout_disable(uint32_t usart_periph)
377 {
378 USART_CTL1(usart_periph) &= ~(USART_CTL1_RTEN);
379 }
380
381 /*!
382 \brief configure receiver timeout threshold
383 \param[in] usart_periph: USARTx(x=0)
384 \param[in] rtimeout: 0x00000000-0x00FFFFFF, receiver timeout value in terms of number of baud clocks
385 \param[out] none
386 \retval none
387 */
usart_receiver_timeout_threshold_config(uint32_t usart_periph,uint32_t rtimeout)388 void usart_receiver_timeout_threshold_config(uint32_t usart_periph, uint32_t rtimeout)
389 {
390 USART_RT(usart_periph) &= ~(USART_RT_RT);
391 USART_RT(usart_periph) |= rtimeout;
392 }
393
394 /*!
395 \brief USART transmit data function
396 \param[in] usart_periph: USARTx(x=0,1)
397 \param[in] data: data of transmission
398 \param[out] none
399 \retval none
400 */
usart_data_transmit(uint32_t usart_periph,uint32_t data)401 void usart_data_transmit(uint32_t usart_periph, uint32_t data)
402 {
403 USART_TDATA(usart_periph) = (USART_TDATA_TDATA & data);
404 }
405
406 /*!
407 \brief USART receive data function
408 \param[in] usart_periph: USARTx(x=0,1)
409 \param[out] none
410 \retval data of received
411 */
usart_data_receive(uint32_t usart_periph)412 uint16_t usart_data_receive(uint32_t usart_periph)
413 {
414 return (uint16_t)(GET_BITS(USART_RDATA(usart_periph), 0U, 8U));
415 }
416
417 /*!
418 \brief enable auto baud rate detection
419 \param[in] usart_periph: USARTx(x=0)
420 \param[out] none
421 \retval none
422 */
usart_autobaud_detection_enable(uint32_t usart_periph)423 void usart_autobaud_detection_enable(uint32_t usart_periph)
424 {
425 USART_CTL1(usart_periph) |= USART_CTL1_ABDEN;
426 }
427
428 /*!
429 \brief disable auto baud rate detection
430 \param[in] usart_periph: USARTx(x=0)
431 \param[out] none
432 \retval none
433 */
usart_autobaud_detection_disable(uint32_t usart_periph)434 void usart_autobaud_detection_disable(uint32_t usart_periph)
435 {
436 USART_CTL1(usart_periph) &= ~(USART_CTL1_ABDEN);
437 }
438
439 /*!
440 \brief configure auto baud rate detection mode
441 \param[in] usart_periph: USARTx(x=0)
442 \param[in] abdmod: auto baud rate detection mode
443 only one parameter can be selected which is shown as below:
444 \arg USART_ABDM_FTOR: falling edge to rising edge measurement
445 \arg USART_ABDM_FTOF: falling edge to falling edge measurement
446 \param[out] none
447 \retval none
448 */
usart_autobaud_detection_mode_config(uint32_t usart_periph,uint32_t abdmod)449 void usart_autobaud_detection_mode_config(uint32_t usart_periph, uint32_t abdmod)
450 {
451 /* reset ABDM bits */
452 USART_CTL1(usart_periph) &= ~(USART_CTL1_ABDM);
453 USART_CTL1(usart_periph) |= abdmod;
454 }
455
456 /*!
457 \brief address of the USART terminal
458 \param[in] usart_periph: USARTx(x=0,1)
459 \param[in] addr: 0x00-0xFF, address of USART terminal
460 \param[out] none
461 \retval none
462 */
usart_address_config(uint32_t usart_periph,uint8_t addr)463 void usart_address_config(uint32_t usart_periph, uint8_t addr)
464 {
465 /* disable USART */
466 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
467
468 USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDR);
469 USART_CTL1(usart_periph) |= (USART_CTL1_ADDR & (((uint32_t)addr) << CTL1_ADDR_OFFSET));
470 }
471
472 /*!
473 \brief configure the address of the USART in wake up by address match mode
474 \param[in] usart_periph: USARTx(x=0,1)
475 \param[in] addmod: address detection mode
476 only one parameter can be selected which is shown as below:
477 \arg USART_ADDM_4BIT: 4 bits
478 \arg USART_ADDM_FULLBIT: full bits
479 \param[out] none
480 \retval none
481 */
usart_address_detection_mode_config(uint32_t usart_periph,uint32_t addmod)482 void usart_address_detection_mode_config(uint32_t usart_periph, uint32_t addmod)
483 {
484 /* disable USART */
485 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
486
487 USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDM);
488 USART_CTL1(usart_periph) |= USART_CTL1_ADDM & (addmod);
489 }
490
491 /*!
492 \brief enable mute mode
493 \param[in] usart_periph: USARTx(x=0,1)
494 \param[out] none
495 \retval none
496 */
usart_mute_mode_enable(uint32_t usart_periph)497 void usart_mute_mode_enable(uint32_t usart_periph)
498 {
499 USART_CTL0(usart_periph) |= USART_CTL0_MEN;
500 }
501
502 /*!
503 \brief disable mute mode
504 \param[in] usart_periph: USARTx(x=0,1)
505 \param[out] none
506 \retval none
507 */
usart_mute_mode_disable(uint32_t usart_periph)508 void usart_mute_mode_disable(uint32_t usart_periph)
509 {
510 USART_CTL0(usart_periph) &= ~(USART_CTL0_MEN);
511 }
512
513 /*!
514 \brief configure wakeup method in mute mode
515 \param[in] usart_periph: USARTx(x=0,1)
516 \param[in] wmethod: two methods be used to enter or exit the mute mode
517 only one parameter can be selected which is shown as below:
518 \arg USART_WM_IDLE: idle line
519 \arg USART_WM_ADDR: address mark
520 \param[out] none
521 \retval none
522 */
usart_mute_mode_wakeup_config(uint32_t usart_periph,uint32_t wmethod)523 void usart_mute_mode_wakeup_config(uint32_t usart_periph, uint32_t wmethod)
524 {
525 /* disable USART */
526 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
527
528 USART_CTL0(usart_periph) &= ~(USART_CTL0_WM);
529 USART_CTL0(usart_periph) |= wmethod;
530 }
531
532 /*!
533 \brief enable LIN mode
534 \param[in] usart_periph: USARTx(x=0)
535 \param[out] none
536 \retval none
537 */
usart_lin_mode_enable(uint32_t usart_periph)538 void usart_lin_mode_enable(uint32_t usart_periph)
539 {
540 /* disable USART */
541 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
542
543 USART_CTL1(usart_periph) |= USART_CTL1_LMEN;
544 }
545
546 /*!
547 \brief disable LIN mode
548 \param[in] usart_periph: USARTx(x=0)
549 \param[out] none
550 \retval none
551 */
usart_lin_mode_disable(uint32_t usart_periph)552 void usart_lin_mode_disable(uint32_t usart_periph)
553 {
554 /* disable USART */
555 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
556
557 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN);
558 }
559
560 /*!
561 \brief configure LIN break frame length
562 \param[in] usart_periph: USARTx(x=0)
563 \param[in] lblen: LIN break detection length
564 only one parameter can be selected which is shown as below:
565 \arg USART_LBLEN_10B: 10 bits break detection
566 \arg USART_LBLEN_11B: 11 bits break detection
567 \param[out] none
568 \retval none
569 */
usart_lin_break_detection_length_config(uint32_t usart_periph,uint32_t lblen)570 void usart_lin_break_detection_length_config(uint32_t usart_periph, uint32_t lblen)
571 {
572 /* disable USART */
573 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
574 USART_CTL1(usart_periph) &= ~(USART_CTL1_LBLEN);
575 USART_CTL1(usart_periph) |= USART_CTL1_LBLEN & (lblen);
576 }
577
578 /*!
579 \brief enable half-duplex mode
580 \param[in] usart_periph: USARTx(x=0,1)
581 \param[out] none
582 \retval none
583 */
usart_halfduplex_enable(uint32_t usart_periph)584 void usart_halfduplex_enable(uint32_t usart_periph)
585 {
586 /* disable USART */
587 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
588
589 USART_CTL2(usart_periph) |= USART_CTL2_HDEN;
590 }
591
592 /*!
593 \brief disable half-duplex mode
594 \param[in] usart_periph: USARTx(x=0,1)
595 \param[out] none
596 \retval none
597 */
usart_halfduplex_disable(uint32_t usart_periph)598 void usart_halfduplex_disable(uint32_t usart_periph)
599 {
600 /* disable USART */
601 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
602
603 USART_CTL2(usart_periph) &= ~(USART_CTL2_HDEN);
604 }
605
606 /*!
607 \brief enable USART clock
608 \param[in] usart_periph: USARTx(x=0)
609 \param[out] none
610 \retval none
611 */
usart_clock_enable(uint32_t usart_periph)612 void usart_clock_enable(uint32_t usart_periph)
613 {
614 /* disable USART */
615 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
616
617 USART_CTL1(usart_periph) |= USART_CTL1_CKEN;
618 }
619
620 /*!
621 \brief disable USART clock
622 \param[in] usart_periph: USARTx(x=0)
623 \param[out] none
624 \retval none
625 */
usart_clock_disable(uint32_t usart_periph)626 void usart_clock_disable(uint32_t usart_periph)
627 {
628 /* disable USART */
629 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
630
631 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN);
632 }
633
634 /*!
635 \brief configure USART synchronous mode parameters
636 \param[in] usart_periph: USARTx(x=0,1)
637 \param[in] clen: last bit clock pulse
638 only one parameter can be selected which is shown as below:
639 \arg USART_CLEN_NONE: clock pulse of the last data bit (MSB) is not output to the CK pin
640 \arg USART_CLEN_EN: clock pulse of the last data bit (MSB) is output to the CK pin
641 \param[in] cph: clock phase
642 only one parameter can be selected which is shown as below:
643 \arg USART_CPH_1CK: first clock transition is the first data capture edge
644 \arg USART_CPH_2CK: second clock transition is the first data capture edge
645 \param[in] cpl: clock polarity
646 only one parameter can be selected which is shown as below:
647 \arg USART_CPL_LOW: steady low value on CK pin
648 \arg USART_CPL_HIGH: steady high value on CK pin
649 \param[out] none
650 \retval none
651 */
usart_synchronous_clock_config(uint32_t usart_periph,uint32_t clen,uint32_t cph,uint32_t cpl)652 void usart_synchronous_clock_config(uint32_t usart_periph, uint32_t clen, uint32_t cph, uint32_t cpl)
653 {
654 /* disable USART */
655 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
656 /* reset USART_CTL1 CLEN,CPH,CPL bits */
657 USART_CTL1(usart_periph) &= ~(USART_CTL1_CLEN | USART_CTL1_CPH | USART_CTL1_CPL);
658
659 USART_CTL1(usart_periph) |= (USART_CTL1_CLEN & clen);
660 USART_CTL1(usart_periph) |= (USART_CTL1_CPH & cph);
661 USART_CTL1(usart_periph) |= (USART_CTL1_CPL & cpl);
662 }
663
664 /*!
665 \brief configure guard time value in smartcard mode
666 \param[in] usart_periph: USARTx(x=0)
667 \param[in] guat: 0x00-0xFF
668 \param[out] none
669 \retval none
670 */
usart_guard_time_config(uint32_t usart_periph,uint32_t guat)671 void usart_guard_time_config(uint32_t usart_periph, uint32_t guat)
672 {
673 /* disable USART */
674 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
675
676 USART_GP(usart_periph) &= ~(USART_GP_GUAT);
677 USART_GP(usart_periph) |= (USART_GP_GUAT & ((guat) << GP_GUAT_OFFSET));
678 }
679
680 /*!
681 \brief enable smartcard mode
682 \param[in] usart_periph: USARTx(x=0)
683 \param[out] none
684 \retval none
685 */
usart_smartcard_mode_enable(uint32_t usart_periph)686 void usart_smartcard_mode_enable(uint32_t usart_periph)
687 {
688 /* disable USART */
689 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
690
691 USART_CTL2(usart_periph) |= USART_CTL2_SCEN;
692 }
693
694 /*!
695 \brief disable smartcard mode
696 \param[in] usart_periph: USARTx(x=0)
697 \param[out] none
698 \retval none
699 */
usart_smartcard_mode_disable(uint32_t usart_periph)700 void usart_smartcard_mode_disable(uint32_t usart_periph)
701 {
702 /* disable USART */
703 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
704
705 USART_CTL2(usart_periph) &= ~(USART_CTL2_SCEN);
706 }
707
708 /*!
709 \brief enable NACK in smartcard mode
710 \param[in] usart_periph: USARTx(x=0)
711 \param[out] none
712 \retval none
713 */
usart_smartcard_mode_nack_enable(uint32_t usart_periph)714 void usart_smartcard_mode_nack_enable(uint32_t usart_periph)
715 {
716 /* disable USART */
717 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
718
719 USART_CTL2(usart_periph) |= USART_CTL2_NKEN;
720 }
721
722 /*!
723 \brief disable NACK in smartcard mode
724 \param[in] usart_periph: USARTx(x=0)
725 \param[out] none
726 \retval none
727 */
usart_smartcard_mode_nack_disable(uint32_t usart_periph)728 void usart_smartcard_mode_nack_disable(uint32_t usart_periph)
729 {
730 /* disable USART */
731 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
732
733 USART_CTL2(usart_periph) &= ~(USART_CTL2_NKEN);
734 }
735
736 /*!
737 \brief enable early NACK in smartcard mode
738 \param[in] usart_periph: USARTx(x=0)
739 \param[out] none
740 \retval none
741 */
usart_smartcard_mode_early_nack_enable(uint32_t usart_periph)742 void usart_smartcard_mode_early_nack_enable(uint32_t usart_periph)
743 {
744 USART_RFCS(usart_periph) |= USART_RFCS_ELNACK;
745 }
746
747 /*!
748 \brief disable early NACK in smartcard mode
749 \param[in] usart_periph: USARTx(x=0)
750 \param[out] none
751 \retval none
752 */
usart_smartcard_mode_early_nack_disable(uint32_t usart_periph)753 void usart_smartcard_mode_early_nack_disable(uint32_t usart_periph)
754 {
755 USART_RFCS(usart_periph) &= ~USART_RFCS_ELNACK;
756 }
757
758 /*!
759 \brief configure smartcard auto-retry number
760 \param[in] usart_periph: USARTx(x=0)
761 \param[in] scrtnum: 0x00000000-0x00000007, smartcard auto-retry number
762 \param[out] none
763 \retval none
764 */
usart_smartcard_autoretry_config(uint32_t usart_periph,uint32_t scrtnum)765 void usart_smartcard_autoretry_config(uint32_t usart_periph, uint32_t scrtnum)
766 {
767 /* disable USART */
768 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
769 USART_CTL2(usart_periph) &= ~(USART_CTL2_SCRTNUM);
770 USART_CTL2(usart_periph) |= (USART_CTL2_SCRTNUM & (scrtnum << CTL2_SCRTNUM_OFFSET));
771 }
772
773 /*!
774 \brief configure block length
775 \param[in] usart_periph: USARTx(x=0)
776 \param[in] bl: 0x00000000-0x000000FF
777 \param[out] none
778 \retval none
779 */
usart_block_length_config(uint32_t usart_periph,uint32_t bl)780 void usart_block_length_config(uint32_t usart_periph, uint32_t bl)
781 {
782 USART_RT(usart_periph) &= ~(USART_RT_BL);
783 USART_RT(usart_periph) |= (USART_RT_BL & ((bl) << RT_BL_OFFSET));
784 }
785
786 /*!
787 \brief enable IrDA mode
788 \param[in] usart_periph: USARTx(x=0)
789 \param[out] none
790 \retval none
791 */
usart_irda_mode_enable(uint32_t usart_periph)792 void usart_irda_mode_enable(uint32_t usart_periph)
793 {
794 /* disable USART */
795 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
796
797 USART_CTL2(usart_periph) |= USART_CTL2_IREN;
798 }
799
800 /*!
801 \brief disable IrDA mode
802 \param[in] usart_periph: USARTx(x=0)
803 \param[out] none
804 \retval none
805 */
usart_irda_mode_disable(uint32_t usart_periph)806 void usart_irda_mode_disable(uint32_t usart_periph)
807 {
808 /* disable USART */
809 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
810
811 USART_CTL2(usart_periph) &= ~(USART_CTL2_IREN);
812 }
813
814 /*!
815 \brief configure the peripheral clock prescaler in USART IrDA low-power or SmartCard mode
816 \param[in] usart_periph: USARTx(x=0)
817 \param[in] psc: 0x00000000-0x000000FF
818 \param[out] none
819 \retval none
820 */
usart_prescaler_config(uint32_t usart_periph,uint32_t psc)821 void usart_prescaler_config(uint32_t usart_periph, uint32_t psc)
822 {
823 /* disable USART */
824 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
825 USART_GP(usart_periph) &= ~(USART_GP_PSC);
826 USART_GP(usart_periph) |= psc;
827 }
828
829 /*!
830 \brief configure IrDA low-power
831 \param[in] usart_periph: USARTx(x=0)
832 \param[in] irlp: IrDA low-power or normal
833 only one parameter can be selected which is shown as below:
834 \arg USART_IRLP_LOW: low-power
835 \arg USART_IRLP_NORMAL: normal
836 \param[out] none
837 \retval none
838 */
usart_irda_lowpower_config(uint32_t usart_periph,uint32_t irlp)839 void usart_irda_lowpower_config(uint32_t usart_periph, uint32_t irlp)
840 {
841 /* disable USART */
842 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
843 USART_CTL2(usart_periph) &= ~(USART_CTL2_IRLP);
844 USART_CTL2(usart_periph) |= (USART_CTL2_IRLP & irlp);
845 }
846
847 /*!
848 \brief configure hardware flow control RTS
849 \param[in] usart_periph: USARTx(x=0,1)
850 \param[in] rtsconfig: enable or disable RTS
851 only one parameter can be selected which is shown as below:
852 \arg USART_RTS_ENABLE: enable RTS
853 \arg USART_RTS_DISABLE: disable RTS
854 \param[out] none
855 \retval none
856 */
usart_hardware_flow_rts_config(uint32_t usart_periph,uint32_t rtsconfig)857 void usart_hardware_flow_rts_config(uint32_t usart_periph, uint32_t rtsconfig)
858 {
859 /* disable USART */
860 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
861
862 USART_CTL2(usart_periph) &= ~(USART_CTL2_RTSEN);
863 USART_CTL2(usart_periph) |= rtsconfig;
864 }
865
866 /*!
867 \brief configure hardware flow control CTS
868 \param[in] usart_periph: USARTx(x=0,1)
869 \param[in] ctsconfig: enable or disable CTS
870 only one parameter can be selected which is shown as below:
871 \arg USART_CTS_ENABLE: enable CTS
872 \arg USART_CTS_DISABLE: disable CTS
873 \param[out] none
874 \retval none
875 */
usart_hardware_flow_cts_config(uint32_t usart_periph,uint32_t ctsconfig)876 void usart_hardware_flow_cts_config(uint32_t usart_periph, uint32_t ctsconfig)
877 {
878 /* disable USART */
879 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
880
881 USART_CTL2(usart_periph) &= ~USART_CTL2_CTSEN;
882 USART_CTL2(usart_periph) |= ctsconfig;
883 }
884
885 /*!
886 \brief enable RS485 driver
887 \param[in] usart_periph: USARTx(x=0,1)
888 \param[out] none
889 \retval none
890 */
usart_rs485_driver_enable(uint32_t usart_periph)891 void usart_rs485_driver_enable(uint32_t usart_periph)
892 {
893 /* disable USART */
894 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
895
896 USART_CTL2(usart_periph) |= USART_CTL2_DEM;
897 }
898
899 /*!
900 \brief disable RS485 driver
901 \param[in] usart_periph: USARTx(x=0,1)
902 \param[out] none
903 \retval none
904 */
usart_rs485_driver_disable(uint32_t usart_periph)905 void usart_rs485_driver_disable(uint32_t usart_periph)
906 {
907 /* disable USART */
908 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
909
910 USART_CTL2(usart_periph) &= ~(USART_CTL2_DEM);
911 }
912
913 /*!
914 \brief configure driver enable assertion time
915 \param[in] usart_periph: USARTx(x=0,1)
916 \param[in] deatime: 0x00000000-0x0000001F
917 \param[out] none
918 \retval none
919 */
usart_driver_assertime_config(uint32_t usart_periph,uint32_t deatime)920 void usart_driver_assertime_config(uint32_t usart_periph, uint32_t deatime)
921 {
922 /* disable USART */
923 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
924
925 USART_CTL0(usart_periph) &= ~(USART_CTL0_DEA);
926 USART_CTL0(usart_periph) |= (USART_CTL0_DEA & ((deatime) << CTL0_DEA_OFFSET));
927 }
928
929 /*!
930 \brief configure driver enable de-assertion time
931 \param[in] usart_periph: USARTx(x=0,1)
932 \param[in] dedtime: 0x00000000-0x0000001F
933 \param[out] none
934 \retval none
935 */
usart_driver_deassertime_config(uint32_t usart_periph,uint32_t dedtime)936 void usart_driver_deassertime_config(uint32_t usart_periph, uint32_t dedtime)
937 {
938 /* disable USART */
939 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
940
941 USART_CTL0(usart_periph) &= ~(USART_CTL0_DED);
942 USART_CTL0(usart_periph) |= (USART_CTL0_DED & ((dedtime) << CTL0_DED_OFFSET));
943 }
944
945 /*!
946 \brief configure driver enable polarity mode
947 \param[in] usart_periph: USARTx(x=0,1)
948 \param[in] dep: DE signal
949 only one parameter can be selected which is shown as below:
950 \arg USART_DEP_HIGH: DE signal is active high
951 \arg USART_DEP_LOW: DE signal is active low
952 \param[out] none
953 \retval none
954 */
usart_depolarity_config(uint32_t usart_periph,uint32_t dep)955 void usart_depolarity_config(uint32_t usart_periph, uint32_t dep)
956 {
957 /* disable USART */
958 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
959 /* reset DEP bit */
960 USART_CTL2(usart_periph) &= ~(USART_CTL2_DEP);
961 USART_CTL2(usart_periph) |= (USART_CTL2_DEP & dep);
962 }
963
964 /*!
965 \brief configure USART DMA reception
966 \param[in] usart_periph: USARTx(x=0,1)
967 \param[in] dmacmd: enable or disable DMA for reception
968 only one parameter can be selected which is shown as below:
969 \arg USART_DENR_ENABLE: DMA enable for reception
970 \arg USART_DENR_DISABLE: DMA disable for reception
971 \param[out] none
972 \retval none
973 */
usart_dma_receive_config(uint32_t usart_periph,uint32_t dmacmd)974 void usart_dma_receive_config(uint32_t usart_periph, uint32_t dmacmd)
975 {
976 USART_CTL2(usart_periph) &= ~USART_CTL2_DENR;
977 /* configure DMA reception */
978 USART_CTL2(usart_periph) |= dmacmd;
979 }
980
981 /*!
982 \brief configure USART DMA transmission
983 \param[in] usart_periph: USARTx(x=0,1)
984 \param[in] dmacmd: enable or disable DMA for transmission
985 only one parameter can be selected which is shown as below:
986 \arg USART_DENT_ENABLE: DMA enable for transmission
987 \arg USART_DENT_DISABLE: DMA disable for transmission
988 \param[out] none
989 \retval none
990 */
usart_dma_transmit_config(uint32_t usart_periph,uint32_t dmacmd)991 void usart_dma_transmit_config(uint32_t usart_periph, uint32_t dmacmd)
992 {
993 USART_CTL2(usart_periph) &= ~USART_CTL2_DENT;
994 /* configure DMA transmission */
995 USART_CTL2(usart_periph) |= dmacmd;
996 }
997
998 /*!
999 \brief disable DMA on reception error
1000 \param[in] usart_periph: USARTx(x=0,1)
1001 \param[out] none
1002 \retval none
1003 */
usart_reception_error_dma_disable(uint32_t usart_periph)1004 void usart_reception_error_dma_disable(uint32_t usart_periph)
1005 {
1006 /* disable USART */
1007 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
1008
1009 USART_CTL2(usart_periph) |= USART_CTL2_DDRE;
1010 }
1011
1012 /*!
1013 \brief enable DMA on reception error
1014 \param[in] usart_periph: USARTx(x=0,1)
1015 \param[out] none
1016 \retval none
1017 */
usart_reception_error_dma_enable(uint32_t usart_periph)1018 void usart_reception_error_dma_enable(uint32_t usart_periph)
1019 {
1020 /* disable USART */
1021 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
1022
1023 USART_CTL2(usart_periph) &= ~(USART_CTL2_DDRE);
1024 }
1025
1026 /*!
1027 \brief enable USART to wakeup the mcu from deep-sleep mode
1028 \param[in] usart_periph: USARTx(x=0)
1029 \param[out] none
1030 \retval none
1031 */
usart_wakeup_enable(uint32_t usart_periph)1032 void usart_wakeup_enable(uint32_t usart_periph)
1033 {
1034 USART_CTL0(usart_periph) |= USART_CTL0_UESM;
1035 }
1036
1037 /*!
1038 \brief disable USART to wakeup the mcu from deep-sleep mode
1039 \param[in] usart_periph: USARTx(x=0)
1040 \param[out] none
1041 \retval none
1042 */
usart_wakeup_disable(uint32_t usart_periph)1043 void usart_wakeup_disable(uint32_t usart_periph)
1044 {
1045 USART_CTL0(usart_periph) &= ~(USART_CTL0_UESM);
1046 }
1047
1048 /*!
1049 \brief configure the USART wakeup mode from deep-sleep mode
1050 \param[in] usart_periph: USARTx(x=0)
1051 \param[in] wum: wakeup mode
1052 only one parameter can be selected which is shown as below:
1053 \arg USART_WUM_ADDR: WUF active on address match
1054 \arg USART_WUM_STARTB: WUF active on start bit
1055 \arg USART_WUM_RBNE: WUF active on RBNE
1056 \param[out] none
1057 \retval none
1058 */
usart_wakeup_mode_config(uint32_t usart_periph,uint32_t wum)1059 void usart_wakeup_mode_config(uint32_t usart_periph, uint32_t wum)
1060 {
1061 /* disable USART */
1062 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
1063 /* reset WUM bit */
1064 USART_CTL2(usart_periph) &= ~(USART_CTL2_WUM);
1065 USART_CTL2(usart_periph) |= USART_CTL2_WUM & (wum);
1066 }
1067
1068 /*!
1069 \brief enable USART command
1070 \param[in] usart_periph: USARTx(x=0,1)
1071 \param[in] cmdtype: command type
1072 only one parameter can be selected which is shown as below:
1073 \arg USART_CMD_ABDCMD: auto baudrate detection command
1074 \arg USART_CMD_SBKCMD: send break command
1075 \arg USART_CMD_MMCMD: mute mode command
1076 \arg USART_CMD_RXFCMD: receive data flush command
1077 \arg USART_CMD_TXFCMD: transmit data flush request
1078 \param[out] none
1079 \retval none
1080 */
usart_command_enable(uint32_t usart_periph,uint32_t cmdtype)1081 void usart_command_enable(uint32_t usart_periph, uint32_t cmdtype)
1082 {
1083 USART_CMD(usart_periph) |= (cmdtype);
1084 }
1085
1086 /*!
1087 \brief enable receive FIFO
1088 \param[in] usart_periph: USARTx(x=0,1)
1089 \param[out] none
1090 \retval none
1091 */
usart_receive_fifo_enable(uint32_t usart_periph)1092 void usart_receive_fifo_enable(uint32_t usart_periph)
1093 {
1094 USART_RFCS(usart_periph) |= USART_RFCS_RFEN;
1095 }
1096
1097 /*!
1098 \brief disable receive FIFO
1099 \param[in] usart_periph: USARTx(x=0,1)
1100 \param[out] none
1101 \retval none
1102 */
usart_receive_fifo_disable(uint32_t usart_periph)1103 void usart_receive_fifo_disable(uint32_t usart_periph)
1104 {
1105 USART_RFCS(usart_periph) &= ~(USART_RFCS_RFEN);
1106 }
1107
1108 /*!
1109 \brief read receive FIFO counter number
1110 \param[in] usart_periph: USARTx(x=0,1)
1111 \param[out] none
1112 \retval receive FIFO counter number
1113 */
usart_receive_fifo_counter_number(uint32_t usart_periph)1114 uint8_t usart_receive_fifo_counter_number(uint32_t usart_periph)
1115 {
1116 return (uint8_t)(GET_BITS(USART_RFCS(usart_periph), 12U, 14U));
1117 }
1118
1119 /*!
1120 \brief get flag in STAT/CHC/RFCS register
1121 \param[in] usart_periph: USARTx(x=0,1)
1122 \param[in] flag: flag type
1123 only one parameter can be selected which is shown as below:
1124 \arg USART_FLAG_PERR: parity error flag
1125 \arg USART_FLAG_FERR: frame error flag
1126 \arg USART_FLAG_NERR: noise error flag
1127 \arg USART_FLAG_ORERR: overrun error
1128 \arg USART_FLAG_IDLE: idle line detected flag
1129 \arg USART_FLAG_RBNE: read data buffer not empty
1130 \arg USART_FLAG_TC: transmission completed
1131 \arg USART_FLAG_TBE: transmit data register empty
1132 \arg USART_FLAG_LBD: LIN break detected flag
1133 \arg USART_FLAG_CTSF: CTS change flag
1134 \arg USART_FLAG_CTS: CTS level
1135 \arg USART_FLAG_RT: receiver timeout flag
1136 \arg USART_FLAG_EB: end of block flag
1137 \arg USART_FLAG_ABDE: auto baudrate detection error
1138 \arg USART_FLAG_ABD: auto baudrate detection flag
1139 \arg USART_FLAG_BSY: busy flag
1140 \arg USART_FLAG_AM: address match flag
1141 \arg USART_FLAG_SB: send break flag
1142 \arg USART_FLAG_RWU: receiver wakeup from mute mode.
1143 \arg USART_FLAG_WU: wakeup from deep-sleep mode flag
1144 \arg USART_FLAG_TEA: transmit enable acknowledge flag
1145 \arg USART_FLAG_REA: receive enable acknowledge flag
1146 \arg USART_FLAG_EPERR: early parity error flag
1147 \arg USART_FLAG_RFE: receive FIFO empty flag
1148 \arg USART_FLAG_RFF: receive FIFO full flag
1149 \param[out] none
1150 \retval FlagStatus: SET or RESET
1151 */
usart_flag_get(uint32_t usart_periph,usart_flag_enum flag)1152 FlagStatus usart_flag_get(uint32_t usart_periph, usart_flag_enum flag)
1153 {
1154 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){
1155 return SET;
1156 }else{
1157 return RESET;
1158 }
1159 }
1160
1161 /*!
1162 \brief clear USART status
1163 \param[in] usart_periph: USARTx(x=0,1)
1164 \param[in] flag: flag type
1165 only one parameter can be selected which is shown as below:
1166 \arg USART_FLAG_PERR: parity error flag
1167 \arg USART_FLAG_FERR: frame error flag
1168 \arg USART_FLAG_NERR: noise detected flag
1169 \arg USART_FLAG_ORERR: overrun error flag
1170 \arg USART_FLAG_IDLE: idle line detected flag
1171 \arg USART_FLAG_TC: transmission complete flag
1172 \arg USART_FLAG_LBD: LIN break detected flag
1173 \arg USART_FLAG_CTSF: CTS change flag
1174 \arg USART_FLAG_RT: receiver timeout flag
1175 \arg USART_FLAG_EB: end of block flag
1176 \arg USART_FLAG_AM: address match flag
1177 \arg USART_FLAG_WU: wakeup from deep-sleep mode flag
1178 \arg USART_FLAG_EPERR: early parity error flag
1179 \param[out] none
1180 \retval none
1181 */
usart_flag_clear(uint32_t usart_periph,usart_flag_enum flag)1182 void usart_flag_clear(uint32_t usart_periph, usart_flag_enum flag)
1183 {
1184 USART_INTC(usart_periph) |= BIT(USART_BIT_POS(flag));
1185 }
1186
1187 /*!
1188 \brief enable USART interrupt
1189 \param[in] usart_periph: USARTx(x=0,1)
1190 \param[in] interrupt: interrupt
1191 only one parameter can be selected which is shown as below:
1192 \arg USART_INT_IDLE: idle interrupt
1193 \arg USART_INT_RBNE: read data buffer not empty interrupt and
1194 overrun error interrupt enable interrupt
1195 \arg USART_INT_TC: transmission complete interrupt
1196 \arg USART_INT_TBE: transmit data register empty interrupt
1197 \arg USART_INT_PERR: parity error interrupt
1198 \arg USART_INT_AM: address match interrupt
1199 \arg USART_INT_RT: receiver timeout interrupt
1200 \arg USART_INT_EB: end of block interrupt
1201 \arg USART_INT_LBD: LIN break detection interrupt
1202 \arg USART_INT_ERR: error interrupt enable in multibuffer communication
1203 \arg USART_INT_CTS: CTS interrupt
1204 \arg USART_INT_WU: wakeup from deep-sleep mode interrupt
1205 \arg USART_INT_RFF: receive FIFO full interrupt enable
1206 \param[out] none
1207 \retval none
1208 */
usart_interrupt_enable(uint32_t usart_periph,usart_interrupt_enum interrupt)1209 void usart_interrupt_enable(uint32_t usart_periph, usart_interrupt_enum interrupt)
1210 {
1211 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt));
1212 }
1213
1214 /*!
1215 \brief disable USART interrupt
1216 \param[in] usart_periph: USARTx(x=0,1)
1217 \param[in] interrupt: interrupt
1218 only one parameter can be selected which is shown as below:
1219 \arg USART_INT_IDLE: idle interrupt
1220 \arg USART_INT_RBNE: read data buffer not empty interrupt and
1221 overrun error interrupt
1222 \arg USART_INT_TC: transmission complete interrupt
1223 \arg USART_INT_TBE: transmit data register empty interrupt
1224 \arg USART_INT_PERR: parity error interrupt
1225 \arg USART_INT_AM: address match interrupt
1226 \arg USART_INT_RT: receiver timeout interrupt
1227 \arg USART_INT_EB: end of block interrupt
1228 \arg USART_INT_LBD: LIN break detection interrupt
1229 \arg USART_INT_ERR: error interrupt enable in multibuffer communication
1230 \arg USART_INT_CTS: CTS interrupt
1231 \arg USART_INT_WU: wakeup from deep-sleep mode interrupt
1232 \arg USART_INT_RFF: receive FIFO full interrupt enable
1233 \param[out] none
1234 \retval none
1235 */
usart_interrupt_disable(uint32_t usart_periph,usart_interrupt_enum interrupt)1236 void usart_interrupt_disable(uint32_t usart_periph, usart_interrupt_enum interrupt)
1237 {
1238 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt));
1239 }
1240
1241 /*!
1242 \brief get USART interrupt and flag status
1243 \param[in] usart_periph: USARTx(x=0,1)
1244 \param[in] int_flag: interrupt and flag type, refer to usart_interrupt_flag_enum
1245 only one parameter can be selected which is shown as below:
1246 \arg USART_INT_FLAG_EB: end of block interrupt and interrupt flag
1247 \arg USART_INT_FLAG_RT: receiver timeout interrupt flag
1248 \arg USART_INT_FLAG_AM: address match interrupt flag
1249 \arg USART_INT_FLAG_PERR: parity error interrupt flag
1250 \arg USART_INT_FLAG_TBE: transmitter buffer empty interrupt flag
1251 \arg USART_INT_FLAG_TC: transmission complete interrupt flag
1252 \arg USART_INT_FLAG_RBNE: read data buffer not empty interrupt flag
1253 \arg USART_INT_FLAG_RBNE_ORERR: overrun error interrupt flag
1254 \arg USART_INT_FLAG_IDLE: IDLE line detected interrupt flag
1255 \arg USART_INT_FLAG_LBD: LIN break detected interrupt flag
1256 \arg USART_INT_FLAG_WU: wakeup from deep-sleep mode interrupt flag
1257 \arg USART_INT_FLAG_CTS: CTS interrupt flag
1258 \arg USART_INT_FLAG_ERR_NERR: noise error interrupt flag
1259 \arg USART_INT_FLAG_ERR_ORERR: overrun error interrupt flag
1260 \arg USART_INT_FLAG_ERR_FERR: frame error interrupt flag
1261 \arg USART_INT_FLAG_RFFINT: receive FIFO full interrupt flag
1262 \param[out] none
1263 \retval FlagStatus: SET or RESET
1264 */
usart_interrupt_flag_get(uint32_t usart_periph,usart_interrupt_flag_enum int_flag)1265 FlagStatus usart_interrupt_flag_get(uint32_t usart_periph, usart_interrupt_flag_enum int_flag)
1266 {
1267 uint32_t intenable = 0U, flagstatus = 0U;
1268 /* get the interrupt enable bit status */
1269 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag)));
1270 /* get the corresponding flag bit status */
1271 flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag)));
1272
1273 if(flagstatus && intenable){
1274 return SET;
1275 }else{
1276 return RESET;
1277 }
1278 }
1279
1280 /*!
1281 \brief clear USART interrupt flag
1282 \param[in] usart_periph: USARTx(x=0,1)
1283 \param[in] flag: USART interrupt flag
1284 only one parameter can be selected which is shown as below:
1285 \arg USART_INT_FLAG_PERR: parity error interrupt flag
1286 \arg USART_INT_FLAG_ERR_FERR: frame error interrupt flag
1287 \arg USART_INT_FLAG_ERR_NERR: noise detected interrupt flag
1288 \arg USART_INT_FLAG_RBNE_ORERR: overrun error interrupt flag
1289 \arg USART_INT_FLAG_ERR_ORERR: overrun error interrupt flag
1290 \arg USART_INT_FLAG_IDLE: idle line detected interrupt flag
1291 \arg USART_INT_FLAG_TC: transmission complete interrupt flag
1292 \arg USART_INT_FLAG_LBD: LIN break detected interrupt flag
1293 \arg USART_INT_FLAG_CTS: CTS change interrupt flag
1294 \arg USART_INT_FLAG_RT: receiver timeout interrupt flag
1295 \arg USART_INT_FLAG_EB: end of block interrupt flag
1296 \arg USART_INT_FLAG_AM: address match interrupt flag
1297 \arg USART_INT_FLAG_WU: wakeup from deep-sleep mode interrupt flag
1298 \arg USART_INT_FLAG_RFFINT: receive FIFO full interrupt flag
1299 \param[out] none
1300 \retval none
1301 */
usart_interrupt_flag_clear(uint32_t usart_periph,usart_interrupt_flag_enum int_flag)1302 void usart_interrupt_flag_clear(uint32_t usart_periph, usart_interrupt_flag_enum int_flag)
1303 {
1304 if(USART_INT_FLAG_RFFINT == int_flag){
1305 USART_RFCS(usart_periph) &= (uint32_t)(~USART_RFCS_RFFINT);
1306 }else{
1307 USART_INTC(usart_periph) |= BIT(USART_BIT_POS2(int_flag));
1308 }
1309 }
1310