1 /*!
2 \file gd32a50x_rtc.c
3 \brief RTC driver
4
5 \version 2022-01-30, V1.0.0, firmware for GD32A50x
6 */
7
8 /*
9 Copyright (c) 2022, GigaDevice Semiconductor Inc.
10
11 Redistribution and use in source and binary forms, with or without modification,
12 are permitted provided that the following conditions are met:
13
14 1. Redistributions of source code must retain the above copyright notice, this
15 list of conditions and the following disclaimer.
16 2. Redistributions in binary form must reproduce the above copyright notice,
17 this list of conditions and the following disclaimer in the documentation
18 and/or other materials provided with the distribution.
19 3. Neither the name of the copyright holder nor the names of its contributors
20 may be used to endorse or promote products derived from this software without
21 specific prior written permission.
22
23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 OF SUCH DAMAGE.
33 */
34
35 #include "gd32a50x_rtc.h"
36
37 /*!
38 \brief enter RTC configuration mode
39 \param[in] none
40 \param[out] none
41 \retval none
42 */
rtc_configuration_mode_enter(void)43 void rtc_configuration_mode_enter(void)
44 {
45 RTC_CTL |= RTC_CTL_CMF;
46 }
47
48 /*!
49 \brief exit RTC configuration mode
50 \param[in] none
51 \param[out] none
52 \retval none
53 */
rtc_configuration_mode_exit(void)54 void rtc_configuration_mode_exit(void)
55 {
56 RTC_CTL &= ~RTC_CTL_CMF;
57 }
58
59 /*!
60 \brief wait RTC last write operation finished flag set
61 \param[in] none
62 \param[out] none
63 \retval none
64 */
rtc_lwoff_wait(void)65 void rtc_lwoff_wait(void)
66 {
67 /* loop until LWOFF flag is set */
68 while (0U == (RTC_CTL & RTC_CTL_LWOFF)){
69 }
70 }
71
72 /*!
73 \brief wait RTC registers synchronized flag set
74 \param[in] none
75 \param[out] none
76 \retval none
77 */
rtc_register_sync_wait(void)78 void rtc_register_sync_wait(void)
79 {
80 /* clear RSYNF flag */
81 RTC_CTL &= ~RTC_CTL_RSYNF;
82 /* loop until RSYNF flag is set */
83 while (0U == (RTC_CTL & RTC_CTL_RSYNF)){
84 }
85 }
86
87 /*!
88 \brief get RTC counter value
89 \param[in] none
90 \param[out] none
91 \retval RTC counter value
92 */
rtc_counter_get(void)93 uint32_t rtc_counter_get(void)
94 {
95 uint32_t temp = 0x0U;
96 temp = RTC_CNTL;
97 temp |= (RTC_CNTH << 16);
98 return temp;
99 }
100
101 /*!
102 \brief set RTC counter value
103 \param[in] cnt: RTC counter value
104 \param[out] none
105 \retval none
106 */
rtc_counter_set(uint32_t cnt)107 void rtc_counter_set(uint32_t cnt)
108 {
109 rtc_configuration_mode_enter();
110 /* set the RTC counter high bits */
111 RTC_CNTH = cnt >> 16;
112 /* set the RTC counter low bits */
113 RTC_CNTL = (cnt & RTC_LOW_VALUE);
114 rtc_configuration_mode_exit();
115 }
116
117 /*!
118 \brief set RTC prescaler value
119 \param[in] psc: RTC prescaler value
120 \param[out] none
121 \retval none
122 */
rtc_prescaler_set(uint32_t psc)123 void rtc_prescaler_set(uint32_t psc)
124 {
125 rtc_configuration_mode_enter();
126 /* set the RTC prescaler high bits */
127 RTC_PSCH = (psc & RTC_HIGH_VALUE) >> 16;
128 /* set the RTC prescaler low bits */
129 RTC_PSCL = (psc & RTC_LOW_VALUE);
130 rtc_configuration_mode_exit();
131 }
132
133 /*!
134 \brief set RTC alarm value
135 \param[in] alarm: RTC alarm value
136 \param[out] none
137 \retval none
138 */
rtc_alarm_config(uint32_t alarm)139 void rtc_alarm_config(uint32_t alarm)
140 {
141 rtc_configuration_mode_enter();
142 /* set the alarm high bits */
143 RTC_ALRMH = alarm >> 16;
144 /* set the alarm low bits */
145 RTC_ALRML = (alarm & RTC_LOW_VALUE);
146 rtc_configuration_mode_exit();
147 }
148
149 /*!
150 \brief get RTC divider value
151 \param[in] none
152 \param[out] none
153 \retval RTC divider value
154 */
rtc_divider_get(void)155 uint32_t rtc_divider_get(void)
156 {
157 uint32_t temp = 0x00U;
158 temp = (RTC_DIVH & RTC_DIVH_DIV) << 16;
159 temp |= RTC_DIVL;
160 return temp;
161 }
162
163 /*!
164 \brief enable RTC interrupt
165 \param[in] interrupt: specify which interrupt to enbale
166 \arg RTC_INT_SECOND: second interrupt
167 \arg RTC_INT_ALARM: alarm interrupt
168 \arg RTC_INT_OVERFLOW: overflow interrupt
169 \param[out] none
170 \retval none
171 */
rtc_interrupt_enable(uint32_t interrupt)172 void rtc_interrupt_enable(uint32_t interrupt)
173 {
174 RTC_INTEN |= interrupt;
175 }
176
177 /*!
178 \brief disable RTC interrupt
179 \param[in] interrupt: specify which interrupt to disbale
180 \arg RTC_INT_SECOND: second interrupt
181 \arg RTC_INT_ALARM: alarm interrupt
182 \arg RTC_INT_OVERFLOW: overflow interrupt
183 \param[out] none
184 \retval none
185 */
rtc_interrupt_disable(uint32_t interrupt)186 void rtc_interrupt_disable(uint32_t interrupt)
187 {
188 RTC_INTEN &= ~interrupt;
189 }
190
191 /*!
192 \brief get RTC flag status
193 \param[in] flag: specify which flag status to get
194 \arg RTC_FLAG_SECOND: second interrupt flag
195 \arg RTC_FLAG_ALARM: alarm interrupt flag
196 \arg RTC_FLAG_OVERFLOW: overflow interrupt flag
197 \arg RTC_FLAG_RSYN: registers synchronized flag
198 \arg RTC_FLAG_LWOF: last write operation finished flag
199 \param[out] none
200 \retval SET or RESET
201 */
rtc_flag_get(uint32_t flag)202 FlagStatus rtc_flag_get(uint32_t flag)
203 {
204 if(0U != (RTC_CTL & flag)){
205 return SET;
206 }else{
207 return RESET;
208 }
209 }
210
211 /*!
212 \brief clear RTC flag status
213 \param[in] flag: specify which flag status to clear
214 \arg RTC_FLAG_SECOND: second interrupt flag
215 \arg RTC_FLAG_ALARM: alarm interrupt flag
216 \arg RTC_FLAG_OVERFLOW: overflow interrupt flag
217 \arg RTC_FLAG_RSYN: registers synchronized flag
218 \param[out] none
219 \retval none
220 */
rtc_flag_clear(uint32_t flag)221 void rtc_flag_clear(uint32_t flag)
222 {
223 /* clear RTC flag */
224 RTC_CTL &= ~flag;
225 }
226
227 /*!
228 \brief get RTC interrupt flag status
229 \param[in] flag: specify which flag status to get
230 only one parameter can be selected which is shown as below:
231 \arg RTC_INT_FLAG_SECOND: second interrupt flag
232 \arg RTC_INT_FLAG_ALARM: alarm interrupt flag
233 \arg RTC_INT_FLAG_OVERFLOW: overflow interrupt flag
234 \param[out] none
235 \retval SET or RESET
236 */
rtc_interrupt_flag_get(uint32_t flag)237 FlagStatus rtc_interrupt_flag_get(uint32_t flag)
238 {
239 if(0U != (RTC_CTL & flag)){
240 return SET;
241 }else{
242 return RESET;
243 }
244 }
245
246 /*!
247 \brief clear RTC interrupt flag status
248 \param[in] flag: specify which flag status to clear
249 one or more parameters can be selected which are shown as below:
250 \arg RTC_INT_FLAG_SECOND: second interrupt flag
251 \arg RTC_INT_FLAG_ALARM: alarm interrupt flag
252 \arg RTC_INT_FLAG_OVERFLOW: overflow interrupt flag
253 \param[out] none
254 \retval none
255 */
rtc_interrupt_flag_clear(uint32_t flag)256 void rtc_interrupt_flag_clear(uint32_t flag)
257 {
258 /* clear RTC interrupt flag */
259 RTC_CTL &= ~flag;
260 }
261
