1 /*!
2     \file    gd32a50x_dbg.c
3     \brief   DBG driver
4 
5     \version 2022-01-30, V1.0.0, firmware for GD32A50x
6 */
7 
8 /*
9     Copyright (c) 2022, GigaDevice Semiconductor Inc.
10 
11     Redistribution and use in source and binary forms, with or without modification,
12 are permitted provided that the following conditions are met:
13 
14     1. Redistributions of source code must retain the above copyright notice, this
15        list of conditions and the following disclaimer.
16     2. Redistributions in binary form must reproduce the above copyright notice,
17        this list of conditions and the following disclaimer in the documentation
18        and/or other materials provided with the distribution.
19     3. Neither the name of the copyright holder nor the names of its contributors
20        may be used to endorse or promote products derived from this software without
21        specific prior written permission.
22 
23     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 OF SUCH DAMAGE.
33 */
34 
35 #include "gd32a50x_dbg.h"
36 
37 #define DBG_RESET_VAL       ((uint32_t)0x00000000U)   /*!< DBG reset value */
38 
39 /*!
40     \brief      deinitialize the DBG
41     \param[in]  none
42     \param[out] none
43     \retval     none
44 */
dbg_deinit(void)45 void dbg_deinit(void)
46 {
47     DBG_CTL = DBG_RESET_VAL;
48 }
49 
50 /*!
51     \brief      read DBG_ID code register
52     \param[in]  none
53     \param[out] none
54     \retval     DBG_ID code
55 */
dbg_id_get(void)56 uint32_t dbg_id_get(void)
57 {
58     return DBG_ID;
59 }
60 
61 /*!
62     \brief      enable low power behavior when the mcu is in debug mode
63     \param[in]  dbg_low_power:
64                 one or more parameters can be selected which are shown as below:
65       \arg        DBG_LOW_POWER_SLEEP: keep debugger connection during sleep mode
66       \arg        DBG_LOW_POWER_DEEPSLEEP: keep debugger connection during deepsleep mode
67       \arg        DBG_LOW_POWER_STANDBY: keep debugger connection during standby mode
68     \param[out] none
69     \retval     none
70 */
dbg_low_power_enable(uint32_t dbg_low_power)71 void dbg_low_power_enable(uint32_t dbg_low_power)
72 {
73     DBG_CTL |= dbg_low_power;
74 }
75 
76 /*!
77     \brief      disable low power behavior when the mcu is in debug mode
78     \param[in]  dbg_low_power:
79                 one or more parameters can be selected which are shown as below:
80       \arg        DBG_LOW_POWER_SLEEP: do not keep debugger connection during sleep mode
81       \arg        DBG_LOW_POWER_DEEPSLEEP: do not keep debugger connection during deepsleep mode
82       \arg        DBG_LOW_POWER_STANDBY: do not keep debugger connection during standby mode
83     \param[out] none
84     \retval     none
85 */
dbg_low_power_disable(uint32_t dbg_low_power)86 void dbg_low_power_disable(uint32_t dbg_low_power)
87 {
88     DBG_CTL &= ~dbg_low_power;
89 }
90 
91 /*!
92     \brief      enable peripheral behavior when the mcu is in debug mode
93     \param[in]  dbg_periph: refer to dbg_periph_enum
94                 only one parameter can be selected which is shown as below:
95       \arg        DBG_FWDGT_HOLD : hold FWDGT counter when core is halted
96       \arg        DBG_WWDGT_HOLD : hold WWDGT counter when core is halted
97       \arg        DBG_I2Cx_HOLD (x=0,1): hold I2Cx smbus timeout when core is halted
98       \arg        DBG_TIMERx_HOLD (x=0,1,5,6,7,19,20): hold TIMERx counter when core is halted
99       \arg        DBG_MFCOM_HOLD : hold MFCOM counter when core is halted
100       \arg        DBG_CANx_HOLD (x=0,1): hold CANx counter when core is halted
101     \param[out] none
102     \retval     none
103 */
dbg_periph_enable(dbg_periph_enum dbg_periph)104 void dbg_periph_enable(dbg_periph_enum dbg_periph)
105 {
106     DBG_REG_VAL(dbg_periph) |= BIT(DBG_BIT_POS(dbg_periph));
107 }
108 
109 /*!
110     \brief      disable peripheral behavior when the mcu is in debug mode
111     \param[in]  dbg_periph: refer to dbg_periph_enum
112                 only one parameter can be selected which is shown as below:
113       \arg        DBG_FWDGT_HOLD : hold FWDGT counter when core is halted
114       \arg        DBG_WWDGT_HOLD : hold WWDGT counter when core is halted
115       \arg        DBG_I2Cx_HOLD (x=0,1): hold I2Cx smbus timeout when core is halted
116       \arg        DBG_TIMERx_HOLD (x=0,1,5,6,7,19,20): hold TIMERx counter when core is halted
117       \arg        DBG_MFCOM_HOLD : hold MFCOM counter when core is halted
118       \arg        DBG_CANx_HOLD (x=0,1): hold CANx counter when core is halted
119     \param[out] none
120     \retval     none
121 */
dbg_periph_disable(dbg_periph_enum dbg_periph)122 void dbg_periph_disable(dbg_periph_enum dbg_periph)
123 {
124     DBG_REG_VAL(dbg_periph) &= ~BIT(DBG_BIT_POS(dbg_periph));
125 }
126 
127