1 /*! 2 \file gd32fxxx_dac.h 3 \brief definitions for the DAC 4 5 \version 2022-01-30, V1.0.0, firmware for GD32A50x 6 */ 7 8 /* 9 Copyright (c) 2022, GigaDevice Semiconductor Inc. 10 11 Redistribution and use in source and binary forms, with or without modification, 12 are permitted provided that the following conditions are met: 13 14 1. Redistributions of source code must retain the above copyright notice, this 15 list of conditions and the following disclaimer. 16 2. Redistributions in binary form must reproduce the above copyright notice, 17 this list of conditions and the following disclaimer in the documentation 18 and/or other materials provided with the distribution. 19 3. Neither the name of the copyright holder nor the names of its contributors 20 may be used to endorse or promote products derived from this software without 21 specific prior written permission. 22 23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 32 OF SUCH DAMAGE. 33 */ 34 35 #ifndef GD32A50X_DAC_H 36 #define GD32A50X_DAC_H 37 38 #include "gd32a50x.h" 39 40 /* DAC definitions */ 41 #define DAC DAC_BASE /*!< DAC base address */ 42 43 /* registers definitions */ 44 #define DAC_CTL REG32(DAC + 0x00000000U) /*!< DAC control register */ 45 #define DAC_SWT REG32(DAC + 0x00000004U) /*!< DAC software trigger register */ 46 #define OUT_R12DH REG32(DAC + 0x00000008U) /*!< DAC_OUT 12-bit right-aligned data holding register */ 47 #define OUT_L12DH REG32(DAC + 0x0000000CU) /*!< DAC_OUT 12-bit left-aligned data holding register */ 48 #define OUT_R8DH REG32(DAC + 0x00000010U) /*!< DAC_OUT 8-bit right-aligned data holding register */ 49 #define OUT_DO REG32(DAC + 0x00000014U) /*!< DAC_OUT data output register */ 50 #define DAC_STAT REG32(DAC + 0x00000018U) /*!< DAC status register */ 51 52 /* bits definitions */ 53 /* DAC_CTL */ 54 #define DAC_CTL_DEN BIT(0) /*!< DAC_OUT enable/disable bit */ 55 #define DAC_CTL_DBOFF BIT(1) /*!< DAC_OUT output buffer turn on/turn off bit */ 56 #define DAC_CTL_DTEN BIT(2) /*!< DAC_OUT trigger enable/disable bit */ 57 #define DAC_CTL_DTSEL BITS(3,4) /*!< DAC_OUT trigger source selection enable/disable bits */ 58 #define DAC_CTL_DWM BITS(6,7) /*!< DAC_OUT noise wave mode */ 59 #define DAC_CTL_DWBW BITS(8,11) /*!< DAC_OUT noise wave bit width */ 60 #define DAC_CTL_DDMAEN BIT(12) /*!< DAC_OUT DMA enable/disable bit */ 61 #define DAC_CTL_DDUDRIE BIT(13) /*!< DAC_OUT DMA underrun interrupt enable/disable bit */ 62 #define DAC_CTL_DDISC BIT(14) 63 64 /* DAC_SWT */ 65 #define DAC_SWT_SWTR BIT(0) /*!< DAC_OUT software trigger bit, cleared by hardware */ 66 67 /* OUT_R12DH */ 68 #define OUT_R12DH_OUT_DH BITS(0,11) /*!< DAC_OUT 12-bit right-aligned data bits */ 69 70 /* OUT_L12DH */ 71 #define OUT_L12DH_OUT_DH BITS(4,15) /*!< DAC_OUT 12-bit left-aligned data bits */ 72 73 /* OUT_R8DH */ 74 #define OUT_R8DH_OUT_DH BITS(0,7) /*!< DAC_OUT 8-bit right-aligned data bits */ 75 76 /* OUT_DO */ 77 #define OUT_DO_OUT_DO BITS(0,11) /*!< DAC_OUT 12-bit output data bits */ 78 79 /* DAC_STAT0 */ 80 #define DAC_STAT_DDUDR BIT(13) /*!< DAC_OUT DMA underrun flag */ 81 82 /* constants definitions */ 83 /* DAC trigger source */ 84 #define CTL_DTSEL(regval) (BITS(3,4) & ((uint32_t)(regval) << 3)) 85 #define DAC_TRIGGER_EXTRIG CTL_DTSEL(0) /*!< external trigger source */ 86 #define DAC_TRIGGER_SOFTWARE CTL_DTSEL(1) /*!< software trigger */ 87 88 /* DAC noise wave mode */ 89 #define CTL_DWM(regval) (BITS(6,7) & ((uint32_t)(regval) << 6)) 90 #define DAC_WAVE_DISABLE CTL_DWM(0) /*!< wave disable */ 91 #define DAC_WAVE_MODE_LFSR CTL_DWM(1) /*!< LFSR noise mode */ 92 #define DAC_WAVE_MODE_TRIANGLE CTL_DWM(2) /*!< triangle noise mode */ 93 94 /* DAC noise wave bit width */ 95 #define DWBW(regval) (BITS(8,11) & ((uint32_t)(regval) << 8)) 96 #define DAC_WAVE_BIT_WIDTH_1 DWBW(0) /*!< bit width of the wave signal is 1 */ 97 #define DAC_WAVE_BIT_WIDTH_2 DWBW(1) /*!< bit width of the wave signal is 2 */ 98 #define DAC_WAVE_BIT_WIDTH_3 DWBW(2) /*!< bit width of the wave signal is 3 */ 99 #define DAC_WAVE_BIT_WIDTH_4 DWBW(3) /*!< bit width of the wave signal is 4 */ 100 #define DAC_WAVE_BIT_WIDTH_5 DWBW(4) /*!< bit width of the wave signal is 5 */ 101 #define DAC_WAVE_BIT_WIDTH_6 DWBW(5) /*!< bit width of the wave signal is 6 */ 102 #define DAC_WAVE_BIT_WIDTH_7 DWBW(6) /*!< bit width of the wave signal is 7 */ 103 #define DAC_WAVE_BIT_WIDTH_8 DWBW(7) /*!< bit width of the wave signal is 8 */ 104 #define DAC_WAVE_BIT_WIDTH_9 DWBW(8) /*!< bit width of the wave signal is 9 */ 105 #define DAC_WAVE_BIT_WIDTH_10 DWBW(9) /*!< bit width of the wave signal is 10 */ 106 #define DAC_WAVE_BIT_WIDTH_11 DWBW(10) /*!< bit width of the wave signal is 11 */ 107 #define DAC_WAVE_BIT_WIDTH_12 DWBW(11) /*!< bit width of the wave signal is 12 */ 108 109 /* unmask LFSR bits in DAC LFSR noise mode */ 110 #define DAC_LFSR_BIT0 DAC_WAVE_BIT_WIDTH_1 /*!< unmask the LFSR bit0 */ 111 #define DAC_LFSR_BITS1_0 DAC_WAVE_BIT_WIDTH_2 /*!< unmask the LFSR bits[1:0] */ 112 #define DAC_LFSR_BITS2_0 DAC_WAVE_BIT_WIDTH_3 /*!< unmask the LFSR bits[2:0] */ 113 #define DAC_LFSR_BITS3_0 DAC_WAVE_BIT_WIDTH_4 /*!< unmask the LFSR bits[3:0] */ 114 #define DAC_LFSR_BITS4_0 DAC_WAVE_BIT_WIDTH_5 /*!< unmask the LFSR bits[4:0] */ 115 #define DAC_LFSR_BITS5_0 DAC_WAVE_BIT_WIDTH_6 /*!< unmask the LFSR bits[5:0] */ 116 #define DAC_LFSR_BITS6_0 DAC_WAVE_BIT_WIDTH_7 /*!< unmask the LFSR bits[6:0] */ 117 #define DAC_LFSR_BITS7_0 DAC_WAVE_BIT_WIDTH_8 /*!< unmask the LFSR bits[7:0] */ 118 #define DAC_LFSR_BITS8_0 DAC_WAVE_BIT_WIDTH_9 /*!< unmask the LFSR bits[8:0] */ 119 #define DAC_LFSR_BITS9_0 DAC_WAVE_BIT_WIDTH_10 /*!< unmask the LFSR bits[9:0] */ 120 #define DAC_LFSR_BITS10_0 DAC_WAVE_BIT_WIDTH_11 /*!< unmask the LFSR bits[10:0] */ 121 #define DAC_LFSR_BITS11_0 DAC_WAVE_BIT_WIDTH_12 /*!< unmask the LFSR bits[11:0] */ 122 123 /* DAC data alignment */ 124 #define DATA_ALIGN(regval) (BITS(0,1) & ((uint32_t)(regval) << 0)) 125 #define DAC_ALIGN_12B_R DATA_ALIGN(0) /*!< 12-bit right-aligned data */ 126 #define DAC_ALIGN_12B_L DATA_ALIGN(1) /*!< 12-bit left-aligned data */ 127 #define DAC_ALIGN_8B_R DATA_ALIGN(2) /*!< 8-bit right-aligned data */ 128 129 /* triangle amplitude in DAC triangle noise mode */ 130 #define DAC_TRIANGLE_AMPLITUDE_1 DAC_WAVE_BIT_WIDTH_1 /*!< triangle amplitude is 1 */ 131 #define DAC_TRIANGLE_AMPLITUDE_3 DAC_WAVE_BIT_WIDTH_2 /*!< triangle amplitude is 3 */ 132 #define DAC_TRIANGLE_AMPLITUDE_7 DAC_WAVE_BIT_WIDTH_3 /*!< triangle amplitude is 7 */ 133 #define DAC_TRIANGLE_AMPLITUDE_15 DAC_WAVE_BIT_WIDTH_4 /*!< triangle amplitude is 15 */ 134 #define DAC_TRIANGLE_AMPLITUDE_31 DAC_WAVE_BIT_WIDTH_5 /*!< triangle amplitude is 31 */ 135 #define DAC_TRIANGLE_AMPLITUDE_63 DAC_WAVE_BIT_WIDTH_6 /*!< triangle amplitude is 63 */ 136 #define DAC_TRIANGLE_AMPLITUDE_127 DAC_WAVE_BIT_WIDTH_7 /*!< triangle amplitude is 127 */ 137 #define DAC_TRIANGLE_AMPLITUDE_255 DAC_WAVE_BIT_WIDTH_8 /*!< triangle amplitude is 255 */ 138 #define DAC_TRIANGLE_AMPLITUDE_511 DAC_WAVE_BIT_WIDTH_9 /*!< triangle amplitude is 511 */ 139 #define DAC_TRIANGLE_AMPLITUDE_1023 DAC_WAVE_BIT_WIDTH_10 /*!< triangle amplitude is 1023 */ 140 #define DAC_TRIANGLE_AMPLITUDE_2047 DAC_WAVE_BIT_WIDTH_11 /*!< triangle amplitude is 2047 */ 141 #define DAC_TRIANGLE_AMPLITUDE_4095 DAC_WAVE_BIT_WIDTH_12 /*!< triangle amplitude is 4095 */ 142 143 144 /* DAC interrupt */ 145 #define DAC_INT_DDUDRIE DAC_CTL_DDUDRIE /*!< DAC_OUT DMA underrun interrupt enable */ 146 147 /* DAC interrupt flag */ 148 #define DAC_INT_FLAG_DDUDR DAC_STAT_DDUDR /*!< DAC_OUT DMA underrun interrupt flag */ 149 150 /* DAC flag */ 151 #define DAC_FLAG_DDUDR DAC_STAT_DDUDR /*!< DAC_OUT DMA underrun flag */ 152 153 /* function declarations */ 154 /* initialization functions */ 155 /* deinitialize DAC */ 156 void dac_deinit(void); 157 /* enable DAC */ 158 void dac_enable(void); 159 /* disable DAC */ 160 void dac_disable(void); 161 /* enable DAC DMA */ 162 void dac_dma_enable(void); 163 /* disable DAC DMA */ 164 void dac_dma_disable(void); 165 /* enable DAC output buffer */ 166 void dac_output_buffer_enable(void); 167 /* disable DAC output buffer */ 168 void dac_output_buffer_disable(void); 169 /* get DAC output value */ 170 uint16_t dac_output_value_get(void); 171 /* set DAC data holding register value */ 172 void dac_data_set(uint32_t dac_align, uint16_t data); 173 174 /* DAC trigger configuration */ 175 /* enable DAC trigger */ 176 void dac_trigger_enable(void); 177 /* disable DAC trigger */ 178 void dac_trigger_disable(void); 179 /* configure DAC trigger source */ 180 void dac_trigger_source_config(uint32_t triggersource); 181 /* enable DAC software trigger */ 182 void dac_software_trigger_enable(void); 183 /* disable DAC software trigger */ 184 void dac_software_trigger_disable(void); 185 186 /* DAC wave mode configuration */ 187 /* configure DAC wave mode */ 188 void dac_wave_mode_config(uint32_t wave_mode); 189 /* configure DAC wave bit width */ 190 void dac_wave_bit_width_config(uint32_t bit_width); 191 /* configure DAC LFSR noise mode */ 192 void dac_lfsr_noise_config(uint32_t unmask_bits); 193 /* configure DAC triangle noise mode */ 194 void dac_triangle_noise_config(uint32_t amplitude); 195 196 /* interrupt and flag functions */ 197 /* get DAC flag */ 198 FlagStatus dac_flag_get(uint32_t flag); 199 /* clear DAC flag */ 200 void dac_flag_clear(uint32_t flag); 201 /* enable DAC interrupt */ 202 void dac_interrupt_enable(uint32_t interrupt); 203 /* disable DAC interrupt */ 204 void dac_interrupt_disable(uint32_t interrupt); 205 /* get DAC interrupt flag */ 206 FlagStatus dac_interrupt_flag_get(uint32_t int_flag); 207 /* clear DAC interrupt flag */ 208 void dac_interrupt_flag_clear(uint32_t int_flag); 209 210 #endif /* GD32A50X_DAC_H */ 211
