1 /*! 2 \file gd32a50x_bkp.h 3 \brief definitions for the BKP 4 5 \version 2022-01-30, V1.0.0, firmware for GD32A50x 6 */ 7 8 /* 9 Copyright (c) 2022, GigaDevice Semiconductor Inc. 10 11 Redistribution and use in source and binary forms, with or without modification, 12 are permitted provided that the following conditions are met: 13 14 1. Redistributions of source code must retain the above copyright notice, this 15 list of conditions and the following disclaimer. 16 2. Redistributions in binary form must reproduce the above copyright notice, 17 this list of conditions and the following disclaimer in the documentation 18 and/or other materials provided with the distribution. 19 3. Neither the name of the copyright holder nor the names of its contributors 20 may be used to endorse or promote products derived from this software without 21 specific prior written permission. 22 23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 32 OF SUCH DAMAGE. 33 */ 34 35 #ifndef GD32A50X_BKP_H 36 #define GD32A50X_BKP_H 37 38 #include "gd32a50x.h" 39 40 /* BKP definitions */ 41 #define BKP BKP_BASE /*!< BKP base address */ 42 43 /* registers definitions */ 44 #define BKP_DATA0 REG16((BKP) + 0x0004U) /*!< BKP data register 0 */ 45 #define BKP_DATA1 REG16((BKP) + 0x0008U) /*!< BKP data register 1 */ 46 #define BKP_DATA2 REG16((BKP) + 0x000CU) /*!< BKP data register 2 */ 47 #define BKP_DATA3 REG16((BKP) + 0x0010U) /*!< BKP data register 3 */ 48 #define BKP_DATA4 REG16((BKP) + 0x0014U) /*!< BKP data register 4 */ 49 #define BKP_DATA5 REG16((BKP) + 0x0018U) /*!< BKP data register 5 */ 50 #define BKP_DATA6 REG16((BKP) + 0x001CU) /*!< BKP data register 6 */ 51 #define BKP_DATA7 REG16((BKP) + 0x0020U) /*!< BKP data register 7 */ 52 #define BKP_DATA8 REG16((BKP) + 0x0024U) /*!< BKP data register 8 */ 53 #define BKP_DATA9 REG16((BKP) + 0x0028U) /*!< BKP data register 9 */ 54 #define BKP_OCTL REG16((BKP) + 0x002CU) /*!< RTC signal output control register */ 55 #define BKP_TPCTL REG16((BKP) + 0x0030U) /*!< tamper pin control register */ 56 #define BKP_TPCS REG16((BKP) + 0x0034U) /*!< tamper control and status register */ 57 58 /* bits definitions */ 59 /* BKP_DATA */ 60 #define BKP_DATA BITS(0,15) /*!< backup data */ 61 62 /* BKP_OCTL */ 63 #define BKP_OCTL_RCCV BITS(0,6) /*!< RTC clock calibration value */ 64 #define BKP_OCTL_COEN BIT(7) /*!< RTC clock calibration output enable */ 65 #define BKP_OCTL_ASOEN BIT(8) /*!< RTC alarm or second signal output enable */ 66 #define BKP_OCTL_ROSEL BIT(9) /*!< RTC output selection */ 67 #define BKP_OCTL_CCOSEL BIT(14) /*!< RTC clock output selection */ 68 #define BKP_OCTL_CALDIR BIT(15) /*!< RTC clock calibration direction */ 69 70 /* BKP_TPCTL */ 71 #define BKP_TPCTL_TPEN BIT(0) /*!< tamper detection enable */ 72 #define BKP_TPCTL_TPAL BIT(1) /*!< tamper pin active level */ 73 #define BKP_TPCTL_PCSEL BIT(15) /*!< OSC32IN pin select */ 74 75 /* BKP_TPCS */ 76 #define BKP_TPCS_TER BIT(0) /*!< tamper event reset */ 77 #define BKP_TPCS_TIR BIT(1) /*!< tamper interrupt reset */ 78 #define BKP_TPCS_TPIE BIT(2) /*!< tamper interrupt enable */ 79 #define BKP_TPCS_TEF BIT(8) /*!< tamper event flag */ 80 #define BKP_TPCS_TIF BIT(9) /*!< tamper interrupt flag */ 81 82 /* constants definitions */ 83 /* BKP register */ 84 #define BKP_DATA0_9(number) REG16((BKP) + 0x04U + (number) * 0x04U) 85 86 /* get data of BKP data register */ 87 #define BKP_DATA_GET(regval) GET_BITS((uint32_t)(regval), 0, 15) 88 89 /* RTC clock calibration value */ 90 #define OCTL_RCCV(regval) (BITS(0,6) & (uint32_t)(regval)) 91 92 /* RTC output selection */ 93 #define RTC_OUTPUT_ALARM_PULSE ((uint16_t)0x0000U) /*!< RTC alarm pulse is selected as the RTC output */ 94 #define RTC_OUTPUT_SECOND_PULSE ((uint16_t)0x0200U) /*!< RTC second pulse is selected as the RTC output */ 95 96 /* RTC clock output selection */ 97 #define RTC_CLOCK_DIV_64 ((uint16_t)0x0000U) /*!< RTC clock div 64 */ 98 #define RTC_CLOCK_DIV_1 ((uint16_t)0x4000U) /*!< RTC clock div 1 */ 99 100 /* RTC clock calibration direction */ 101 #define RTC_CLOCK_SLOWED_DOWN ((uint16_t)0x0000U) /*!< RTC clock slow down */ 102 #define RTC_CLOCK_SPEED_UP ((uint16_t)0x8000U) /*!< RTC clock speed up */ 103 104 /* OSC32IN pin select */ 105 #define OSC32IN_PC13 ((uint16_t)0x0000U) /*!< OSC32IN pin is PC13 */ 106 #define OSC32IN_PC14 ((uint16_t)0x8000U) /*!< OSC32IN pin is PC14 */ 107 108 /* tamper pin active level */ 109 #define TAMPER_PIN_ACTIVE_HIGH ((uint16_t)0x0000U) /*!< the tamper pin is active high */ 110 #define TAMPER_PIN_ACTIVE_LOW ((uint16_t)0x0002U) /*!< the tamper pin is active low */ 111 112 /* tamper flag */ 113 #define BKP_FLAG_TAMPER BKP_TPCS_TEF /*!< tamper event flag */ 114 115 /* tamper interrupt flag */ 116 #define BKP_INT_FLAG_TAMPER BKP_TPCS_TIF /*!< tamper interrupt flag */ 117 118 /* BKP data register number */ 119 typedef enum 120 { 121 BKP_DATA_0 = 1, /*!< BKP data register 0 */ 122 BKP_DATA_1, /*!< BKP data register 1 */ 123 BKP_DATA_2, /*!< BKP data register 2 */ 124 BKP_DATA_3, /*!< BKP data register 3 */ 125 BKP_DATA_4, /*!< BKP data register 4 */ 126 BKP_DATA_5, /*!< BKP data register 5 */ 127 BKP_DATA_6, /*!< BKP data register 6 */ 128 BKP_DATA_7, /*!< BKP data register 7 */ 129 BKP_DATA_8, /*!< BKP data register 8 */ 130 BKP_DATA_9, /*!< BKP data register 9 */ 131 }bkp_data_register_enum; 132 133 /* function declarations */ 134 /* reset BKP registers */ 135 void bkp_deinit(void); 136 /* write BKP data register */ 137 void bkp_data_write(bkp_data_register_enum register_number, uint16_t data); 138 /* read BKP data register */ 139 uint16_t bkp_data_read(bkp_data_register_enum register_number); 140 141 /* RTC related functions */ 142 /* enable RTC clock calibration output */ 143 void bkp_rtc_calibration_output_enable(void); 144 /* disable RTC clock calibration output */ 145 void bkp_rtc_calibration_output_disable(void); 146 /* enable RTC alarm or second signal output */ 147 void bkp_rtc_signal_output_enable(void); 148 /* disable RTC alarm or second signal output */ 149 void bkp_rtc_signal_output_disable(void); 150 /* select RTC output */ 151 void bkp_rtc_output_select(uint16_t outputsel); 152 /* select RTC clock output */ 153 void bkp_rtc_clock_output_select(uint16_t clocksel); 154 /* RTC clock calibration direction */ 155 void bkp_rtc_clock_calibration_direction(uint16_t direction); 156 /* set RTC clock calibration value */ 157 void bkp_rtc_calibration_value_set(uint8_t value); 158 159 /* select OSC32IN pin */ 160 void bkp_osc32in_pin_select(uint16_t inputpin); 161 162 /* tamper pin related functions */ 163 /* enable tamper pin detection */ 164 void bkp_tamper_detection_enable(void); 165 /* disable tamper pin detection */ 166 void bkp_tamper_detection_disable(void); 167 /* set tamper pin active level */ 168 void bkp_tamper_active_level_set(uint16_t level); 169 /* enable tamper pin interrupt */ 170 void bkp_tamper_interrupt_enable(void); 171 /* disable tamper pin interrupt */ 172 void bkp_tamper_interrupt_disable(void); 173 174 /* flag functions */ 175 /* get BKP flag state */ 176 FlagStatus bkp_flag_get(uint16_t flag); 177 /* clear BKP flag state */ 178 void bkp_flag_clear(uint16_t flag); 179 /* get BKP interrupt flag state */ 180 FlagStatus bkp_interrupt_flag_get(uint16_t flag); 181 /* clear BKP interrupt flag state */ 182 void bkp_interrupt_flag_clear(uint16_t flag); 183 184 #endif /* GD32A50X_BKP_H */ 185
