1 /* 2 * SPDX-FileCopyrightText: Copyright 2019-2024 Arm Limited and/or its affiliates <open-source-office@arm.com> 3 * SPDX-License-Identifier: Apache-2.0 4 * 5 * Licensed under the Apache License, Version 2.0 (the License); you may 6 * not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #ifndef ETHOSU_DEVICE_H 19 #define ETHOSU_DEVICE_H 20 21 /****************************************************************************** 22 * Includes 23 ******************************************************************************/ 24 #include "ethosu_types.h" 25 26 #include <stdbool.h> 27 #include <stdint.h> 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 /****************************************************************************** 34 * Prototypes 35 ******************************************************************************/ 36 37 /** 38 * Initialize the device. 39 */ 40 bool ethosu_dev_init(struct ethosu_device *dev, void *base_address, uint32_t secure_enable, uint32_t privilege_enable); 41 42 /** 43 * Initialize AXI settings for device. 44 */ 45 enum ethosu_error_codes ethosu_dev_axi_init(struct ethosu_device *dev); 46 47 /** 48 * Execute a given command stream on NPU. 49 * \param[in] cmd_stream_ptr Pointer to the command stream 50 * \param[in] cms_length Command stream length 51 * \param[in] base_addr Pointer to array of base addresses 52 * - 0: weight tensor 53 * - 1: scratch tensor 54 * - All input tensors 55 * - All output tensors 56 * \param[in] num_base_addr Number of base addresses. 57 */ 58 void ethosu_dev_run_command_stream(struct ethosu_device *dev, 59 const uint8_t *cmd_stream_ptr, 60 uint32_t cms_length, 61 const uint64_t *base_addr, 62 int num_base_addr); 63 64 /** 65 * Print information on NPU error status 66 */ 67 void ethosu_dev_print_err_status(struct ethosu_device *dev); 68 69 /** 70 * Interrupt handler on device layer 71 * \return true if NPU status is OK, otherwise false 72 */ 73 bool ethosu_dev_handle_interrupt(struct ethosu_device *dev); 74 75 /** 76 * Get hardware information from NPU 77 * \param[out] hwinfo Pointer to the hardware info struct to be filled in. 78 */ 79 void ethosu_dev_get_hw_info(struct ethosu_device *dev, struct ethosu_hw_info *hwinfo); 80 81 /** 82 * Verify that requested security state and privilege mode are active 83 * \return 32 bit status value 84 */ 85 bool ethosu_dev_verify_access_state(struct ethosu_device *dev); 86 87 /** 88 * Performs a NPU soft reset and waits for the NPU to become ready 89 * \return \ref ethosu_error_codes 90 */ 91 enum ethosu_error_codes ethosu_dev_soft_reset(struct ethosu_device *dev); 92 93 /** 94 * Enable/disable clock and power using clock/power q interface. 95 * \param[in] clock_q Clock q ENABLE/DISABLE \ref clock_q_request. 96 * \param[in] power_q Power q ENABLE/DISABLE \ref power_q_request. 97 * \return \ref ethosu_error_codes 98 */ 99 enum ethosu_error_codes ethosu_dev_set_clock_and_power(struct ethosu_device *dev, 100 enum ethosu_clock_q_request clock_q, 101 enum ethosu_power_q_request power_q); 102 103 /** 104 * Verifies that optimizer parameters from model are compatible with the hardware 105 * \param[in] cfg Config data from optimizer. 106 * \param[in] id Id data from optimizer. 107 * \return true if parameters match with hardware, false otherwise. 108 */ 109 bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_in, uint32_t id_in); 110 111 #ifdef __cplusplus 112 } 113 #endif 114 115 #endif // ETHOSU_DEVICE_H 116