1VER_NO: 897499b0349a608b895d467abbcf006b 2EFUSES: 3 WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 8, start : 0, type : 'uint:8', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: 'EFUSE_RD_WR_DIS_REG[7:0]', bloc: B0} 4 RESERVED_0_8 : {show: n, blk : 0, word: 0, pos : 8, len : 24, start : 8, type : 'uint:24', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: '', rloc: 'EFUSE_RD_WR_DIS_REG[31:8]', bloc: 'B1,B2,B3'} 5 RD_DIS : {show: y, blk : 0, word: 1, pos : 0, len : 2, start : 32, type : 'uint:2', wr_dis : 0, rd_dis: null, alt : '', dict : '', desc: Disable reading from BlOCK3, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[1:0]', bloc: 'B1[1:0]'} 6 WDT_DELAY_SEL : {show: y, blk : 0, word: 1, pos : 2, len : 2, start : 34, type : 'uint:2', wr_dis : 1, rd_dis: null, alt : '', dict: '{0: "40000", 1: "80000", 2: "160000", 3: "320000"}', desc: RTC watchdog timeout threshold; in unit of slow clock cycle, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[3:2]', bloc: 'B1[3:2]'} 7 DIS_PAD_JTAG : {show: y, blk : 0, word: 1, pos : 4, len : 1, start : 36, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable pad jtag, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[4]', bloc: 'B1[4]'} 8 DIS_DOWNLOAD_ICACHE : {show: y, blk : 0, word: 1, pos : 5, len : 1, start : 37, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: The bit be set to disable icache in download mode, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[5]', bloc: 'B1[5]'} 9 DIS_DOWNLOAD_MANUAL_ENCRYPT: {show: y, blk : 0, word: 1, pos : 6, len : 1, start : 38, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: The bit be set to disable manual encryption, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6]', bloc: 'B1[6]'} 10 SPI_BOOT_CRYPT_CNT : {show: y, blk : 0, word: 1, pos : 7, len : 3, start : 39, type : 'uint:3', wr_dis : 2, rd_dis: null, alt : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: Enables flash encryption when 1 or 3 bits are set and disables otherwise, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9:7]', bloc: 'B1[7],B2[1:0]'} 11 XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 1, pos: 10, len : 1, start : 42, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict: '{0: "128 bits key", 1: "256 bits key"}', desc: Flash encryption key length, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B2[2]'} 12 UART_PRINT_CONTROL : {show: y, blk : 0, word: 1, pos: 11, len : 2, start : 43, type : 'uint:2', wr_dis : 3, rd_dis: null, alt : '', dict: '{0: "Enable", 1: "Enable when GPIO8 is low at reset", 2: "Enable when GPIO8 is high at reset", 3: "Disable"}', desc: Set the default UARTboot message output mode, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12:11]', bloc: 'B2[4:3]'} 13 FORCE_SEND_RESUME : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: Set this bit to force ROM code to send a resume command during SPI boot, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B2[5]'} 14 DIS_DOWNLOAD_MODE : {show: y, blk : 0, word: 1, pos: 14, len : 1, start : 46, type : bool, wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: 'Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 4; 5; 6; 7)', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B2[6]'} 15 DIS_DIRECT_BOOT : {show: y, blk : 0, word: 1, pos: 15, len : 1, start : 47, type : bool, wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: This bit set means disable direct_boot mode, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B2[7]'} 16 ENABLE_SECURITY_DOWNLOAD : {show: y, blk : 0, word: 1, pos: 16, len : 1, start : 48, type : bool, wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: Set this bit to enable secure UART download mode, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[16]', bloc: 'B3[0]'} 17 FLASH_TPUW : {show: y, blk : 0, word: 1, pos: 17, len : 4, start : 49, type : 'uint:4', wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value. Otherwise; the waiting time is twice the configurable value, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[20:17]', bloc: 'B3[4:1]'} 18 SECURE_BOOT_EN : {show: y, blk : 0, word: 1, pos: 21, len : 1, start : 53, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: The bit be set to enable secure boot, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[21]', bloc: 'B3[5]'} 19 SECURE_VERSION : {show: y, blk : 0, word: 1, pos: 22, len : 4, start : 54, type : 'uint:4', wr_dis : 4, rd_dis: null, alt : '', dict : '', desc: Secure version for anti-rollback, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25:22]', bloc: 'B3[7:6],B4[1:0]'} 20 CUSTOM_MAC_USED : {show: y, blk : 0, word: 1, pos: 26, len : 1, start : 58, type : bool, wr_dis : 4, rd_dis: null, alt : ENABLE_CUSTOM_MAC, dict : '', desc: True if MAC_CUSTOM is burned, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B4[2]'} 21 DISABLE_WAFER_VERSION_MAJOR: {show: y, blk : 0, word: 1, pos: 27, len : 1, start : 59, type : bool, wr_dis : 4, rd_dis: null, alt : '', dict : '', desc: Disables check of wafer version major, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[27]', bloc: 'B4[3]'} 22 DISABLE_BLK_VERSION_MAJOR : {show: y, blk : 0, word: 1, pos: 28, len : 1, start : 60, type : bool, wr_dis : 4, rd_dis: null, alt : '', dict : '', desc: Disables check of blk version major, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[28]', bloc: 'B4[4]'} 23 RESERVED_0_61 : {show: n, blk : 0, word: 1, pos: 29, len : 3, start : 61, type : 'uint:3', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:29]', bloc: 'B4[7:5]'} 24 CUSTOM_MAC : {show: y, blk : 1, word: 0, pos : 0, len : 48, start : 0, type : 'bytes:6', wr_dis : 5, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict : '', desc: Custom MAC address, rloc: EFUSE_RD_BLK1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5'} 25 RESERVED_1_48 : {show: n, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'uint:16', wr_dis : 5, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_BLK1_DATA1_REG[31:16]', bloc: 'B6,B7'} 26 SYSTEM_DATA2 : {show: n, blk : 1, word: 2, pos : 0, len : 24, start : 64, type : 'uint:24', wr_dis : 5, rd_dis: null, alt : '', dict : '', desc: 'Stores the bits [64:87] of system data', rloc: 'EFUSE_RD_BLK1_DATA2_REG[23:0]', bloc: 'B8,B9,B10'} 27 MAC : {show: y, blk : 2, word: 0, pos : 0, len : 48, start : 0, type : 'bytes:6', wr_dis : 6, rd_dis: null, alt : MAC_FACTORY, dict : '', desc: MAC address, rloc: EFUSE_RD_BLK2_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5'} 28 WAFER_VERSION_MINOR : {show: y, blk : 2, word: 1, pos: 16, len : 4, start : 48, type : 'uint:4', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: WAFER_VERSION_MINOR, rloc: 'EFUSE_RD_BLK2_DATA1_REG[19:16]', bloc: 'B6[3:0]'} 29 WAFER_VERSION_MAJOR : {show: y, blk : 2, word: 1, pos: 20, len : 2, start : 52, type : 'uint:2', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: WAFER_VERSION_MAJOR, rloc: 'EFUSE_RD_BLK2_DATA1_REG[21:20]', bloc: 'B6[5:4]'} 30 PKG_VERSION : {show: y, blk : 2, word: 1, pos: 22, len : 3, start : 54, type : 'uint:3', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: EFUSE_PKG_VERSION, rloc: 'EFUSE_RD_BLK2_DATA1_REG[24:22]', bloc: 'B6[7:6],B7[0]'} 31 BLK_VERSION_MINOR : {show: y, blk : 2, word: 1, pos: 25, len : 3, start : 57, type : 'uint:3', wr_dis : 6, rd_dis: null, alt : '', dict: '{0: "No calib", 1: "With calib"}', desc: Minor version of BLOCK2, rloc: 'EFUSE_RD_BLK2_DATA1_REG[27:25]', bloc: 'B7[3:1]'} 32 BLK_VERSION_MAJOR : {show: y, blk : 2, word: 1, pos: 28, len : 2, start : 60, type : 'uint:2', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: Major version of BLOCK2, rloc: 'EFUSE_RD_BLK2_DATA1_REG[29:28]', bloc: 'B7[5:4]'} 33 OCODE : {show: y, blk : 2, word: 1, pos: 30, len : 7, start : 62, type : 'uint:7', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: OCode, rloc: 'EFUSE_RD_BLK2_DATA1_REG[31:30]', bloc: 'B7[7:6],B8[4:0]'} 34 TEMP_CALIB : {show: y, blk : 2, word: 2, pos : 5, len : 9, start : 69, type : 'uint:9', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: Temperature calibration data, rloc: 'EFUSE_RD_BLK2_DATA2_REG[13:5]', bloc: 'B8[7:5],B9[5:0]'} 35 ADC1_INIT_CODE_ATTEN0 : {show: y, blk : 2, word: 2, pos: 14, len : 8, start : 78, type : 'uint:8', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0, rloc: 'EFUSE_RD_BLK2_DATA2_REG[21:14]', bloc: 'B9[7:6],B10[5:0]'} 36 ADC1_INIT_CODE_ATTEN3 : {show: y, blk : 2, word: 2, pos: 22, len : 5, start : 86, type : 'uint:5', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten3, rloc: 'EFUSE_RD_BLK2_DATA2_REG[26:22]', bloc: 'B10[7:6],B11[2:0]'} 37 ADC1_CAL_VOL_ATTEN0 : {show: y, blk : 2, word: 2, pos: 27, len : 8, start : 91, type : 'uint:8', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: ADC1 calibration voltage at atten0, rloc: 'EFUSE_RD_BLK2_DATA2_REG[31:27]', bloc: 'B11[7:3],B12[2:0]'} 38 ADC1_CAL_VOL_ATTEN3 : {show: y, blk : 2, word: 3, pos : 3, len : 6, start : 99, type : 'uint:6', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: ADC1 calibration voltage at atten3, rloc: 'EFUSE_RD_BLK2_DATA3_REG[8:3]', bloc: 'B12[7:3],B13[0]'} 39 DIG_DBIAS_HVT : {show: y, blk : 2, word: 3, pos : 9, len : 5, start: 105, type : 'uint:5', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 digital dbias when hvt, rloc: 'EFUSE_RD_BLK2_DATA3_REG[13:9]', bloc: 'B13[5:1]'} 40 DIG_LDO_SLP_DBIAS2 : {show: y, blk : 2, word: 3, pos: 14, len : 7, start: 110, type : 'uint:7', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_DBG0_DBIAS2, rloc: 'EFUSE_RD_BLK2_DATA3_REG[20:14]', bloc: 'B13[7:6],B14[4:0]'} 41 DIG_LDO_SLP_DBIAS26 : {show: y, blk : 2, word: 3, pos: 21, len : 8, start: 117, type : 'uint:8', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_DBG0_DBIAS26, rloc: 'EFUSE_RD_BLK2_DATA3_REG[28:21]', bloc: 'B14[7:5],B15[4:0]'} 42 DIG_LDO_ACT_DBIAS26 : {show: y, blk : 2, word: 3, pos: 29, len : 6, start: 125, type : 'uint:6', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_ACT_DBIAS26, rloc: 'EFUSE_RD_BLK2_DATA3_REG[31:29]', bloc: 'B15[7:5],B16[2:0]'} 43 DIG_LDO_ACT_STEPD10 : {show: y, blk : 2, word: 4, pos : 3, len : 4, start: 131, type : 'uint:4', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_ACT_STEPD10, rloc: 'EFUSE_RD_BLK2_DATA4_REG[6:3]', bloc: 'B16[6:3]'} 44 RTC_LDO_SLP_DBIAS13 : {show: y, blk : 2, word: 4, pos : 7, len : 7, start: 135, type : 'uint:7', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_SLP_DBIAS13, rloc: 'EFUSE_RD_BLK2_DATA4_REG[13:7]', bloc: 'B16[7],B17[5:0]'} 45 RTC_LDO_SLP_DBIAS29 : {show: y, blk : 2, word: 4, pos: 14, len : 9, start: 142, type : 'uint:9', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_SLP_DBIAS29, rloc: 'EFUSE_RD_BLK2_DATA4_REG[22:14]', bloc: 'B17[7:6],B18[6:0]'} 46 RTC_LDO_SLP_DBIAS31 : {show: y, blk : 2, word: 4, pos: 23, len : 6, start: 151, type : 'uint:6', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_SLP_DBIAS31, rloc: 'EFUSE_RD_BLK2_DATA4_REG[28:23]', bloc: 'B18[7],B19[4:0]'} 47 RTC_LDO_ACT_DBIAS31 : {show: y, blk : 2, word: 4, pos: 29, len : 6, start: 157, type : 'uint:6', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_ACT_DBIAS31, rloc: 'EFUSE_RD_BLK2_DATA4_REG[31:29]', bloc: 'B19[7:5],B20[2:0]'} 48 RTC_LDO_ACT_DBIAS13 : {show: y, blk : 2, word: 5, pos : 3, len : 8, start: 163, type : 'uint:8', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: BLOCK2 DIG_LDO_ACT_DBIAS13, rloc: 'EFUSE_RD_BLK2_DATA5_REG[10:3]', bloc: 'B20[7:3],B21[2:0]'} 49 RESERVED_2_171 : {show: n, blk : 2, word: 5, pos: 11, len : 21, start: 171, type : 'uint:21', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_BLK2_DATA5_REG[31:11]', bloc: 'B21[7:3],B22,B23'} 50 ADC_CALIBRATION_3 : {show: y, blk : 2, word: 6, pos : 0, len : 11, start: 192, type : 'uint:11', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: 'Store the bit [86:96] of ADC calibration data', rloc: 'EFUSE_RD_BLK2_DATA6_REG[10:0]', bloc: 'B24,B25[2:0]'} 51 BLK2_RESERVED_DATA_0 : {show: n, blk : 2, word: 6, pos: 11, len : 21, start: 203, type : 'uint:21', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: 'Store the bit [0:20] of block2 reserved data', rloc: 'EFUSE_RD_BLK2_DATA6_REG[31:11]', bloc: 'B25[7:3],B26,B27'} 52 BLK2_RESERVED_DATA_1 : {show: n, blk : 2, word: 7, pos : 0, len : 32, start: 224, type : 'uint:32', wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: 'Store the bit [21:52] of block2 reserved data', rloc: EFUSE_RD_BLK2_DATA7_REG, bloc: 'B28,B29,B30,B31'} 53 BLOCK_KEY0 : {show: y, blk : 3, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 7, rd_dis : 0 1, alt : KEY0, dict : '', desc: BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption, rloc: EFUSE_RD_BLK3_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'} 54
