1{IDF_TARGET_FLASH_FREQ_F:default="80", esp32c2="60", esp32h2="48"} 2 3{IDF_TARGET_FLASH_FREQ_0:default="40", esp32c2="30", esp32h2="24"} 4 5{IDF_TARGET_FLASH_FREQ_1:default="26", esp32c2="20", esp32h2="16"} 6 7{IDF_TARGET_FLASH_FREQ_2:default="20", esp32c2="15", esp32h2="12"} 8 9{IDF_TARGET_BOOTLOADER_OFFSET:default="0x0", esp32="0x1000", esp32s2="0x1000", esp32p4="0x2000"} 10 11 12.. _image-format: 13 14Firmware Image Format 15===================== 16 17This is technical documentation for the firmware image format used by the ROM bootloader. These are the images created by ``esptool.py elf2image``. 18 19.. only:: esp8266 20 21 The firmware file consists of a header, a variable number of data segments and a footer. Multi-byte fields are little-endian. 22 23.. only:: not esp8266 24 25 The firmware file consists of a header, an extended header, a variable number of data segments and a footer. Multi-byte fields are little-endian. 26 27File Header 28----------- 29 30The image header is 8 bytes long: 31 32.. only:: esp8266 33 34 +--------+--------------------------------------------------------------------------------------------------+ 35 | Byte | Description | 36 +========+==================================================================================================+ 37 | 0 | Magic number (always ``0xE9``) | 38 +--------+--------------------------------------------------------------------------------------------------+ 39 | 1 | Number of segments | 40 +--------+--------------------------------------------------------------------------------------------------+ 41 | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) | 42 +--------+--------------------------------------------------------------------------------------------------+ 43 | 3 | High four bits - Flash size (``0`` = 512KB, ``1`` = 256KB, ``2`` = 1MB, ``3`` = 2MB, ``4`` = 4MB,| 44 | | ``5`` = 2MB-c1, ``6`` = 4MB-c1, ``8`` = 8MB, ``9`` = 16MB) | 45 | | | 46 | | Low four bits - Flash frequency (``0`` = 40MHz, ``1`` = 26MHz, ``2`` = 20MHz, ``0xf`` = 80MHz) | 47 +--------+--------------------------------------------------------------------------------------------------+ 48 | 4-7 | Entry point address | 49 +--------+--------------------------------------------------------------------------------------------------+ 50 51 52.. only:: esp32s2 or esp32s3 or esp32p4 53 54 +--------+------------------------------------------------------------------------------------------------+ 55 | Byte | Description | 56 +========+================================================================================================+ 57 | 0 | Magic number (always ``0xE9``) | 58 +--------+------------------------------------------------------------------------------------------------+ 59 | 1 | Number of segments | 60 +--------+------------------------------------------------------------------------------------------------+ 61 | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) | 62 +--------+------------------------------------------------------------------------------------------------+ 63 | 3 | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB, | 64 | | ``5`` = 32MB, ``6`` = 64MB, ``7`` = 128MB") | 65 | | | 66 | | Low four bits - Flash frequency (``0`` = {IDF_TARGET_FLASH_FREQ_0}MHz, ``1`` = {IDF_TARGET_FLASH_FREQ_1}MHz, ``2`` = {IDF_TARGET_FLASH_FREQ_2}MHz, ``0xf`` = {IDF_TARGET_FLASH_FREQ_F}MHz) | 67 +--------+------------------------------------------------------------------------------------------------+ 68 | 4-7 | Entry point address | 69 +--------+------------------------------------------------------------------------------------------------+ 70 71 72.. only:: esp32c6 73 74 +--------+------------------------------------------------------------------------------------------------+ 75 | Byte | Description | 76 +========+================================================================================================+ 77 | 0 | Magic number (always ``0xE9``) | 78 +--------+------------------------------------------------------------------------------------------------+ 79 | 1 | Number of segments | 80 +--------+------------------------------------------------------------------------------------------------+ 81 | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) | 82 +--------+------------------------------------------------------------------------------------------------+ 83 | 3 | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB) | 84 | | | 85 | | Low four bits - Flash frequency (``0`` = 80MHz, ``0`` = 40MHz, ``2`` = 20MHz) | 86 +--------+------------------------------------------------------------------------------------------------+ 87 | 4-7 | Entry point address | 88 +--------+------------------------------------------------------------------------------------------------+ 89 90 .. note:: 91 Flash frequency with value ``0`` can mean either 80MHz or 40MHz based on MSPI clock source mode. 92 93 94.. only:: not (esp8266 or esp32c6 or esp32s3 or esp32s2 or esp32p4) 95 96 +--------+------------------------------------------------------------------------------------------------+ 97 | Byte | Description | 98 +========+================================================================================================+ 99 | 0 | Magic number (always ``0xE9``) | 100 +--------+------------------------------------------------------------------------------------------------+ 101 | 1 | Number of segments | 102 +--------+------------------------------------------------------------------------------------------------+ 103 | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) | 104 +--------+------------------------------------------------------------------------------------------------+ 105 | 3 | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB) | 106 | | | 107 | | Low four bits - Flash frequency (``0`` = {IDF_TARGET_FLASH_FREQ_0}MHz, ``1`` = {IDF_TARGET_FLASH_FREQ_1}MHz, ``2`` = {IDF_TARGET_FLASH_FREQ_2}MHz, ``0xf`` = {IDF_TARGET_FLASH_FREQ_F}MHz) | 108 +--------+------------------------------------------------------------------------------------------------+ 109 | 4-7 | Entry point address | 110 +--------+------------------------------------------------------------------------------------------------+ 111 112 113``esptool.py`` overrides the 2nd and 3rd (counted from 0) bytes according to the SPI flash info provided through the command line option. These bytes are only overridden if this is a bootloader image (an image written to a correct bootloader offset of {IDF_TARGET_BOOTLOADER_OFFSET}), in this case, the appended SHA256 digest is also updated to reflect the header changes. Generating images without SHA256 digest can be achieved by running ``esptool.py elf2image`` with the ``--dont-append-digest`` argument. 114 115.. only:: esp8266 116 117 Individual segments come right after this header. 118 119.. only:: not esp8266 120 121 Extended File Header 122 -------------------- 123 124 The 16-byte long extended header comes right after the image header, individual segments come right after it: 125 126 +--------+---------------------------------------------------------------------------------------------------------+ 127 | Byte | Description | 128 +========+=========================================================================================================+ 129 | 0 | WP pin when SPI pins set via efuse (read by ROM bootloader) | 130 +--------+---------------------------------------------------------------------------------------------------------+ 131 | 1-3 | Drive settings for the SPI flash pins (read by ROM bootloader) | 132 +--------+---------------------------------------------------------------------------------------------------------+ 133 | 4-5 | Chip ID (which ESP device is this image for) | 134 +--------+---------------------------------------------------------------------------------------------------------+ 135 | 6 | Minimal chip revision supported by the image (deprecated, use the following field) | 136 +--------+---------------------------------------------------------------------------------------------------------+ 137 | 7-8 | Minimal chip revision supported by the image (in format: major * 100 + minor) | 138 +--------+---------------------------------------------------------------------------------------------------------+ 139 | 9-10 | Maximal chip revision supported by the image (in format: major * 100 + minor) | 140 +--------+---------------------------------------------------------------------------------------------------------+ 141 | 11-14 | Reserved bytes in additional header space, currently unused | 142 +--------+---------------------------------------------------------------------------------------------------------+ 143 | 15 | Hash appended (If 1, SHA256 digest is appended after the checksum) | 144 +--------+---------------------------------------------------------------------------------------------------------+ 145 146Segment 147------- 148 149+---------+-----------------+ 150| Byte | Description | 151+=========+=================+ 152| 0-3 | Memory offset | 153+---------+-----------------+ 154| 4-7 | Segment size | 155+---------+-----------------+ 156| 8...n | Data | 157+---------+-----------------+ 158 159Footer 160------ 161 162The file is padded with zeros until its size is one byte less than a multiple of 16 bytes. A last byte (thus making the file size a multiple of 16) is the checksum of the data of all segments. The checksum is defined as the xor-sum of all bytes and the byte ``0xEF``. 163 164.. only:: not esp8266 165 166 If ``hash appended`` in the extended file header is ``0x01``, a SHA256 digest “simple hash” (of the entire image) is appended after the checksum. This digest is separate to secure boot and only used for detecting corruption. The SPI flash info cannot be changed during flashing if hash is appended after the image. 167 168 If secure boot is enabled, a signature is also appended (and the simple hash is included in the signed data). This image signature is `Secure Boot V1 <https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/secure-boot-v1.html#image-signing-algorithm>`_ and `Secure Boot V2 <https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/secure-boot-v2.html#signature-block-format>`_ specific. 169 170 171Analyzing a Binary Image 172------------------------ 173 174To analyze a binary image and get a complete summary of its headers and segments, use the :ref:`image_info <image-info>` command with the ``--version 2`` option. 175
