1 /*
2  *  ESP32 hardware accelerated SHA1/256/512 implementation
3  *  based on mbedTLS FIPS-197 compliant version.
4  *
5  *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
6  *  Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE Ltd
7  *  SPDX-License-Identifier: Apache-2.0
8  *
9  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
10  *  not use this file except in compliance with the License.
11  *  You may obtain a copy of the License at
12  *
13  *  http://www.apache.org/licenses/LICENSE-2.0
14  *
15  *  Unless required by applicable law or agreed to in writing, software
16  *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
17  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
18  *  See the License for the specific language governing permissions and
19  *  limitations under the License.
20  *
21  */
22 /*
23  *  The SHA-1 standard was published by NIST in 1993.
24  *
25  *  http://www.itl.nist.gov/fipspubs/fip180-1.htm
26  */
27 
28 #include <string.h>
29 #include <stdio.h>
30 #include <machine/endian.h>
31 #include <assert.h>
32 
33 #include "freertos/FreeRTOS.h"
34 #include "freertos/semphr.h"
35 #include "esp_cpu.h"
36 
37 #include "hal/sha_hal.h"
38 #include "hal/sha_types.h"
39 #include "sha/sha_parallel_engine.h"
40 #include "soc/hwcrypto_periph.h"
41 #include "esp_private/periph_ctrl.h"
42 
43 /*
44      Single spinlock for SHA engine memory block
45 */
46 static portMUX_TYPE memory_block_lock = portMUX_INITIALIZER_UNLOCKED;
47 
48 
49 /* Binary semaphore managing the state of each concurrent SHA engine.
50 
51    Available = noone is using this SHA engine
52    Taken = a SHA session is running on this SHA engine
53 
54    Indexes:
55    0 = SHA1
56    1 = SHA2_256
57    2 = SHA2_384 or SHA2_512
58 */
59 static SemaphoreHandle_t engine_states[3];
60 
61 static uint8_t engines_in_use;
62 
63 /* Spinlock for engines_in_use counter
64 */
65 static portMUX_TYPE engines_in_use_lock = portMUX_INITIALIZER_UNLOCKED;
66 
67 /* Return block size (in words) for a given SHA type */
block_length(esp_sha_type type)68 inline static size_t block_length(esp_sha_type type)
69 {
70     switch (type) {
71     case SHA1:
72     case SHA2_256:
73         return 64 / 4;
74     case SHA2_384:
75     case SHA2_512:
76         return 128 / 4;
77     default:
78         return 0;
79     }
80 }
81 
82 /* Index into the engine_states array */
sha_engine_index(esp_sha_type type)83 inline static size_t sha_engine_index(esp_sha_type type)
84 {
85     switch (type) {
86     case SHA1:
87         return 0;
88     case SHA2_256:
89         return 1;
90     default:
91         return 2;
92     }
93 }
94 
esp_sha_lock_memory_block(void)95 void esp_sha_lock_memory_block(void)
96 {
97     portENTER_CRITICAL(&memory_block_lock);
98 }
99 
esp_sha_unlock_memory_block(void)100 void esp_sha_unlock_memory_block(void)
101 {
102     portEXIT_CRITICAL(&memory_block_lock);
103 }
104 
sha_get_engine_state(esp_sha_type sha_type)105 static SemaphoreHandle_t sha_get_engine_state(esp_sha_type sha_type)
106 {
107     unsigned idx = sha_engine_index(sha_type);
108     volatile SemaphoreHandle_t *engine = &engine_states[idx];
109     SemaphoreHandle_t result = *engine;
110 
111     if (result == NULL) {
112         // Create a new semaphore for 'in use' flag
113         SemaphoreHandle_t new_engine = xSemaphoreCreateBinary();
114         assert(new_engine != NULL);
115         xSemaphoreGive(new_engine); // start available
116 
117         // try to atomically set the previously NULL *engine to new_engine
118         if (!esp_cpu_compare_and_set((volatile uint32_t *)engine, 0, (uint32_t)new_engine)) {
119             // we lost a race setting *engine
120             vSemaphoreDelete(new_engine);
121         }
122         result = *engine;
123     }
124     return result;
125 }
126 
127 static bool esp_sha_lock_engine_common(esp_sha_type sha_type, TickType_t ticks_to_wait);
128 
esp_sha_try_lock_engine(esp_sha_type sha_type)129 bool esp_sha_try_lock_engine(esp_sha_type sha_type)
130 {
131     return esp_sha_lock_engine_common(sha_type, 0);
132 }
133 
esp_sha_lock_engine(esp_sha_type sha_type)134 void esp_sha_lock_engine(esp_sha_type sha_type)
135 {
136     esp_sha_lock_engine_common(sha_type, portMAX_DELAY);
137 }
138 
esp_sha_lock_engine_common(esp_sha_type sha_type,TickType_t ticks_to_wait)139 static bool esp_sha_lock_engine_common(esp_sha_type sha_type, TickType_t ticks_to_wait)
140 {
141     SemaphoreHandle_t engine_state = sha_get_engine_state(sha_type);
142     BaseType_t result = xSemaphoreTake(engine_state, ticks_to_wait);
143 
144     if (result == pdFALSE) {
145         // failed to take semaphore
146         return false;
147     }
148 
149     portENTER_CRITICAL(&engines_in_use_lock);
150 
151     if (engines_in_use == 0) {
152         /* Just locked first engine,
153            so enable SHA hardware */
154         periph_module_enable(PERIPH_SHA_MODULE);
155     }
156 
157     engines_in_use++;
158     assert(engines_in_use <= 3);
159 
160     portEXIT_CRITICAL(&engines_in_use_lock);
161 
162     return true;
163 }
164 
165 
esp_sha_unlock_engine(esp_sha_type sha_type)166 void esp_sha_unlock_engine(esp_sha_type sha_type)
167 {
168     SemaphoreHandle_t engine_state = sha_get_engine_state(sha_type);
169 
170     portENTER_CRITICAL(&engines_in_use_lock);
171 
172     engines_in_use--;
173 
174     if (engines_in_use == 0) {
175         /* About to release last engine, so
176            disable SHA hardware */
177         periph_module_disable(PERIPH_SHA_MODULE);
178     }
179 
180     portEXIT_CRITICAL(&engines_in_use_lock);
181 
182     xSemaphoreGive(engine_state);
183 }
184 
esp_sha_read_digest_state(esp_sha_type sha_type,void * digest_state)185 void esp_sha_read_digest_state(esp_sha_type sha_type, void *digest_state)
186 {
187 #ifndef NDEBUG
188     {
189         SemaphoreHandle_t engine_state = sha_get_engine_state(sha_type);
190         assert(uxSemaphoreGetCount(engine_state) == 0 &&
191                "SHA engine should be locked" );
192     }
193 #endif
194 
195     // preemptively do this before entering the critical section, then re-check once in it
196     sha_hal_wait_idle();
197 
198     esp_sha_lock_memory_block();
199 
200     sha_hal_read_digest(sha_type, digest_state);
201 
202     esp_sha_unlock_memory_block();
203 }
204 
esp_sha_block(esp_sha_type sha_type,const void * data_block,bool first_block)205 void esp_sha_block(esp_sha_type sha_type, const void *data_block, bool first_block)
206 {
207 #ifndef NDEBUG
208     {
209         SemaphoreHandle_t engine_state = sha_get_engine_state(sha_type);
210         assert(uxSemaphoreGetCount(engine_state) == 0 &&
211                "SHA engine should be locked" );
212     }
213 #endif
214 
215     // preemptively do this before entering the critical section, then re-check once in it
216     sha_hal_wait_idle();
217     esp_sha_lock_memory_block();
218 
219     sha_hal_hash_block(sha_type, data_block, block_length(sha_type), first_block);
220 
221     esp_sha_unlock_memory_block();
222 }
223