1 /*
2 * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 #include "sdkconfig.h"
7
8 #include "hal/spi_flash_hal.h"
9 #if SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
10 void spi_flash_hal_setup_auto_suspend_mode(spi_flash_host_inst_t *host);
11 void spi_flash_hal_disable_auto_resume_mode(spi_flash_host_inst_t *host);
12 void spi_flash_hal_disable_auto_suspend_mode(spi_flash_host_inst_t *host);
13 void spi_flash_hal_setup_auto_resume_mode(spi_flash_host_inst_t *host);
14 #endif //SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
15
16 #ifndef CONFIG_SPI_FLASH_ROM_IMPL
17
18 #include "spi_flash_hal_common.inc"
19
20 // HAL for
21 // - MEMSPI
22 // - SPI1~3 on ESP32/S2/S3/C3/H4/C2
23 // The common part is in spi_flash_hal_common.inc
24
spi_flash_hal_erase_chip(spi_flash_host_inst_t * host)25 void spi_flash_hal_erase_chip(spi_flash_host_inst_t *host)
26 {
27 spi_dev_t *dev = get_spi_dev(host);
28 spi_flash_ll_erase_chip(dev);
29 #if SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
30 if((((spi_flash_hal_context_t*)host)->flags & SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_SUSPEND) == 0) {
31 host->driver->poll_cmd_done(host);
32 }
33 #else
34 host->driver->poll_cmd_done(host);
35 #endif
36 }
37
38 // Only support 24bit address
spi_flash_hal_erase_sector(spi_flash_host_inst_t * host,uint32_t start_address)39 void spi_flash_hal_erase_sector(spi_flash_host_inst_t *host, uint32_t start_address)
40 {
41 spi_dev_t *dev = get_spi_dev(host);
42 spi_flash_ll_set_addr_bitlen(dev, 24);
43 spi_flash_ll_set_address(dev, start_address & ADDRESS_MASK_24BIT);
44 spi_flash_ll_erase_sector(dev);
45
46 #if SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
47 if((((spi_flash_hal_context_t*)host)->flags & SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_SUSPEND) == 0) {
48 host->driver->poll_cmd_done(host);
49 }
50 #else
51 host->driver->poll_cmd_done(host);
52 #endif
53 }
54
55 // Only support 24bit address
spi_flash_hal_erase_block(spi_flash_host_inst_t * host,uint32_t start_address)56 void spi_flash_hal_erase_block(spi_flash_host_inst_t *host, uint32_t start_address)
57 {
58 spi_dev_t *dev = get_spi_dev(host);
59 spi_flash_ll_set_addr_bitlen(dev, 24);
60 spi_flash_ll_set_address(dev, start_address & ADDRESS_MASK_24BIT);
61 spi_flash_ll_erase_block(dev);
62 #if SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
63 if((((spi_flash_hal_context_t*)host)->flags & SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_SUSPEND) == 0) {
64 host->driver->poll_cmd_done(host);
65 }
66 #else
67 host->driver->poll_cmd_done(host);
68 #endif
69 }
70
71 // Only support 24bit address
spi_flash_hal_program_page(spi_flash_host_inst_t * host,const void * buffer,uint32_t address,uint32_t length)72 void spi_flash_hal_program_page(spi_flash_host_inst_t *host, const void *buffer, uint32_t address, uint32_t length)
73 {
74 spi_dev_t *dev = get_spi_dev(host);
75 spi_flash_ll_set_addr_bitlen(dev, 24);
76 spi_flash_ll_set_address(dev, (address & ADDRESS_MASK_24BIT) | (length << 24));
77 spi_flash_ll_program_page(dev, buffer, length);
78 host->driver->poll_cmd_done(host);
79 }
80
spi_flash_hal_set_write_protect(spi_flash_host_inst_t * host,bool wp)81 esp_err_t spi_flash_hal_set_write_protect(spi_flash_host_inst_t *host, bool wp)
82 {
83 spi_dev_t *dev = get_spi_dev(host);
84 spi_flash_ll_set_write_protect(dev, wp);
85 host->driver->poll_cmd_done(host);
86 return ESP_OK;
87 }
88
89 #else // defined CONFIG_SPI_FLASH_ROM_IMPL
90
get_spi_dev(spi_flash_host_inst_t * host)91 static inline spi_dev_t *get_spi_dev(spi_flash_host_inst_t *host)
92 {
93 return ((spi_flash_hal_context_t*)host)->spi;
94 }
95
get_host_id(spi_flash_host_inst_t * host)96 static inline int get_host_id(spi_flash_host_inst_t* host)
97 {
98 spi_dev_t *dev = get_spi_dev(host);
99 return spi_flash_ll_hw_get_id(dev);
100 }
101
102 #endif // !CONFIG_SPI_FLASH_ROM_IMPL
103
spi_flash_hal_check_status(spi_flash_host_inst_t * host)104 uint32_t spi_flash_hal_check_status(spi_flash_host_inst_t *host)
105 {
106 spi_dev_t *dev = get_spi_dev(host);
107 uint32_t status = spi_flash_ll_host_idle(dev);
108 #if SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
109 uint32_t sus_status = spimem_flash_ll_sus_status((spi_mem_dev_t*)dev) << 1;
110 #else
111 uint32_t sus_status = 0;
112 #endif
113 // Not clear if this is necessary, or only necessary if
114 // chip->spi == SPI1. But probably doesn't hurt...
115 if ((void*) dev == spi_flash_ll_get_hw(SPI1_HOST)) {
116 #if CONFIG_IDF_TARGET_ESP32
117 status &= spi_flash_ll_host_idle(&SPI0);
118 #endif
119 }
120
121 //status and sus_status should be mutual exclusion
122 return (status | sus_status);
123 }
124
spi_flash_hal_setup_read_suspend(spi_flash_host_inst_t * host,const spi_flash_sus_cmd_conf * sus_conf)125 esp_err_t spi_flash_hal_setup_read_suspend(spi_flash_host_inst_t *host, const spi_flash_sus_cmd_conf *sus_conf)
126 {
127 #if SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
128 spi_mem_dev_t *dev = (spi_mem_dev_t *)spi_flash_ll_get_hw(SPI1_HOST);
129 spi_flash_hal_context_t* ctx = (spi_flash_hal_context_t*)host;
130 memcpy(&(ctx->sus_cfg), sus_conf, sizeof(spi_flash_sus_cmd_conf));
131 spimem_flash_ll_set_read_sus_status(dev, sus_conf->sus_mask);
132 spimem_flash_ll_suspend_cmd_setup(dev, sus_conf->sus_cmd);
133 spimem_flash_ll_resume_cmd_setup(dev, sus_conf->res_cmd);
134 spimem_flash_ll_rd_sus_cmd_setup(dev, sus_conf->cmd_rdsr);
135 #endif // SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
136 return ESP_OK;
137 }
138
139 #if SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
spi_flash_hal_setup_auto_suspend_mode(spi_flash_host_inst_t * host)140 void spi_flash_hal_setup_auto_suspend_mode(spi_flash_host_inst_t *host)
141 {
142 spi_mem_dev_t *dev = (spi_mem_dev_t*)spi_flash_ll_get_hw(SPI1_HOST);
143 spimem_flash_ll_auto_wait_idle_init(dev, true);
144 spimem_flash_ll_auto_suspend_init(dev, true);
145 #if SOC_SPI_MEM_SUPPORT_CHECK_SUS
146 spimem_flash_ll_sus_check_sus_setup(dev, true);
147 #endif
148 }
149
spi_flash_hal_setup_auto_resume_mode(spi_flash_host_inst_t * host)150 void spi_flash_hal_setup_auto_resume_mode(spi_flash_host_inst_t *host)
151 {
152 spi_mem_dev_t *dev = (spi_mem_dev_t*)spi_flash_ll_get_hw(SPI1_HOST);
153 spimem_flash_ll_auto_resume_init(dev, true);
154 #if SOC_SPI_MEM_SUPPORT_CHECK_SUS
155 spimem_flash_ll_res_check_sus_setup(dev, true);
156 #endif
157 }
158
spi_flash_hal_disable_auto_suspend_mode(spi_flash_host_inst_t * host)159 void spi_flash_hal_disable_auto_suspend_mode(spi_flash_host_inst_t *host)
160 {
161 spi_mem_dev_t *dev = (spi_mem_dev_t *)spi_flash_ll_get_hw(SPI1_HOST);
162 spimem_flash_ll_auto_wait_idle_init(dev, false);
163 spimem_flash_ll_auto_suspend_init(dev, false);
164 #if SOC_SPI_MEM_SUPPORT_CHECK_SUS
165 spimem_flash_ll_sus_check_sus_setup(dev, false);
166 #endif
167 }
168
spi_flash_hal_disable_auto_resume_mode(spi_flash_host_inst_t * host)169 void spi_flash_hal_disable_auto_resume_mode(spi_flash_host_inst_t *host)
170 {
171 spi_mem_dev_t *dev = (spi_mem_dev_t*)spi_flash_ll_get_hw(SPI1_HOST);
172 spimem_flash_ll_auto_resume_init(dev, false);
173 #if SOC_SPI_MEM_SUPPORT_CHECK_SUS
174 spimem_flash_ll_res_check_sus_setup(dev, false);
175 #endif
176 }
177 #endif // SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
178
spi_flash_hal_resume(spi_flash_host_inst_t * host)179 void spi_flash_hal_resume(spi_flash_host_inst_t *host)
180 {
181 #if SOC_SPI_MEM_SUPPORT_SW_SUSPEND
182 spimem_flash_ll_resume((spi_mem_dev_t*)(((spi_flash_hal_context_t *)host)->spi));
183 #else
184 abort();
185 #endif
186 }
187
spi_flash_hal_suspend(spi_flash_host_inst_t * host)188 void spi_flash_hal_suspend(spi_flash_host_inst_t *host)
189 {
190 #if SOC_SPI_MEM_SUPPORT_SW_SUSPEND
191 spimem_flash_ll_suspend((spi_mem_dev_t *)(((spi_flash_hal_context_t *)host)->spi));
192 #else
193 abort();
194 #endif
195 }
196
