1 /*
2  * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 #include "hal/rmt_hal.h"
7 #include "hal/rmt_ll.h"
8 #include "soc/soc_caps.h"
9 
rmt_hal_init(rmt_hal_context_t * hal)10 void rmt_hal_init(rmt_hal_context_t *hal)
11 {
12     hal->regs = &RMT;
13     rmt_ll_mem_power_by_pmu(hal->regs);
14     rmt_ll_enable_mem_access_nonfifo(hal->regs, true);     // APB access the RMTMEM in nonfifo mode
15     rmt_ll_enable_interrupt(hal->regs, UINT32_MAX, false); // disable all interupt events
16     rmt_ll_clear_interrupt_status(hal->regs, UINT32_MAX);  // clear all pending events
17     rmt_ll_enable_group_clock(hal->regs, true);            // enable clock source
18 #if SOC_RMT_SUPPORT_TX_SYNCHRO
19     rmt_ll_tx_clear_sync_group(hal->regs);
20 #endif // SOC_RMT_SUPPORT_TX_SYNCHRO
21 }
22 
rmt_hal_deinit(rmt_hal_context_t * hal)23 void rmt_hal_deinit(rmt_hal_context_t *hal)
24 {
25     rmt_ll_enable_interrupt(hal->regs, UINT32_MAX, false); // disable all interupt events
26     rmt_ll_clear_interrupt_status(hal->regs, UINT32_MAX);  // clear all pending events
27     rmt_ll_mem_force_power_off(hal->regs);                 // power off RMTMEM power domain forcefully
28     rmt_ll_enable_group_clock(hal->regs, false);           // disable clock source
29     hal->regs = NULL;
30 }
31 
rmt_hal_tx_channel_reset(rmt_hal_context_t * hal,uint32_t channel)32 void rmt_hal_tx_channel_reset(rmt_hal_context_t *hal, uint32_t channel)
33 {
34     rmt_ll_tx_reset_channels_clock_div(hal->regs, 1 << channel);
35     rmt_ll_tx_reset_pointer(hal->regs, channel);
36 #if SOC_RMT_SUPPORT_TX_LOOP_COUNT
37     rmt_ll_tx_reset_loop_count(hal->regs, channel);
38 #endif // SOC_RMT_SUPPORT_TX_LOOP_COUNT
39     rmt_ll_enable_interrupt(hal->regs, RMT_LL_EVENT_TX_MASK(channel), false);
40     rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_TX_MASK(channel));
41 }
42 
rmt_hal_rx_channel_reset(rmt_hal_context_t * hal,uint32_t channel)43 void rmt_hal_rx_channel_reset(rmt_hal_context_t *hal, uint32_t channel)
44 {
45     rmt_ll_rx_reset_channels_clock_div(hal->regs, 1 << channel);
46     rmt_ll_rx_reset_pointer(hal->regs, channel);
47     rmt_ll_enable_interrupt(hal->regs, RMT_LL_EVENT_RX_MASK(channel), false);
48     rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_RX_MASK(channel));
49 }
50