1 /*
2 * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 // The HAL layer for LEDC (common part)
8
9 #include "esp_attr.h"
10 #include "hal/ledc_hal.h"
11 #include "soc/soc_caps.h"
12 #include "sdkconfig.h"
13 #include "hal/assert.h"
14 #include "esp_rom_sys.h"
15
ledc_hal_init(ledc_hal_context_t * hal,ledc_mode_t speed_mode)16 void ledc_hal_init(ledc_hal_context_t *hal, ledc_mode_t speed_mode)
17 {
18 //Get hardware instance.
19 hal->dev = LEDC_LL_GET_HW();
20 hal->speed_mode = speed_mode;
21 }
22
ledc_hal_get_clk_cfg(ledc_hal_context_t * hal,ledc_timer_t timer_sel,ledc_clk_cfg_t * clk_cfg)23 void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg)
24 {
25 /* Use the following variable to retrieve the clock source used by the LEDC
26 * hardware controller. */
27 ledc_clk_src_t clk_src;
28
29 /* Clock configuration to return to the driver. */
30 ledc_clk_cfg_t driver_clk = LEDC_AUTO_CLK;
31
32 /* Get the timer-specific mux value. */
33 ledc_hal_get_clock_source(hal, timer_sel, &clk_src);
34 #if SOC_LEDC_SUPPORT_REF_TICK
35 if (clk_src == LEDC_REF_TICK) {
36 driver_clk = LEDC_USE_REF_TICK;
37 } else
38 #endif
39 {
40 /* If the timer-specific mux is not set to REF_TICK, it either means that:
41 * - The controler is in fast mode, and thus using APB clock (driver_clk
42 * variable's default value)
43 * - The controler is in slow mode and so, using a global clock,
44 * so we have to retrieve that clock here.
45 */
46 if (hal->speed_mode == LEDC_LOW_SPEED_MODE) {
47 /* If the source clock used by LEDC hardware is not REF_TICK, it is
48 * necessary to retrieve the global clock source used. */
49 ledc_slow_clk_sel_t slow_clk = LEDC_SLOW_CLK_RC_FAST;
50 ledc_hal_get_slow_clk_sel(hal, &slow_clk);
51 driver_clk = (ledc_clk_cfg_t)slow_clk;
52 }
53 #if SOC_LEDC_SUPPORT_HS_MODE
54 else {
55 driver_clk = LEDC_USE_APB_CLK;
56 }
57 #endif
58 }
59
60 *clk_cfg = driver_clk;
61 }
62
63 #if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
ledc_hal_get_fade_param(ledc_hal_context_t * hal,ledc_channel_t channel_num,uint32_t range,uint32_t * dir,uint32_t * cycle,uint32_t * scale,uint32_t * step)64 void ledc_hal_get_fade_param(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
65 {
66 ledc_ll_set_duty_range_rd_addr(hal->dev, hal->speed_mode, channel_num, range);
67 // On ESP32C6/H2, gamma ram read/write has the APB and LEDC clock domain sync issue
68 // To make sure the parameter read is from the correct gamma ram addr, add a delay in between to ensure syncronization
69 esp_rom_delay_us(5);
70 ledc_ll_get_duty_param(hal->dev, hal->speed_mode, channel_num, dir, cycle, scale, step);
71 }
72 #endif
73
