1 /*
2  * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <stdint.h>
8 #include "esp_cpu.h"
9 #include "soc/soc.h"
10 #include "soc/soc_caps.h"
11 #include "esp_private/rtc_clk.h"
12 #include "esp_private/panic_internal.h"
13 #include "esp_private/system_internal.h"
14 #include "esp_private/spi_flash_os.h"
15 #include "esp_heap_caps.h"
16 #include "esp_rom_uart.h"
17 #include "esp_rom_sys.h"
18 #include "sdkconfig.h"
19 
esp_restart_noos_dig(void)20 void IRAM_ATTR esp_restart_noos_dig(void)
21 {
22     // In case any of the calls below results in re-enabling of interrupts
23     // (for example, by entering a critical section), disable all the
24     // interrupts (e.g. from watchdogs) here.
25 #ifdef CONFIG_IDF_TARGET_ARCH_RISCV
26     rv_utils_intr_global_disable();
27 #else
28     xt_ints_off(0xFFFFFFFF);
29 #endif
30 
31     // make sure all the panic handler output is sent from UART FIFO
32     if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) {
33         esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
34     }
35 
36 #if SOC_MEMSPI_CLOCK_IS_INDEPENDENT
37     spi_flash_set_clock_src(MSPI_CLK_SRC_ROM_DEFAULT);
38 #endif
39 
40     // switch to XTAL (otherwise we will keep running from the PLL)
41     rtc_clk_cpu_set_to_default_config();
42 
43     // esp_restart_noos_dig() will generates a core reset, which does not reset the
44     // registers of the RTC domain, so the CPU's stall state remains after the reset,
45     // we need to release them here
46 #if !CONFIG_FREERTOS_UNICORE
47     // unstall all other cores
48     int core_id = esp_cpu_get_core_id();
49     for (uint32_t i = 0; i < SOC_CPU_CORES_NUM; i++) {
50         if (i != core_id) {
51             esp_cpu_unstall(i);
52         }
53     }
54 #endif
55     // generate core reset
56     esp_rom_software_reset_system();
57     while (true) {
58         ;
59     }
60 }
61 
esp_get_free_heap_size(void)62 uint32_t esp_get_free_heap_size( void )
63 {
64     return heap_caps_get_free_size( MALLOC_CAP_DEFAULT );
65 }
66 
esp_get_free_internal_heap_size(void)67 uint32_t esp_get_free_internal_heap_size( void )
68 {
69     return heap_caps_get_free_size( MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL );
70 }
71 
esp_get_minimum_free_heap_size(void)72 uint32_t esp_get_minimum_free_heap_size( void )
73 {
74     return heap_caps_get_minimum_free_size( MALLOC_CAP_DEFAULT );
75 }
76 
esp_get_idf_version(void)77 const char *esp_get_idf_version(void)
78 {
79     return IDF_VER;
80 }
81 
esp_system_abort(const char * details)82 void __attribute__((noreturn)) esp_system_abort(const char *details)
83 {
84     panic_abort(details);
85 }
86