1#include "freertos/xtensa_rtos.h"
2#include "esp_private/panic_reason.h"
3#include "soc/soc.h"
4
5#include "sdkconfig.h"
6
7
8
9/*
10--------------------------------------------------------------------------------
11  Panic handler.
12  Should be reached by call0 (preferable) or jump only. If call0, a0 says where
13  from. If on simulator, display panic message and abort, else loop indefinitely.
14--------------------------------------------------------------------------------
15*/
16
17    .section .iram1,"ax"
18    .global panicHandler
19
20    .global     _xt_panic
21    .type       _xt_panic,@function
22    .align      4
23    .literal_position
24    .align      4
25
26_xt_panic:
27    /* Allocate exception frame and save minimal context. */
28    mov     a0, sp
29    addi    sp, sp, -XT_STK_FRMSZ
30    s32i    a0, sp, XT_STK_A1
31    #if XCHAL_HAVE_WINDOWED
32    s32e    a0, sp, -12                     /* for debug backtrace */
33    #endif
34    rsr     a0, PS                          /* save interruptee's PS */
35    s32i    a0, sp, XT_STK_PS
36    rsr     a0, EPC_1                       /* save interruptee's PC */
37    s32i    a0, sp, XT_STK_PC
38    rsr     a0, EXCSAVE_1                   /* save interruptee's a0 */
39    s32i    a0, sp, XT_STK_A0
40    #if XCHAL_HAVE_WINDOWED
41    s32e    a0, sp, -16                     /* for debug backtrace */
42    #endif
43    s32i    a12, sp, XT_STK_A12             /* _xt_context_save requires A12- */
44    s32i    a13, sp, XT_STK_A13             /* A13 to have already been saved */
45    call0   _xt_context_save
46
47    /* Save exc cause and vaddr into exception frame */
48    rsr     a0, EXCCAUSE
49    s32i    a0, sp, XT_STK_EXCCAUSE
50    rsr     a0, EXCVADDR
51    s32i    a0, sp, XT_STK_EXCVADDR
52
53    /* Set up PS for C, disable all interrupts except NMI and debug, and clear EXCM. */
54    movi    a0, PS_INTLEVEL(XCHAL_DEBUGLEVEL - 2) | PS_UM | PS_WOE
55    wsr     a0, PS
56
57    //Call panic handler
58    mov     a6,sp
59    call4 panicHandler
60
61    ret
62