1/*
2 * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/*  Default entry point:  */
8ENTRY(call_start_cpu0);
9
10SECTIONS
11{
12  /* RTC fast memory holds RTC wake stub code,
13     including from any source file named rtc_wake_stub*.c
14  */
15  .rtc.text :
16  {
17    _rtc_text_start = ABSOLUTE(.);
18    . = ALIGN(4);
19
20    _rtc_code_start = .;
21
22    mapping[rtc_text]
23
24    *rtc_wake_stub*.*(.literal .text .literal.* .text.*)
25    _rtc_code_end = .;
26
27    /* possibly align + add 16B for CPU dummy speculative instr. fetch */
28    . = ((_rtc_code_end - _rtc_code_start) == 0) ? ALIGN(0) : ALIGN(4) + 16;
29
30    _rtc_text_end = ABSOLUTE(.);
31  } > rtc_iram_seg
32
33  /*
34    This section is required to skip rtc.text area because rtc_iram_seg and
35    rtc_data_seg are reflect the same address space on different buses.
36  */
37  .rtc.dummy :
38  {
39    _rtc_dummy_start = ABSOLUTE(.);
40    _rtc_fast_start = ABSOLUTE(.);
41    . = SIZEOF(.rtc.text);
42    _rtc_dummy_end = ABSOLUTE(.);
43  } > rtc_data_seg
44
45  /* This section located in RTC FAST Memory area.
46     It holds data marked with RTC_FAST_ATTR attribute.
47     See the file "esp_attr.h" for more information.
48  */
49  .rtc.force_fast :
50  {
51    . = ALIGN(4);
52    _rtc_force_fast_start = ABSOLUTE(.);
53
54    mapping[rtc_force_fast]
55
56    *(.rtc.force_fast .rtc.force_fast.*)
57    . = ALIGN(4) ;
58    _rtc_force_fast_end = ABSOLUTE(.);
59  } > rtc_data_seg
60
61  /* RTC data section holds RTC wake stub
62     data/rodata, including from any source file
63     named rtc_wake_stub*.c and the data marked with
64     RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
65     The memory location of the data is dependent on
66     CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option.
67  */
68  .rtc.data :
69  {
70    _rtc_data_start = ABSOLUTE(.);
71
72    mapping[rtc_data]
73
74    *rtc_wake_stub*.*(.data .rodata .data.* .rodata.*)
75    _rtc_data_end = ABSOLUTE(.);
76  } > rtc_data_location
77
78  /* RTC bss, from any source file named rtc_wake_stub*.c */
79  .rtc.bss (NOLOAD) :
80  {
81    _rtc_bss_start = ABSOLUTE(.);
82    *rtc_wake_stub*.*(.bss .bss.*)
83    *rtc_wake_stub*.*(COMMON)
84
85    mapping[rtc_bss]
86
87    _rtc_bss_end = ABSOLUTE(.);
88  } > rtc_data_location
89
90  /* This section holds data that should not be initialized at power up
91     and will be retained during deep sleep.
92     User data marked with RTC_NOINIT_ATTR will be placed
93     into this section. See the file "esp_attr.h" for more information.
94     The memory location of the data is dependent on
95     CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option.
96  */
97  .rtc_noinit (NOLOAD):
98  {
99    . = ALIGN(4);
100    _rtc_noinit_start = ABSOLUTE(.);
101    *(.rtc_noinit .rtc_noinit.*)
102    . = ALIGN(4) ;
103    _rtc_noinit_end = ABSOLUTE(.);
104  } > rtc_data_location
105
106  /* This section located in RTC SLOW Memory area.
107     It holds data marked with RTC_SLOW_ATTR attribute.
108     See the file "esp_attr.h" for more information.
109  */
110  .rtc.force_slow :
111  {
112    . = ALIGN(4);
113    _rtc_force_slow_start = ABSOLUTE(.);
114    *(.rtc.force_slow .rtc.force_slow.*)
115    . = ALIGN(4) ;
116    _rtc_force_slow_end = ABSOLUTE(.);
117  } > rtc_slow_seg
118
119  /**
120   * This section holds RTC data that should have fixed addresses.
121   * The data are not initialized at power-up and are retained during deep sleep.
122   */
123  .rtc_reserved (NOLOAD):
124  {
125    . = ALIGN(4);
126    _rtc_reserved_start = ABSOLUTE(.);
127    /* New data can only be added here to ensure existing data are not moved.
128       Because data have adhered to the end of the segment and code is relied on it.
129       >> put new data here << */
130
131    *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
132    KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
133    _rtc_reserved_end = ABSOLUTE(.);
134  } > rtc_reserved_seg
135
136  _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
137  ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
138          "RTC reserved segment data does not fit.")
139
140  /* Get size of rtc slow data based on rtc_data_location alias */
141  _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
142                        ? (_rtc_force_slow_end - _rtc_data_start)
143                        : (_rtc_force_slow_end - _rtc_force_slow_start);
144
145  _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
146                        ? (_rtc_force_fast_end - _rtc_fast_start)
147                        : (_rtc_noinit_end - _rtc_fast_start);
148
149  ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
150          "RTC_SLOW segment data does not fit.")
151
152  ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
153          "RTC_FAST segment data does not fit.")
154
155  /* Send .iram0 code to iram */
156  .iram0.vectors :
157  {
158    _iram_start = ABSOLUTE(.);
159    /* Vectors go to IRAM */
160    _vector_table = ABSOLUTE(.);
161    /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
162    . = 0x0;
163    KEEP(*(.WindowVectors.text));
164    . = 0x180;
165    KEEP(*(.Level2InterruptVector.text));
166    . = 0x1c0;
167    KEEP(*(.Level3InterruptVector.text));
168    . = 0x200;
169    KEEP(*(.Level4InterruptVector.text));
170    . = 0x240;
171    KEEP(*(.Level5InterruptVector.text));
172    . = 0x280;
173    KEEP(*(.DebugExceptionVector.text));
174    . = 0x2c0;
175    KEEP(*(.NMIExceptionVector.text));
176    . = 0x300;
177    KEEP(*(.KernelExceptionVector.text));
178    . = 0x340;
179    KEEP(*(.UserExceptionVector.text));
180    . = 0x3C0;
181    KEEP(*(.DoubleExceptionVector.text));
182    . = 0x400;
183    _invalid_pc_placeholder = ABSOLUTE(.);
184    *(.*Vector.literal)
185
186    *(.UserEnter.literal);
187    *(.UserEnter.text);
188    . = ALIGN (16);
189    *(.entry.text)
190    *(.init.literal)
191    *(.init)
192    _init_end = ABSOLUTE(.);
193  } > iram0_0_seg
194
195  .iram0.text :
196  {
197    /* Code marked as runnning out of IRAM */
198    _iram_text_start = ABSOLUTE(.);
199
200    mapping[iram0_text]
201
202    /* Added to maintain compability, there are no iram0 data section to put
203     * sections:iram_coredump entry defined in espcoredump's linker.lf file */
204    _coredump_iram_start = 0;
205    _coredump_iram_end = 0;
206
207    /* align + add 16B for CPU dummy speculative instr. fetch */
208    . = ALIGN(_esp_memprot_align_size) + _esp_memprot_prefetch_pad_size;
209    /* iram_end_test section exists for use by memprot unit tests only */
210    *(.iram_end_test)
211    _iram_text_end = ABSOLUTE(.);
212  } > iram0_0_seg
213
214  .dram0_reserved_for_iram (NOLOAD):
215  {
216    . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
217  } > dram0_0_seg
218
219  .dram0.data :
220  {
221    _data_start = ABSOLUTE(.);
222    *(.gnu.linkonce.d.*)
223    *(.data1)
224    *(.sdata)
225    *(.sdata.*)
226    *(.gnu.linkonce.s.*)
227    *(.gnu.linkonce.s2.*)
228    *(.jcr)
229
230    mapping[dram0_data]
231
232    _data_end = ABSOLUTE(.);
233    . = ALIGN(4);
234  } > dram0_0_seg
235
236  /*This section holds data that should not be initialized at power up.
237    The section located in Internal SRAM memory region. The macro _NOINIT
238    can be used as attribute to place data into this section.
239    See the esp_attr.h file for more information.
240  */
241  .noinit (NOLOAD):
242  {
243    . = ALIGN(4);
244    _noinit_start = ABSOLUTE(.);
245    *(.noinit .noinit.*)
246    . = ALIGN(4) ;
247    _noinit_end = ABSOLUTE(.);
248  } > dram0_0_seg
249
250  /* External Memory BSS. (Variables with EXT_RAM_BSS_ATTR attribute). */
251  .ext_ram.bss (NOLOAD) :
252  {
253    _ext_ram_bss_start = ABSOLUTE(.);
254
255    mapping[extern_ram]
256
257    . = ALIGN(4);
258    _ext_ram_bss_end = ABSOLUTE(.);
259  } > extern_ram_seg
260
261  /**
262   * This section holds data that won't be initialised when startup.
263   * This section locates in External RAM region.
264   */
265  .ext_ram_noinit (NOLOAD) :
266  {
267    _ext_ram_noinit_start = ABSOLUTE(.);
268
269    *(.ext_ram_noinit*)
270
271    . = ALIGN(4);
272    _ext_ram_noinit_end = ABSOLUTE(.);
273  } > extern_ram_seg
274
275  /* Shared RAM */
276  .dram0.bss (NOLOAD) :
277  {
278    . = ALIGN (8);
279    _bss_start = ABSOLUTE(.);
280
281    mapping[dram0_bss]
282
283    *(.dynsbss)
284    *(.sbss)
285    *(.sbss.*)
286    *(.gnu.linkonce.sb.*)
287    *(.scommon)
288    *(.sbss2)
289    *(.sbss2.*)
290    *(.gnu.linkonce.sb2.*)
291    *(.dynbss)
292    *(.share.mem)
293    *(.gnu.linkonce.b.*)
294
295    . = ALIGN (8);
296    _bss_end = ABSOLUTE(.);
297  } > dram0_0_seg
298
299  .flash.appdesc : ALIGN(0x10)
300  {
301    _rodata_reserved_start = ABSOLUTE(.);  /* This is a symbol marking the flash.rodata start, this can be used for mmu driver to maintain virtual address */
302    _rodata_start = ABSOLUTE(.);
303
304    *(.rodata_desc .rodata_desc.*)               /* Should be the first.  App version info.        DO NOT PUT ANYTHING BEFORE IT! */
305    *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
306
307    /* Create an empty gap within this section. Thanks to this, the end of this
308     * section will match .flah.rodata's begin address. Thus, both sections
309     * will be merged when creating the final bin image. */
310    . = ALIGN(ALIGNOF(.flash.rodata));
311  } >default_rodata_seg
312
313  .flash.rodata : ALIGN(0x10)
314  {
315    _flash_rodata_start = ABSOLUTE(.);
316
317    mapping[flash_rodata]
318
319    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
320    *(.gnu.linkonce.r.*)
321    *(.rodata1)
322    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
323    *(.xt_except_table)
324    *(.gcc_except_table .gcc_except_table.*)
325    *(.gnu.linkonce.e.*)
326    *(.gnu.version_r)
327    . = (. + 3) & ~ 3;
328    __eh_frame = ABSOLUTE(.);
329    KEEP(*(.eh_frame))
330    . = (. + 7) & ~ 3;
331    /*  C++ constructor and destructor tables
332
333        Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt
334      */
335    __init_array_start = ABSOLUTE(.);
336    KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
337    __init_array_end = ABSOLUTE(.);
338    KEEP (*crtbegin.*(.dtors))
339    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
340    KEEP (*(SORT(.dtors.*)))
341    KEEP (*(.dtors))
342    /*  C++ exception handlers table:  */
343    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
344    *(.xt_except_desc)
345    *(.gnu.linkonce.h.*)
346    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
347    *(.xt_except_desc_end)
348    *(.dynamic)
349    *(.gnu.version_d)
350    /* Addresses of memory regions reserved via
351       SOC_RESERVE_MEMORY_REGION() */
352    soc_reserved_memory_region_start = ABSOLUTE(.);
353    KEEP (*(.reserved_memory_address))
354    soc_reserved_memory_region_end = ABSOLUTE(.);
355    /* System init functions registered via ESP_SYSTEM_INIT_FN */
356    _esp_system_init_fn_array_start = ABSOLUTE(.);
357    KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
358    _esp_system_init_fn_array_end = ABSOLUTE(.);
359    _rodata_end = ABSOLUTE(.);
360    /* Literals are also RO data. */
361    _lit4_start = ABSOLUTE(.);
362    *(*.lit4)
363    *(.lit4.*)
364    *(.gnu.linkonce.lit4.*)
365    _lit4_end = ABSOLUTE(.);
366    . = ALIGN(4);
367    _thread_local_start = ABSOLUTE(.);
368    *(.tdata)
369    *(.tdata.*)
370    *(.tbss)
371    *(.tbss.*)
372    _thread_local_end = ABSOLUTE(.);
373    . = ALIGN(4);
374  } >default_rodata_seg
375
376  _flash_rodata_align = ALIGNOF(.flash.rodata);
377
378  /*
379    This section is a place where we dump all the rodata which aren't used at runtime,
380    so as to avoid binary size increase
381  */
382  .flash.rodata_noload (NOLOAD) :
383  {
384    /*
385      This is a symbol marking the flash.rodata end, this can be used for mmu driver to maintain virtual address
386      We don't need to include the noload rodata in this section
387    */
388    _rodata_reserved_end = ABSOLUTE(.);
389    . = ALIGN (4);
390    mapping[rodata_noload]
391  } > default_rodata_seg
392
393  .flash.text :
394  {
395    _stext = .;
396    _instruction_reserved_start = ABSOLUTE(.);  /* This is a symbol marking the flash.text start, this can be used for mmu driver to maintain virtual address */
397    _text_start = ABSOLUTE(.);
398
399    mapping[flash_text]
400
401    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
402    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
403    *(.fini.literal)
404    *(.fini)
405    *(.gnu.version)
406
407    /** CPU will try to prefetch up to 16 bytes of
408      * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
409      * safe access to up to 16 bytes after the last real instruction, add
410      * dummy bytes to ensure this
411      */
412    . += _esp_flash_mmap_prefetch_pad_size;
413
414    _text_end = ABSOLUTE(.);
415    _instruction_reserved_end = ABSOLUTE(.);  /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */
416    _etext = .;
417
418    /* Similar to _iram_start, this symbol goes here so it is
419       resolved by addr2line in preference to the first symbol in
420       the flash.text segment.
421    */
422    _flash_cache_start = ABSOLUTE(0);
423  } >default_code_seg
424
425  /* Marks the end of IRAM code segment */
426  .iram0.text_end (NOLOAD) :
427  {
428    . = ALIGN (4);
429    _iram_end = ABSOLUTE(.);
430  } > iram0_0_seg
431
432  /* Marks the end of data, bss and possibly rodata  */
433  .dram0.heap_start (NOLOAD) :
434  {
435    . = ALIGN (8);
436    /* Lowest possible start address for the heap */
437    _heap_low_start = ABSOLUTE(.);
438  } > dram0_0_seg
439
440  /** This section will be used by the debugger and disassembler to get more information
441    * about raw data present in the code.
442    * Indeed, it may be required to add some padding at some points in the code
443    * in order to align a branch/jump destination on a particular bound.
444    * Padding these instructions will generate null bytes that shall be
445    * interpreted as data, and not code by the debugger or disassembler.
446    * This section will only be present in the ELF file, not in the final binary
447    * For more details, check GCC-212
448    */
449  .xt.prop 0 :
450  {
451    KEEP (*(.xt.prop .gnu.linkonce.prop.*))
452  }
453
454  .xt.lit 0 :
455  {
456    KEEP (*(.xt.lit .gnu.linkonce.p.*))
457  }
458}
459
460ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
461          "IRAM0 segment data does not fit.")
462
463ASSERT(((_heap_low_start - _data_start) <= LENGTH(dram0_0_seg)),
464          "DRAM segment data does not fit.")
465