1 /* 2 * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #pragma once 8 9 #ifdef __cplusplus 10 extern "C" { 11 #endif 12 13 #include <stdint.h> 14 #include <stdbool.h> 15 #include "soc/soc_caps.h" 16 17 #define ESP_ROM_EFUSE_FLASH_DEFAULT_SPI (0) 18 #define ESP_ROM_EFUSE_FLASH_DEFAULT_HSPI (1) 19 20 /** 21 * @brief A CRC8 algorithm used for MAC addresses stored in eFuse 22 * 23 * @param data Pointer to the original data 24 * @param len Data length in byte 25 * @return uint8_t CRC value 26 */ 27 uint8_t esp_rom_efuse_mac_address_crc8(const uint8_t *data, uint32_t len); 28 29 /** 30 * @brief Get SPI Flash GPIO pin configurations from eFuse 31 * 32 * @return uint32_t 33 * - 0: default SPI pins (ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) 34 * - 1: default HSPI pins (ESP_ROM_EFUSE_FLASH_DEFAULT_HSPI) 35 * - Others: Customized pin configuration mask. Pins are encoded as per the 36 * EFUSE_SPICONFIG_RET_SPICLK, EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, 37 * EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros. 38 * 39 * @note WP pin (for quad I/O modes) is not saved in eFuse and not returned by this function. 40 */ 41 uint32_t esp_rom_efuse_get_flash_gpio_info(void); 42 43 /** 44 * @brief Get SPI Flash WP pin information from eFuse 45 * 46 * @return uint32_t 47 * - 0x3F: invalid GPIO number 48 * - 0~46: valid GPIO number 49 */ 50 uint32_t esp_rom_efuse_get_flash_wp_gpio(void); 51 52 #if SOC_SPI_MEM_SUPPORT_OPI_MODE 53 /** 54 * @brief Read opi flash pads configuration from Efuse 55 * 56 * @return 57 * - 0 for default SPI pins. 58 * - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for: 59 * DQS, D4, D5, D6, D7 accordingly. 60 */ 61 uint32_t esp_rom_efuse_get_opiconfig(void); 62 #endif // SOC_SPI_MEM_SUPPORT_OPI_MODE 63 64 /** 65 * @brief Read eFuse to check whether secure boot has been enabled or not 66 * 67 * @return true if secure boot is enabled, otherwise false 68 */ 69 bool esp_rom_efuse_is_secure_boot_enabled(void); 70 71 #ifdef __cplusplus 72 } 73 #endif 74
