1 /* 2 * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #pragma once 8 9 #include <stdint.h> 10 #include "mspi_timing_tuning_configs.h" 11 12 #ifdef __cplusplus 13 extern "C" { 14 #endif 15 16 17 /** 18 * SPI timing tuning registers. 19 * Upper layer rely on these 3 registers to tune the timing. 20 */ 21 typedef struct { 22 uint8_t spi_din_mode; /*!< input signal delay mode*/ 23 uint8_t spi_din_num; /*!< input signal delay number */ 24 uint8_t extra_dummy_len; /*!< extra dummy length*/ 25 } mspi_timing_tuning_param_t; 26 27 typedef struct { 28 mspi_timing_tuning_param_t tuning_config_table[MSPI_TIMING_CONFIG_NUM_DEFAULT]; //available timing tuning configs 29 uint32_t available_config_num; 30 uint32_t default_config_id; //If tuning fails, we use this one as default 31 } mspi_timing_config_t; 32 33 /** 34 * The SPI FLASH module clock and SPI PSRAM module clock is divided from the SPI core clock, core clock is from system clock: 35 * 36 * PLL ----| |---- FLASH Module Clock 37 * XTAL ----|----> Core Clock ---->| 38 * RTC8M ----| |---- PSRAM Module Clock 39 * 40 */ 41 typedef enum { 42 MSPI_TIMING_CONFIG_CORE_CLOCK_80M, 43 MSPI_TIMING_CONFIG_CORE_CLOCK_120M, 44 MSPI_TIMING_CONFIG_CORE_CLOCK_160M, 45 MSPI_TIMING_CONFIG_CORE_CLOCK_240M 46 } mspi_timing_config_core_clock_t; 47 48 49 //-------------------------------------- Generic Config APIs --------------------------------------// 50 /** 51 * @brief Get required core clock, under current sdkconfig (Flash / PSRAM mode, speed, etc.) 52 */ 53 mspi_timing_config_core_clock_t mspi_timing_config_get_core_clock(void); 54 55 /** 56 * @brief Set MSPI core clock 57 * 58 * @param spi_num SPI0 / 1 59 * @param core_clock core clock 60 */ 61 void mspi_timing_config_set_core_clock(uint8_t spi_num, mspi_timing_config_core_clock_t core_clock); 62 63 /** 64 * @brief Set MSPI Flash module clock 65 * 66 * @param spi_num SPI0 / 1 67 * @param freqdiv Freq divider 68 */ 69 void mspi_timing_config_set_flash_clock(uint8_t spi_num, uint32_t freqdiv); 70 71 /** 72 * @brief Set MSPI Flash Din Mode and Din Num 73 * 74 * @param spi_num SPI0 / 1 75 * @param din_mode Din mode 76 * @param din_num Din num 77 */ 78 void mspi_timing_config_flash_set_din_mode_num(uint8_t spi_num, uint8_t din_mode, uint8_t din_num); 79 80 /** 81 * @brief Set MSPI Flash extra dummy 82 * 83 * @param spi_num SPI0 / 1 84 * @param extra_dummy extra dummy 85 */ 86 void mspi_timing_config_flash_set_extra_dummy(uint8_t spi_num, uint8_t extra_dummy); 87 88 /** 89 * @brief Configure Flash to read data via SPI1 90 * 91 * @param buf buffer 92 * @param addr address 93 * @param len length 94 */ 95 void mspi_timing_config_flash_read_data(uint8_t *buf, uint32_t addr, uint32_t len); 96 97 /** 98 * @brief Set MSPI PSRAM module clock 99 * 100 * @param spi_num SPI0 / 1 101 * @param freqdiv Freq divider 102 */ 103 void mspi_timing_config_set_psram_clock(uint8_t spi_num, uint32_t freqdiv); 104 105 /** 106 * @brief Set MSPI PSRAM Din Mode and Din Num 107 * 108 * @param spi_num SPI0 / 1 109 * @param din_mode Din mode 110 * @param din_num Din num 111 */ 112 void mspi_timing_config_psram_set_din_mode_num(uint8_t spi_num, uint8_t din_mode, uint8_t din_num); 113 114 /** 115 * @brief Set MSPI PSRAM extra dummy 116 * 117 * @param spi_num SPI0 / 1 118 * @param extra_dummy extra dummy 119 */ 120 void mspi_timing_config_psram_set_extra_dummy(uint8_t spi_num, uint8_t extra_dummy); 121 122 /** 123 * @brief Configure PSRAM to write data via SPI1 124 * 125 * @param buf buffer 126 * @param addr address 127 * @param len length 128 */ 129 void mspi_timing_config_psram_write_data(uint8_t *buf, uint32_t addr, uint32_t len); 130 131 /** 132 * @brief Configure PSRAM to read data via SPI1 133 * 134 * @param buf buffer 135 * @param addr address 136 * @param len length 137 */ 138 void mspi_timing_config_psram_read_data(uint8_t *buf, uint32_t addr, uint32_t len); 139 140 /*------------------------------------------------------------------------------------------------- 141 * SPI1 Timing Tuning APIs 142 * 143 * These APIs are only used in `mspi_timing_tuning.c` for configuring SPI1 timing 144 * tuning related registers to find best tuning parameter for Flash and PSRAM 145 *-------------------------------------------------------------------------------------------------*/ 146 /** 147 * @brief Tune Flash timing registers for SPI1 accessing Flash 148 * 149 * @param[in] params Timing parameters 150 */ 151 void mspi_timing_config_flash_set_tuning_regs(const mspi_timing_tuning_param_t *params); 152 153 /** 154 * @brief Tune PSRAM timing registers for SPI1 accessing PSRAM 155 * 156 * @param[in] params Timing parameters 157 */ 158 void mspi_timing_config_psram_set_tuning_regs(const mspi_timing_tuning_param_t *params); 159 160 161 /*------------------------------------------------------------------------------------------------- 162 * APIs for coordination with ESP Flash driver 163 *-------------------------------------------------------------------------------------------------*/ 164 /** 165 * SPI1 register info get APIs. These APIs inform `mspi_timing_tuning.c` (driver layer) of the SPI1 flash settings. 166 * In this way, other components (e.g.: esp_flash driver) can get the info from it (`mspi_timing_tuning.c`). 167 */ 168 169 /** 170 * @brief Get CS timing 171 * 172 * @param[out] setup_time Setup time 173 * @param[out] hold_time Hold time 174 */ 175 void mspi_timing_config_get_cs_timing(uint8_t *setup_time, uint32_t *hold_time); 176 177 /** 178 * @brief Get Flash clock reg val 179 * 180 * @return Flash clock reg val 181 */ 182 uint32_t mspi_timing_config_get_flash_clock_reg(void); 183 184 #ifdef __cplusplus 185 } 186 #endif 187
