1 /*
2  * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #pragma once
8 
9 /*
10 Note: This is a compatibility header. Call the interfaces in esp_cpu.h instead
11 */
12 
13 #include <stdint.h>
14 #include <stddef.h>
15 #include "soc/soc_caps.h"
16 #include "hal/cpu_ll.h"
17 #include "esp_cpu.h"
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 typedef enum {
24     WATCHPOINT_TRIGGER_ON_RO = ESP_CPU_WATCHPOINT_LOAD,     // on read
25     WATCHPOINT_TRIGGER_ON_WO = ESP_CPU_WATCHPOINT_STORE,    // on write
26     WATCHPOINT_TRIGGER_ON_RW = ESP_CPU_WATCHPOINT_ACCESS,   // on either read or write
27 } watchpoint_trigger_t;
28 
29 /**
30  * Return the ID of the core currently executing this code.
31  *
32  * @return core id [0..SOC_CPU_CORES_NUM - 1]
33  */
34 #define cpu_hal_get_core_id()           cpu_ll_get_core_id()
35 
36 /**
37  * Get the current value of the stack pointer.
38  *
39  * @return the current stack pointer
40  */
41 #define cpu_hal_get_sp()                cpu_ll_get_sp()
42 
43 /**
44  * Get the current value of the internal counter that increments
45  * every processor-clock cycle.
46  *
47  * @return cycle count; returns 0 if not supported
48  */
49 #define cpu_hal_get_cycle_count()       cpu_ll_get_cycle_count()
50 
51 /**
52  * Set the given value into the internal counter that increments
53  * every processor-clock cycle.
54  */
55 #define cpu_hal_set_cycle_count(val)    cpu_ll_set_cycle_count(val)
56 
57 /**
58  * Check if some form of debugger is attached to CPU.
59  *
60  * @return true debugger is attached
61  * @return false no debugger is attached/ no support for debuggers
62  */
63 #define cpu_hal_is_debugger_attached()  cpu_ll_is_debugger_attached()
64 
65 /**
66  * Init HW loop status.
67  */
68 #define cpu_hal_init_hwloop()           cpu_ll_init_hwloop()
69 
70 /**
71  * Trigger a call to debugger.
72  */
73 #define cpu_hal_break()                 cpu_ll_break()
74 
75 /**
76  * Wait for interrupt.
77  */
78 #define cpu_hal_waiti()                 cpu_ll_waiti()
79 
80 #if SOC_CPU_BREAKPOINTS_NUM > 0
81 
82 /**
83  * Set and enable breakpoint at an instruction address.
84  *
85  * @note Overwrites previously set breakpoint with same breakpoint ID.
86  *
87  * @param id breakpoint to set [0..SOC_CPU_BREAKPOINTS_NUM - 1]
88  * @param addr address to set a breakpoint on
89  */
cpu_hal_set_breakpoint(int id,const void * addr)90 static inline __attribute__((deprecated)) void cpu_hal_set_breakpoint(int id, const void *addr)
91 {
92     esp_cpu_set_breakpoint(id, addr);
93 }
94 /**
95  * Clear and disable breakpoint.
96  *
97  * @param id breakpoint to clear [0..SOC_CPU_BREAKPOINTS_NUM - 1]
98  */
cpu_hal_clear_breakpoint(int id)99 static inline __attribute__((deprecated)) void cpu_hal_clear_breakpoint(int id)
100 {
101     esp_cpu_clear_breakpoint(id);
102 }
103 
104 #endif // SOC_CPU_BREAKPOINTS_NUM > 0
105 
106 #if SOC_CPU_WATCHPOINTS_NUM > 0
107 
108 /**
109  * Set and enable a watchpoint, specifying the memory range and trigger operation.
110  *
111  * @param id watchpoint to set [0..SOC_CPU_WATCHPOINTS_NUM - 1]
112  * @param addr starting address
113  * @param size number of bytes from starting address to watch
114  * @param trigger operation on specified memory range that triggers the watchpoint (read, write, read/write)
115  */
116 static inline __attribute__((deprecated))
cpu_hal_set_watchpoint(int id,const void * addr,size_t size,watchpoint_trigger_t trigger)117 void cpu_hal_set_watchpoint(int id, const void *addr, size_t size, watchpoint_trigger_t trigger)
118 {
119     esp_cpu_set_watchpoint(id, addr, size, (esp_cpu_watchpoint_trigger_t)trigger);
120 }
121 
122 /**
123  * Clear and disable watchpoint.
124  *
125  * @param id watchpoint to clear [0..SOC_CPU_WATCHPOINTS_NUM - 1]
126  */
cpu_hal_clear_watchpoint(int id)127 static inline __attribute__((deprecated)) void cpu_hal_clear_watchpoint(int id)
128 {
129     esp_cpu_clear_watchpoint(id);
130 }
131 
132 #endif // SOC_CPU_WATCHPOINTS_NUM > 0
133 
134 /**
135  * Set exception vector table base address.
136  *
137  * @param base address to move the exception vector table to
138  */
139 static inline __attribute__((deprecated)) __attribute__((always_inline))
cpu_hal_set_vecbase(const void * base)140 void cpu_hal_set_vecbase(const void *base)
141 {
142     esp_cpu_intr_set_ivt_addr(base);
143 }
144 
145 #ifdef __cplusplus
146 }
147 #endif
148