1 2# field_name, | efuse_block, | bit_start, | bit_count, |comment # 3# | (EFUSE_BLK0 | (0..255) | (1-256) | # 4# | EFUSE_BLK1 | | | # 5# | ...) | | | # 6########################################################################## 7# !!!!!!!!!!! # 8# After editing this file, run the command manually "idf.py efuse-common-table" 9# this will generate new source files, next rebuild all the sources. 10# !!!!!!!!!!! # 11 12# This file was generated by regtools.py based on the efuses.yaml file with the version: f75f74727101326a187188a23f4a6c70 13 14WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses 15WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS 16WR_DIS.DIS_ICACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_ICACHE 17WR_DIS.DIS_DCACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DCACHE 18WR_DIS.DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_ICACHE 19WR_DIS.DIS_DOWNLOAD_DCACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_DCACHE 20WR_DIS.DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_FORCE_DOWNLOAD 21WR_DIS.DIS_USB_OTG, EFUSE_BLK0, 2, 1, [WR_DIS.DIS_USB] wr_dis of DIS_USB_OTG 22WR_DIS.DIS_TWAI, EFUSE_BLK0, 2, 1, [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI 23WR_DIS.DIS_APP_CPU, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_APP_CPU 24WR_DIS.DIS_PAD_JTAG, EFUSE_BLK0, 2, 1, [WR_DIS.HARD_DIS_JTAG] wr_dis of DIS_PAD_JTAG 25WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT 26WR_DIS.DIS_USB_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_USB_JTAG 27WR_DIS.DIS_USB_SERIAL_JTAG, EFUSE_BLK0, 2, 1, [WR_DIS.DIS_USB_DEVICE] wr_dis of DIS_USB_SERIAL_JTAG 28WR_DIS.STRAP_JTAG_SEL, EFUSE_BLK0, 2, 1, [] wr_dis of STRAP_JTAG_SEL 29WR_DIS.USB_PHY_SEL, EFUSE_BLK0, 2, 1, [] wr_dis of USB_PHY_SEL 30WR_DIS.VDD_SPI_XPD, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_XPD 31WR_DIS.VDD_SPI_TIEH, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_TIEH 32WR_DIS.VDD_SPI_FORCE, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_FORCE 33WR_DIS.WDT_DELAY_SEL, EFUSE_BLK0, 3, 1, [] wr_dis of WDT_DELAY_SEL 34WR_DIS.SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 4, 1, [] wr_dis of SPI_BOOT_CRYPT_CNT 35WR_DIS.SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 5, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0 36WR_DIS.SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 6, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1 37WR_DIS.SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 7, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2 38WR_DIS.KEY_PURPOSE_0, EFUSE_BLK0, 8, 1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0 39WR_DIS.KEY_PURPOSE_1, EFUSE_BLK0, 9, 1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1 40WR_DIS.KEY_PURPOSE_2, EFUSE_BLK0, 10, 1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2 41WR_DIS.KEY_PURPOSE_3, EFUSE_BLK0, 11, 1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3 42WR_DIS.KEY_PURPOSE_4, EFUSE_BLK0, 12, 1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4 43WR_DIS.KEY_PURPOSE_5, EFUSE_BLK0, 13, 1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5 44WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, [] wr_dis of SECURE_BOOT_EN 45WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 16, 1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE 46WR_DIS.FLASH_TPUW, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TPUW 47WR_DIS.DIS_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_DOWNLOAD_MODE 48WR_DIS.DIS_DIRECT_BOOT, EFUSE_BLK0, 18, 1, [WR_DIS.DIS_LEGACY_SPI_BOOT] wr_dis of DIS_DIRECT_BOOT 49WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 18, 1, [WR_DIS.UART_PRINT_CHANNEL] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT 50WR_DIS.FLASH_ECC_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_ECC_MODE 51WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [WR_DIS.DIS_USB_DOWNLOAD_MODE] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE 52WR_DIS.ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 18, 1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD 53WR_DIS.UART_PRINT_CONTROL, EFUSE_BLK0, 18, 1, [] wr_dis of UART_PRINT_CONTROL 54WR_DIS.PIN_POWER_SELECTION, EFUSE_BLK0, 18, 1, [] wr_dis of PIN_POWER_SELECTION 55WR_DIS.FLASH_TYPE, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TYPE 56WR_DIS.FLASH_PAGE_SIZE, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_PAGE_SIZE 57WR_DIS.FLASH_ECC_EN, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_ECC_EN 58WR_DIS.FORCE_SEND_RESUME, EFUSE_BLK0, 18, 1, [] wr_dis of FORCE_SEND_RESUME 59WR_DIS.SECURE_VERSION, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_VERSION 60WR_DIS.DIS_USB_OTG_DOWNLOAD_MODE, EFUSE_BLK0, 19, 1, [] wr_dis of DIS_USB_OTG_DOWNLOAD_MODE 61WR_DIS.DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 19, 1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR 62WR_DIS.DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 19, 1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR 63WR_DIS.BLK1, EFUSE_BLK0, 20, 1, [] wr_dis of BLOCK1 64WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC 65WR_DIS.SPI_PAD_CONFIG_CLK, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_CLK 66WR_DIS.SPI_PAD_CONFIG_Q, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_Q 67WR_DIS.SPI_PAD_CONFIG_D, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D 68WR_DIS.SPI_PAD_CONFIG_CS, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_CS 69WR_DIS.SPI_PAD_CONFIG_HD, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_HD 70WR_DIS.SPI_PAD_CONFIG_WP, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_WP 71WR_DIS.SPI_PAD_CONFIG_DQS, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_DQS 72WR_DIS.SPI_PAD_CONFIG_D4, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D4 73WR_DIS.SPI_PAD_CONFIG_D5, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D5 74WR_DIS.SPI_PAD_CONFIG_D6, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D6 75WR_DIS.SPI_PAD_CONFIG_D7, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D7 76WR_DIS.WAFER_VERSION_MINOR_LO, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR_LO 77WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION 78WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MINOR 79WR_DIS.FLASH_CAP, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_CAP 80WR_DIS.FLASH_TEMP, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_TEMP 81WR_DIS.FLASH_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_VENDOR 82WR_DIS.PSRAM_CAP, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_CAP 83WR_DIS.PSRAM_TEMP, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_TEMP 84WR_DIS.PSRAM_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of PSRAM_VENDOR 85WR_DIS.K_RTC_LDO, EFUSE_BLK0, 20, 1, [] wr_dis of K_RTC_LDO 86WR_DIS.K_DIG_LDO, EFUSE_BLK0, 20, 1, [] wr_dis of K_DIG_LDO 87WR_DIS.V_RTC_DBIAS20, EFUSE_BLK0, 20, 1, [] wr_dis of V_RTC_DBIAS20 88WR_DIS.V_DIG_DBIAS20, EFUSE_BLK0, 20, 1, [] wr_dis of V_DIG_DBIAS20 89WR_DIS.DIG_DBIAS_HVT, EFUSE_BLK0, 20, 1, [] wr_dis of DIG_DBIAS_HVT 90WR_DIS.WAFER_VERSION_MINOR_HI, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR_HI 91WR_DIS.WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR 92WR_DIS.ADC2_CAL_VOL_ATTEN3, EFUSE_BLK0, 20, 1, [] wr_dis of ADC2_CAL_VOL_ATTEN3 93WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2 94WR_DIS.OPTIONAL_UNIQUE_ID, EFUSE_BLK0, 21, 1, [] wr_dis of OPTIONAL_UNIQUE_ID 95WR_DIS.BLK_VERSION_MAJOR, EFUSE_BLK0, 21, 1, [] wr_dis of BLK_VERSION_MAJOR 96WR_DIS.TEMP_CALIB, EFUSE_BLK0, 21, 1, [] wr_dis of TEMP_CALIB 97WR_DIS.OCODE, EFUSE_BLK0, 21, 1, [] wr_dis of OCODE 98WR_DIS.ADC1_INIT_CODE_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN0 99WR_DIS.ADC1_INIT_CODE_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN1 100WR_DIS.ADC1_INIT_CODE_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN2 101WR_DIS.ADC1_INIT_CODE_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN3 102WR_DIS.ADC2_INIT_CODE_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_INIT_CODE_ATTEN0 103WR_DIS.ADC2_INIT_CODE_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_INIT_CODE_ATTEN1 104WR_DIS.ADC2_INIT_CODE_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_INIT_CODE_ATTEN2 105WR_DIS.ADC2_INIT_CODE_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_INIT_CODE_ATTEN3 106WR_DIS.ADC1_CAL_VOL_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN0 107WR_DIS.ADC1_CAL_VOL_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN1 108WR_DIS.ADC1_CAL_VOL_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN2 109WR_DIS.ADC1_CAL_VOL_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN3 110WR_DIS.ADC2_CAL_VOL_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_CAL_VOL_ATTEN0 111WR_DIS.ADC2_CAL_VOL_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_CAL_VOL_ATTEN1 112WR_DIS.ADC2_CAL_VOL_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_CAL_VOL_ATTEN2 113WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA 114WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC 115WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0 116WR_DIS.BLOCK_KEY1, EFUSE_BLK0, 24, 1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1 117WR_DIS.BLOCK_KEY2, EFUSE_BLK0, 25, 1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2 118WR_DIS.BLOCK_KEY3, EFUSE_BLK0, 26, 1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3 119WR_DIS.BLOCK_KEY4, EFUSE_BLK0, 27, 1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4 120WR_DIS.BLOCK_KEY5, EFUSE_BLK0, 28, 1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5 121WR_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 29, 1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2 122WR_DIS.USB_EXCHG_PINS, EFUSE_BLK0, 30, 1, [] wr_dis of USB_EXCHG_PINS 123WR_DIS.USB_EXT_PHY_ENABLE, EFUSE_BLK0, 30, 1, [WR_DIS.EXT_PHY_ENABLE] wr_dis of USB_EXT_PHY_ENABLE 124WR_DIS.SOFT_DIS_JTAG, EFUSE_BLK0, 31, 1, [] wr_dis of SOFT_DIS_JTAG 125RD_DIS, EFUSE_BLK0, 32, 7, [] Disable reading from BlOCK4-10 126RD_DIS.BLOCK_KEY0, EFUSE_BLK0, 32, 1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0 127RD_DIS.BLOCK_KEY1, EFUSE_BLK0, 33, 1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1 128RD_DIS.BLOCK_KEY2, EFUSE_BLK0, 34, 1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2 129RD_DIS.BLOCK_KEY3, EFUSE_BLK0, 35, 1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3 130RD_DIS.BLOCK_KEY4, EFUSE_BLK0, 36, 1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4 131RD_DIS.BLOCK_KEY5, EFUSE_BLK0, 37, 1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5 132RD_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 38, 1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2 133DIS_ICACHE, EFUSE_BLK0, 40, 1, [] Set this bit to disable Icache 134DIS_DCACHE, EFUSE_BLK0, 41, 1, [] Set this bit to disable Dcache 135DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 42, 1, [] Set this bit to disable Icache in download mode (boot_mode[3:0] is 0; 1; 2; 3; 6; 7) 136DIS_DOWNLOAD_DCACHE, EFUSE_BLK0, 43, 1, [] Set this bit to disable Dcache in download mode ( boot_mode[3:0] is 0; 1; 2; 3; 6; 7) 137DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, [] Set this bit to disable the function that forces chip into download mode 138DIS_USB_OTG, EFUSE_BLK0, 45, 1, [DIS_USB] Set this bit to disable USB function 139DIS_TWAI, EFUSE_BLK0, 46, 1, [DIS_CAN] Set this bit to disable CAN function 140DIS_APP_CPU, EFUSE_BLK0, 47, 1, [] Disable app cpu 141SOFT_DIS_JTAG, EFUSE_BLK0, 48, 3, [] Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module 142DIS_PAD_JTAG, EFUSE_BLK0, 51, 1, [HARD_DIS_JTAG] Set this bit to disable JTAG in the hard way. JTAG is disabled permanently 143DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 52, 1, [] Set this bit to disable flash encryption when in download boot modes 144USB_EXCHG_PINS, EFUSE_BLK0, 57, 1, [] Set this bit to exchange USB D+ and D- pins 145USB_EXT_PHY_ENABLE, EFUSE_BLK0, 58, 1, [EXT_PHY_ENABLE] Set this bit to enable external PHY 146VDD_SPI_XPD, EFUSE_BLK0, 68, 1, [] SPI regulator power up signal 147VDD_SPI_TIEH, EFUSE_BLK0, 69, 1, [] If VDD_SPI_FORCE is 1; determines VDD_SPI voltage {0: "VDD_SPI connects to 1.8 V LDO"; 1: "VDD_SPI connects to VDD3P3_RTC_IO"} 148VDD_SPI_FORCE, EFUSE_BLK0, 70, 1, [] Set this bit and force to use the configuration of eFuse to configure VDD_SPI 149WDT_DELAY_SEL, EFUSE_BLK0, 80, 2, [] RTC watchdog timeout threshold; in unit of slow clock cycle {0: "40000"; 1: "80000"; 2: "160000"; 3: "320000"} 150SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 82, 3, [] Enables flash encryption when 1 or 3 bits are set and disabled otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"} 151SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 85, 1, [] Revoke 1st secure boot key 152SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 86, 1, [] Revoke 2nd secure boot key 153SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 87, 1, [] Revoke 3rd secure boot key 154KEY_PURPOSE_0, EFUSE_BLK0, 88, 4, [KEY0_PURPOSE] Purpose of Key0 155KEY_PURPOSE_1, EFUSE_BLK0, 92, 4, [KEY1_PURPOSE] Purpose of Key1 156KEY_PURPOSE_2, EFUSE_BLK0, 96, 4, [KEY2_PURPOSE] Purpose of Key2 157KEY_PURPOSE_3, EFUSE_BLK0, 100, 4, [KEY3_PURPOSE] Purpose of Key3 158KEY_PURPOSE_4, EFUSE_BLK0, 104, 4, [KEY4_PURPOSE] Purpose of Key4 159KEY_PURPOSE_5, EFUSE_BLK0, 108, 4, [KEY5_PURPOSE] Purpose of Key5 160SECURE_BOOT_EN, EFUSE_BLK0, 116, 1, [] Set this bit to enable secure boot 161SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 117, 1, [] Set this bit to enable revoking aggressive secure boot 162DIS_USB_JTAG, EFUSE_BLK0, 118, 1, [] Set this bit to disable function of usb switch to jtag in module of usb device 163DIS_USB_SERIAL_JTAG, EFUSE_BLK0, 119, 1, [DIS_USB_DEVICE] Set this bit to disable usb device 164STRAP_JTAG_SEL, EFUSE_BLK0, 120, 1, [] Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0 165USB_PHY_SEL, EFUSE_BLK0, 121, 1, [] This bit is used to switch internal PHY and external PHY for USB OTG and USB Device {0: "internal PHY is assigned to USB Device while external PHY is assigned to USB OTG"; 1: "internal PHY is assigned to USB OTG while external PHY is assigned to USB Device"} 166FLASH_TPUW, EFUSE_BLK0, 124, 4, [] Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value. Otherwise; the waiting time is twice the configurable value 167DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, [] Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 3; 6; 7) 168DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, [DIS_LEGACY_SPI_BOOT] Disable direct boot mode 169DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 130, 1, [UART_PRINT_CHANNEL] USB printing {0: "Enable"; 1: "Disable"} 170FLASH_ECC_MODE, EFUSE_BLK0, 131, 1, [] Flash ECC mode in ROM {0: "16to18 byte"; 1: "16to17 byte"} 171DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, [DIS_USB_DOWNLOAD_MODE] Set this bit to disable UART download mode through USB 172ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, [] Set this bit to enable secure UART download mode 173UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, [] Set the default UART boot message output mode {0: "Enable"; 1: "Enable when GPIO46 is low at reset"; 2: "Enable when GPIO46 is high at reset"; 3: "Disable"} 174PIN_POWER_SELECTION, EFUSE_BLK0, 136, 1, [] Set default power supply for GPIO33-GPIO37; set when SPI flash is initialized {0: "VDD3P3_CPU"; 1: "VDD_SPI"} 175FLASH_TYPE, EFUSE_BLK0, 137, 1, [] SPI flash type {0: "4 data lines"; 1: "8 data lines"} 176FLASH_PAGE_SIZE, EFUSE_BLK0, 138, 2, [] Set Flash page size 177FLASH_ECC_EN, EFUSE_BLK0, 140, 1, [] Set 1 to enable ECC for flash boot 178FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, [] Set this bit to force ROM code to send a resume command during SPI boot 179SECURE_VERSION, EFUSE_BLK0, 142, 16, [] Secure version (used by ESP-IDF anti-rollback feature) 180DIS_USB_OTG_DOWNLOAD_MODE, EFUSE_BLK0, 159, 1, [] Set this bit to disable download through USB-OTG 181DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 160, 1, [] Disables check of wafer version major 182DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 161, 1, [] Disables check of blk version major 183MAC, EFUSE_BLK1, 40, 8, [MAC_FACTORY] MAC address 184, EFUSE_BLK1, 32, 8, [MAC_FACTORY] MAC address 185, EFUSE_BLK1, 24, 8, [MAC_FACTORY] MAC address 186, EFUSE_BLK1, 16, 8, [MAC_FACTORY] MAC address 187, EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address 188, EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address 189SPI_PAD_CONFIG_CLK, EFUSE_BLK1, 48, 6, [] SPI_PAD_configure CLK 190SPI_PAD_CONFIG_Q, EFUSE_BLK1, 54, 6, [] SPI_PAD_configure Q(D1) 191SPI_PAD_CONFIG_D, EFUSE_BLK1, 60, 6, [] SPI_PAD_configure D(D0) 192SPI_PAD_CONFIG_CS, EFUSE_BLK1, 66, 6, [] SPI_PAD_configure CS 193SPI_PAD_CONFIG_HD, EFUSE_BLK1, 72, 6, [] SPI_PAD_configure HD(D3) 194SPI_PAD_CONFIG_WP, EFUSE_BLK1, 78, 6, [] SPI_PAD_configure WP(D2) 195SPI_PAD_CONFIG_DQS, EFUSE_BLK1, 84, 6, [] SPI_PAD_configure DQS 196SPI_PAD_CONFIG_D4, EFUSE_BLK1, 90, 6, [] SPI_PAD_configure D4 197SPI_PAD_CONFIG_D5, EFUSE_BLK1, 96, 6, [] SPI_PAD_configure D5 198SPI_PAD_CONFIG_D6, EFUSE_BLK1, 102, 6, [] SPI_PAD_configure D6 199SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, [] SPI_PAD_configure D7 200WAFER_VERSION_MINOR_LO, EFUSE_BLK1, 114, 3, [] WAFER_VERSION_MINOR least significant bits 201PKG_VERSION, EFUSE_BLK1, 117, 3, [] Package version 202BLK_VERSION_MINOR, EFUSE_BLK1, 120, 3, [] BLK_VERSION_MINOR 203FLASH_CAP, EFUSE_BLK1, 123, 3, [] Flash capacity {0: "None"; 1: "8M"; 2: "4M"} 204FLASH_TEMP, EFUSE_BLK1, 126, 2, [] Flash temperature {0: "None"; 1: "105C"; 2: "85C"} 205FLASH_VENDOR, EFUSE_BLK1, 128, 3, [] Flash vendor {0: "None"; 1: "XMC"; 2: "GD"; 3: "FM"; 4: "TT"; 5: "BY"} 206PSRAM_CAP, EFUSE_BLK1, 131, 2, [] PSRAM capacity {0: "None"; 1: "8M"; 2: "2M"} 207PSRAM_TEMP, EFUSE_BLK1, 133, 2, [] PSRAM temperature {0: "None"; 1: "105C"; 2: "85C"} 208PSRAM_VENDOR, EFUSE_BLK1, 135, 2, [] PSRAM vendor {0: "None"; 1: "AP_3v3"; 2: "AP_1v8"} 209K_RTC_LDO, EFUSE_BLK1, 141, 7, [] BLOCK1 K_RTC_LDO 210K_DIG_LDO, EFUSE_BLK1, 148, 7, [] BLOCK1 K_DIG_LDO 211V_RTC_DBIAS20, EFUSE_BLK1, 155, 8, [] BLOCK1 voltage of rtc dbias20 212V_DIG_DBIAS20, EFUSE_BLK1, 163, 8, [] BLOCK1 voltage of digital dbias20 213DIG_DBIAS_HVT, EFUSE_BLK1, 171, 5, [] BLOCK1 digital dbias when hvt 214WAFER_VERSION_MINOR_HI, EFUSE_BLK1, 183, 1, [] WAFER_VERSION_MINOR most significant bit 215WAFER_VERSION_MAJOR, EFUSE_BLK1, 184, 2, [] WAFER_VERSION_MAJOR 216ADC2_CAL_VOL_ATTEN3, EFUSE_BLK1, 186, 6, [] ADC2 calibration voltage at atten3 217OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, [] Optional unique 128-bit ID 218BLK_VERSION_MAJOR, EFUSE_BLK2, 128, 2, [] BLK_VERSION_MAJOR of BLOCK2 {0: "No calib"; 1: "ADC calib V1"} 219TEMP_CALIB, EFUSE_BLK2, 132, 9, [] Temperature calibration data 220OCODE, EFUSE_BLK2, 141, 8, [] ADC OCode 221ADC1_INIT_CODE_ATTEN0, EFUSE_BLK2, 149, 8, [] ADC1 init code at atten0 222ADC1_INIT_CODE_ATTEN1, EFUSE_BLK2, 157, 6, [] ADC1 init code at atten1 223ADC1_INIT_CODE_ATTEN2, EFUSE_BLK2, 163, 6, [] ADC1 init code at atten2 224ADC1_INIT_CODE_ATTEN3, EFUSE_BLK2, 169, 6, [] ADC1 init code at atten3 225ADC2_INIT_CODE_ATTEN0, EFUSE_BLK2, 175, 8, [] ADC2 init code at atten0 226ADC2_INIT_CODE_ATTEN1, EFUSE_BLK2, 183, 6, [] ADC2 init code at atten1 227ADC2_INIT_CODE_ATTEN2, EFUSE_BLK2, 189, 6, [] ADC2 init code at atten2 228ADC2_INIT_CODE_ATTEN3, EFUSE_BLK2, 195, 6, [] ADC2 init code at atten3 229ADC1_CAL_VOL_ATTEN0, EFUSE_BLK2, 201, 8, [] ADC1 calibration voltage at atten0 230ADC1_CAL_VOL_ATTEN1, EFUSE_BLK2, 209, 8, [] ADC1 calibration voltage at atten1 231ADC1_CAL_VOL_ATTEN2, EFUSE_BLK2, 217, 8, [] ADC1 calibration voltage at atten2 232ADC1_CAL_VOL_ATTEN3, EFUSE_BLK2, 225, 8, [] ADC1 calibration voltage at atten3 233ADC2_CAL_VOL_ATTEN0, EFUSE_BLK2, 233, 8, [] ADC2 calibration voltage at atten0 234ADC2_CAL_VOL_ATTEN1, EFUSE_BLK2, 241, 7, [] ADC2 calibration voltage at atten1 235ADC2_CAL_VOL_ATTEN2, EFUSE_BLK2, 248, 7, [] ADC2 calibration voltage at atten2 236USER_DATA, EFUSE_BLK3, 0, 256, [BLOCK_USR_DATA] User data 237USER_DATA.MAC_CUSTOM, EFUSE_BLK3, 200, 48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC 238KEY0, EFUSE_BLK4, 0, 256, [BLOCK_KEY0] Key0 or user data 239KEY1, EFUSE_BLK5, 0, 256, [BLOCK_KEY1] Key1 or user data 240KEY2, EFUSE_BLK6, 0, 256, [BLOCK_KEY2] Key2 or user data 241KEY3, EFUSE_BLK7, 0, 256, [BLOCK_KEY3] Key3 or user data 242KEY4, EFUSE_BLK8, 0, 256, [BLOCK_KEY4] Key4 or user data 243KEY5, EFUSE_BLK9, 0, 256, [BLOCK_KEY5] Key5 or user data 244SYS_DATA_PART2, EFUSE_BLK10, 0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved) 245
