1 /*
2 * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <sys/param.h>
8 #include "sdkconfig.h"
9 #include "esp_log.h"
10 #include "assert.h"
11 #include "esp_efuse_utility.h"
12 #include "soc/efuse_periph.h"
13 #include "esp_private/esp_clk.h"
14 #include "esp32c2/rom/efuse.h"
15 #include "hal/efuse_hal.h"
16
17 static const char *TAG = "efuse";
18
19 #ifdef CONFIG_EFUSE_VIRTUAL
20 extern uint32_t virt_blocks[EFUSE_BLK_MAX][COUNT_EFUSE_REG_PER_BLOCK];
21 #endif // CONFIG_EFUSE_VIRTUAL
22
23 /*Range addresses to read blocks*/
24 const esp_efuse_range_addr_t range_read_addr_blocks[] = {
25 {EFUSE_RD_WR_DIS_REG, EFUSE_RD_REPEAT_DATA0_REG}, // range address of EFUSE_BLK0 (2 regs) REPEAT
26 {EFUSE_RD_BLK1_DATA0_REG, EFUSE_RD_BLK1_DATA2_REG}, // range address of EFUSE_BLK1 (3 regs) SYS_DATA_PART0
27 {EFUSE_RD_BLK2_DATA0_REG, EFUSE_RD_BLK2_DATA7_REG}, // range address of EFUSE_BLK2 (8 regs) SYS_DATA_PART_1
28 {EFUSE_RD_BLK3_DATA0_REG, EFUSE_RD_BLK3_DATA7_REG}, // range address of EFUSE_BLK3 (8 regs) KEY0
29 };
30
31 static uint32_t write_mass_blocks[EFUSE_BLK_MAX][COUNT_EFUSE_REG_PER_BLOCK] = { 0 };
32
33 /*Range addresses to write blocks (it is not real regs, it is buffer) */
34 const esp_efuse_range_addr_t range_write_addr_blocks[] = {
35 {(uint32_t) &write_mass_blocks[EFUSE_BLK0][0], (uint32_t) &write_mass_blocks[EFUSE_BLK0][1]},
36 {(uint32_t) &write_mass_blocks[EFUSE_BLK1][0], (uint32_t) &write_mass_blocks[EFUSE_BLK1][2]},
37 {(uint32_t) &write_mass_blocks[EFUSE_BLK2][0], (uint32_t) &write_mass_blocks[EFUSE_BLK2][7]},
38 {(uint32_t) &write_mass_blocks[EFUSE_BLK3][0], (uint32_t) &write_mass_blocks[EFUSE_BLK3][7]},
39 };
40
41 #ifndef CONFIG_EFUSE_VIRTUAL
42 // Update Efuse timing configuration
esp_efuse_set_timing(void)43 static esp_err_t esp_efuse_set_timing(void)
44 {
45 efuse_hal_set_timing(0);
46 return ESP_OK;
47 }
48 #endif // ifndef CONFIG_EFUSE_VIRTUAL
49
50 // Efuse read operation: copies data from physical efuses to efuse read registers.
esp_efuse_utility_clear_program_registers(void)51 void esp_efuse_utility_clear_program_registers(void)
52 {
53 ets_efuse_read();
54 ets_efuse_clear_program_registers();
55 }
56
esp_efuse_utility_check_errors(void)57 esp_err_t esp_efuse_utility_check_errors(void)
58 {
59 return ESP_OK;
60 }
61
62 // Burn values written to the efuse write registers
esp_efuse_utility_burn_chip(void)63 esp_err_t esp_efuse_utility_burn_chip(void)
64 {
65 esp_err_t error = ESP_OK;
66 #ifdef CONFIG_EFUSE_VIRTUAL
67 ESP_LOGW(TAG, "Virtual efuses enabled: Not really burning eFuses");
68 for (int num_block = EFUSE_BLK_MAX - 1; num_block >= EFUSE_BLK0; num_block--) {
69 int subblock = 0;
70 for (uint32_t addr_wr_block = range_write_addr_blocks[num_block].start; addr_wr_block <= range_write_addr_blocks[num_block].end; addr_wr_block += 4) {
71 virt_blocks[num_block][subblock++] |= REG_READ(addr_wr_block);
72 }
73 }
74 #ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
75 esp_efuse_utility_write_efuses_to_flash();
76 #endif
77 #else // CONFIG_EFUSE_VIRTUAL
78 if (esp_efuse_set_timing() != ESP_OK) {
79 ESP_LOGE(TAG, "Efuse fields are not burnt");
80 } else {
81 // Permanently update values written to the efuse write registers
82 // It is necessary to process blocks in the order from MAX-> EFUSE_BLK0, because EFUSE_BLK0 has protection bits for other blocks.
83 for (int num_block = EFUSE_BLK_MAX - 1; num_block >= EFUSE_BLK0; num_block--) {
84 bool need_burn_block = false;
85 for (uint32_t addr_wr_block = range_write_addr_blocks[num_block].start; addr_wr_block <= range_write_addr_blocks[num_block].end; addr_wr_block += 4) {
86 if (REG_READ(addr_wr_block) != 0) {
87 need_burn_block = true;
88 break;
89 }
90 }
91 if (!need_burn_block) {
92 continue;
93 }
94 if (error) {
95 // It is done for a use case: BLOCK2 (Flash encryption key) could have an error (incorrect written data)
96 // in this case we can not burn any data into BLOCK0 because it might set read/write protections of BLOCK2.
97 ESP_LOGE(TAG, "BLOCK%d can not be burned because a previous block got an error, skipped.", num_block);
98 continue;
99 }
100 efuse_hal_clear_program_registers();
101 if (esp_efuse_get_coding_scheme(num_block) == EFUSE_CODING_SCHEME_RS) {
102 uint8_t block_rs[12];
103 efuse_hal_rs_calculate((void *)range_write_addr_blocks[num_block].start, block_rs);
104 hal_memcpy((void *)EFUSE_PGM_CHECK_VALUE0_REG, block_rs, sizeof(block_rs));
105 }
106 unsigned r_data_len = (range_read_addr_blocks[num_block].end - range_read_addr_blocks[num_block].start) + sizeof(uint32_t);
107 unsigned data_len = (range_write_addr_blocks[num_block].end - range_write_addr_blocks[num_block].start) + sizeof(uint32_t);
108 memcpy((void *)EFUSE_PGM_DATA0_REG, (void *)range_write_addr_blocks[num_block].start, data_len);
109
110 uint32_t backup_write_data[8 + 3]; // 8 words are data and 3 words are RS coding data
111 hal_memcpy(backup_write_data, (void *)EFUSE_PGM_DATA0_REG, sizeof(backup_write_data));
112 int repeat_burn_op = 1;
113 bool correct_written_data;
114 bool coding_error_before = efuse_hal_is_coding_error_in_block(num_block);
115 if (coding_error_before) {
116 ESP_LOGW(TAG, "BLOCK%d already has a coding error", num_block);
117 }
118 bool coding_error_occurred;
119
120 do {
121 ESP_LOGI(TAG, "BURN BLOCK%d", num_block);
122 efuse_hal_program(num_block); // BURN a block
123
124 bool coding_error_after;
125 for (unsigned i = 0; i < 5; i++) {
126 efuse_hal_read();
127 coding_error_after = efuse_hal_is_coding_error_in_block(num_block);
128 if (coding_error_after == true) {
129 break;
130 }
131 }
132 coding_error_occurred = (coding_error_before != coding_error_after) && coding_error_before == false;
133 if (coding_error_occurred) {
134 ESP_LOGW(TAG, "BLOCK%d got a coding error", num_block);
135 }
136
137 correct_written_data = esp_efuse_utility_is_correct_written_data(num_block, r_data_len);
138 if (!correct_written_data || coding_error_occurred) {
139 ESP_LOGW(TAG, "BLOCK%d: next retry to fix an error [%d/3]...", num_block, repeat_burn_op);
140 hal_memcpy((void *)EFUSE_PGM_DATA0_REG, (void *)backup_write_data, sizeof(backup_write_data));
141 }
142
143 } while ((!correct_written_data || coding_error_occurred) && repeat_burn_op++ < 3);
144
145 if (coding_error_occurred) {
146 ESP_LOGW(TAG, "Coding error was not fixed");
147 if (num_block == 0) {
148 ESP_LOGE(TAG, "BLOCK0 got a coding error, which might be critical for security");
149 error = ESP_FAIL;
150 }
151 }
152 if (!correct_written_data) {
153 ESP_LOGE(TAG, "Written data are incorrect");
154 error = ESP_FAIL;
155 }
156 }
157 }
158 #endif // CONFIG_EFUSE_VIRTUAL
159 esp_efuse_utility_reset();
160 return error;
161 }
162
163 // After esp_efuse_write.. functions EFUSE_BLKx_WDATAx_REG were filled is not coded values.
164 // This function reads EFUSE_BLKx_WDATAx_REG registers, and checks possible to write these data with RS coding scheme.
165 // The RS coding scheme does not require data changes for the encoded data. esp32s2 has special registers for this.
166 // They will be filled during the burn operation.
esp_efuse_utility_apply_new_coding_scheme()167 esp_err_t esp_efuse_utility_apply_new_coding_scheme()
168 {
169 // start with EFUSE_BLK1. EFUSE_BLK0 - always uses EFUSE_CODING_SCHEME_NONE.
170 for (int num_block = EFUSE_BLK1; num_block < EFUSE_BLK_MAX; num_block++) {
171 if (esp_efuse_get_coding_scheme(num_block) == EFUSE_CODING_SCHEME_RS) {
172 for (uint32_t addr_wr_block = range_write_addr_blocks[num_block].start; addr_wr_block <= range_write_addr_blocks[num_block].end; addr_wr_block += 4) {
173 if (REG_READ(addr_wr_block)) {
174 int num_reg = 0;
175 for (uint32_t addr_rd_block = range_read_addr_blocks[num_block].start; addr_rd_block <= range_read_addr_blocks[num_block].end; addr_rd_block += 4, ++num_reg) {
176 if (esp_efuse_utility_read_reg(num_block, num_reg)) {
177 ESP_LOGE(TAG, "Bits are not empty. Write operation is forbidden.");
178 return ESP_ERR_CODING;
179 }
180 }
181 break;
182 }
183 }
184 }
185 }
186 return ESP_OK;
187 }
188
