1 /*
2 * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <string.h>
8 #include "esp_log.h"
9 #include "esp_err.h"
10 #include "esp_check.h"
11 #include "esp_intr_alloc.h"
12 #include "freertos/FreeRTOS.h"
13 #include "driver/timer_types_legacy.h"
14 #include "hal/timer_hal.h"
15 #include "hal/timer_ll.h"
16 #include "hal/check.h"
17 #include "soc/timer_periph.h"
18 #include "esp_clk_tree.h"
19 #include "soc/timer_group_reg.h"
20 #include "esp_private/periph_ctrl.h"
21
22 static const char *TIMER_TAG = "timer_group";
23
24 #define TIMER_GROUP_NUM_ERROR "TIMER GROUP NUM ERROR"
25 #define TIMER_NUM_ERROR "HW TIMER NUM ERROR"
26 #define TIMER_PARAM_ADDR_ERROR "HW TIMER PARAM ADDR ERROR"
27 #define TIMER_NEVER_INIT_ERROR "HW TIMER NEVER INIT ERROR"
28 #define TIMER_COUNT_DIR_ERROR "HW TIMER COUNTER DIR ERROR"
29 #define TIMER_AUTORELOAD_ERROR "HW TIMER AUTORELOAD ERROR"
30 #define TIMER_SCALE_ERROR "HW TIMER SCALE ERROR"
31 #define TIMER_ALARM_ERROR "HW TIMER ALARM ERROR"
32 #define DIVIDER_RANGE_ERROR "HW TIMER divider outside of [2, 65536] range error"
33
34 #define TIMER_ENTER_CRITICAL(mux) portENTER_CRITICAL_SAFE(mux);
35 #define TIMER_EXIT_CRITICAL(mux) portEXIT_CRITICAL_SAFE(mux);
36
37 typedef struct {
38 timer_isr_t fn; /*!< isr function */
39 void *args; /*!< isr function args */
40 timer_isr_handle_t timer_isr_handle; /*!< interrupt handle */
41 timer_group_t isr_timer_group; /*!< timer group of interrupt triggered */
42 } timer_isr_func_t;
43
44 typedef struct {
45 timer_hal_context_t hal;
46 timer_isr_func_t timer_isr_fun;
47 timer_src_clk_t clk_src;
48 gptimer_count_direction_t direction;
49 uint32_t divider;
50 uint64_t alarm_value;
51 bool alarm_en;
52 bool auto_reload_en;
53 bool counter_en;
54 } timer_obj_t;
55
56 static timer_obj_t *p_timer_obj[TIMER_GROUP_MAX][TIMER_MAX] = {0};
57 static portMUX_TYPE timer_spinlock[TIMER_GROUP_MAX] = { [0 ... TIMER_GROUP_MAX - 1] = portMUX_INITIALIZER_UNLOCKED, };
58
timer_get_counter_value(timer_group_t group_num,timer_idx_t timer_num,uint64_t * timer_val)59 esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *timer_val)
60 {
61 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
62 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
63 ESP_RETURN_ON_FALSE(timer_val != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
64 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
65 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
66 *timer_val = timer_hal_capture_and_get_counter_value(&p_timer_obj[group_num][timer_num]->hal);
67 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
68 return ESP_OK;
69 }
70
timer_get_counter_time_sec(timer_group_t group_num,timer_idx_t timer_num,double * time)71 esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_num, double *time)
72 {
73 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
74 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
75 ESP_RETURN_ON_FALSE(time != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
76 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
77 uint64_t timer_val = timer_hal_capture_and_get_counter_value(&p_timer_obj[group_num][timer_num]->hal);
78 uint32_t div = p_timer_obj[group_num][timer_num]->divider;
79 // get clock source frequency
80 uint32_t counter_src_hz = 0;
81 ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)p_timer_obj[group_num][timer_num]->clk_src,
82 ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &counter_src_hz),
83 TIMER_TAG, "get clock source frequency failed");
84 *time = (double)timer_val * div / counter_src_hz;
85 return ESP_OK;
86 }
87
timer_set_counter_value(timer_group_t group_num,timer_idx_t timer_num,uint64_t load_val)88 esp_err_t timer_set_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t load_val)
89 {
90 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
91 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
92 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
93 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
94 timer_hal_set_counter_value(&(p_timer_obj[group_num][timer_num]->hal), load_val);
95 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
96 return ESP_OK;
97 }
98
timer_start(timer_group_t group_num,timer_idx_t timer_num)99 esp_err_t timer_start(timer_group_t group_num, timer_idx_t timer_num)
100 {
101 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
102 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
103 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
104 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
105 timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, true);
106 p_timer_obj[group_num][timer_num]->counter_en = true;
107 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
108 return ESP_OK;
109 }
110
timer_pause(timer_group_t group_num,timer_idx_t timer_num)111 esp_err_t timer_pause(timer_group_t group_num, timer_idx_t timer_num)
112 {
113 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
114 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
115 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
116 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
117 timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, false);
118 p_timer_obj[group_num][timer_num]->counter_en = false;
119 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
120 return ESP_OK;
121 }
122
timer_set_counter_mode(timer_group_t group_num,timer_idx_t timer_num,timer_count_dir_t counter_dir)123 esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num, timer_count_dir_t counter_dir)
124 {
125 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
126 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
127 ESP_RETURN_ON_FALSE(counter_dir < TIMER_COUNT_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_COUNT_DIR_ERROR);
128 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
129 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
130 timer_ll_set_count_direction(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, counter_dir);
131 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
132 return ESP_OK;
133 }
134
timer_set_auto_reload(timer_group_t group_num,timer_idx_t timer_num,timer_autoreload_t reload)135 esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload)
136 {
137 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
138 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
139 ESP_RETURN_ON_FALSE(reload < TIMER_AUTORELOAD_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_AUTORELOAD_ERROR);
140 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
141 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
142 timer_ll_enable_auto_reload(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, reload);
143 p_timer_obj[group_num][timer_num]->auto_reload_en = reload;
144 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
145 return ESP_OK;
146 }
147
timer_set_divider(timer_group_t group_num,timer_idx_t timer_num,uint32_t divider)148 esp_err_t timer_set_divider(timer_group_t group_num, timer_idx_t timer_num, uint32_t divider)
149 {
150 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
151 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
152 ESP_RETURN_ON_FALSE(divider > 1 && divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
153 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
154 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
155 timer_ll_set_clock_prescale(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, divider);
156 p_timer_obj[group_num][timer_num]->divider = divider;
157 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
158 return ESP_OK;
159 }
160
timer_set_alarm_value(timer_group_t group_num,timer_idx_t timer_num,uint64_t alarm_value)161 esp_err_t timer_set_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_value)
162 {
163 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
164 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
165 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
166 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
167 timer_ll_set_alarm_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_value);
168 p_timer_obj[group_num][timer_num]->alarm_value = alarm_value;
169 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
170 return ESP_OK;
171 }
172
timer_get_alarm_value(timer_group_t group_num,timer_idx_t timer_num,uint64_t * alarm_value)173 esp_err_t timer_get_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *alarm_value)
174 {
175 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
176 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
177 ESP_RETURN_ON_FALSE(alarm_value != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
178 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
179 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
180 *alarm_value = p_timer_obj[group_num][timer_num]->alarm_value;
181 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
182 return ESP_OK;
183 }
184
timer_set_alarm(timer_group_t group_num,timer_idx_t timer_num,timer_alarm_t alarm_en)185 esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_alarm_t alarm_en)
186 {
187 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
188 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
189 ESP_RETURN_ON_FALSE(alarm_en < TIMER_ALARM_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_ALARM_ERROR);
190 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
191 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
192 timer_ll_enable_alarm(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_en);
193 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
194 return ESP_OK;
195 }
196
timer_isr_default(void * arg)197 static void IRAM_ATTR timer_isr_default(void *arg)
198 {
199 bool is_awoken = false;
200 timer_obj_t *timer_obj = (timer_obj_t *)arg;
201 if (timer_obj == NULL || timer_obj->timer_isr_fun.fn == NULL) {
202 return;
203 }
204 uint32_t timer_id = timer_obj->hal.timer_id;
205 timer_hal_context_t *hal = &timer_obj->hal;
206 TIMER_ENTER_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
207 uint32_t intr_status = timer_ll_get_intr_status(hal->dev);
208 uint64_t old_alarm_value = timer_obj->alarm_value;
209 if (intr_status & TIMER_LL_EVENT_ALARM(timer_id)) {
210 // Clear interrupt status
211 timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_id));
212 // call user registered callback
213 is_awoken = timer_obj->timer_isr_fun.fn(timer_obj->timer_isr_fun.args);
214 // reenable alarm if required
215 uint64_t new_alarm_value = timer_obj->alarm_value;
216 bool reenable_alarm = (new_alarm_value != old_alarm_value) || timer_obj->auto_reload_en;
217 timer_ll_enable_alarm(hal->dev, timer_id, reenable_alarm);
218 }
219 TIMER_EXIT_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
220
221 if (is_awoken) {
222 portYIELD_FROM_ISR();
223 }
224 }
225
timer_enable_intr(timer_group_t group_num,timer_idx_t timer_num)226 esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num)
227 {
228 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
229 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
230 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
231 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
232 timer_ll_enable_intr(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num), true);
233 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
234 return ESP_OK;
235 }
236
timer_disable_intr(timer_group_t group_num,timer_idx_t timer_num)237 esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num)
238 {
239 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
240 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
241 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
242 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
243 timer_ll_enable_intr(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num), false);
244 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
245 return ESP_OK;
246 }
247
timer_isr_register(timer_group_t group_num,timer_idx_t timer_num,void (* fn)(void *),void * arg,int intr_alloc_flags,timer_isr_handle_t * handle)248 esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num,
249 void (*fn)(void *), void *arg, int intr_alloc_flags, timer_isr_handle_t *handle)
250 {
251 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
252 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
253 ESP_RETURN_ON_FALSE(fn != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
254 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
255 timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
256 return esp_intr_alloc_intrstatus(timer_group_periph_signals.groups[group_num].timer_irq_id[timer_num],
257 intr_alloc_flags,
258 (uint32_t)timer_ll_get_intr_status_reg(hal->dev),
259 TIMER_LL_EVENT_ALARM(timer_num), fn, arg, handle);
260 }
261
timer_isr_callback_add(timer_group_t group_num,timer_idx_t timer_num,timer_isr_t isr_handler,void * args,int intr_alloc_flags)262 esp_err_t timer_isr_callback_add(timer_group_t group_num, timer_idx_t timer_num, timer_isr_t isr_handler, void *args, int intr_alloc_flags)
263 {
264 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
265 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
266 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
267 esp_err_t ret = ESP_OK;
268
269 timer_disable_intr(group_num, timer_num);
270 p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = isr_handler;
271 p_timer_obj[group_num][timer_num]->timer_isr_fun.args = args;
272 p_timer_obj[group_num][timer_num]->timer_isr_fun.isr_timer_group = group_num;
273 ret = timer_isr_register(group_num, timer_num, timer_isr_default, (void *)p_timer_obj[group_num][timer_num],
274 intr_alloc_flags, &(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle));
275 ESP_RETURN_ON_ERROR(ret, TIMER_TAG, "register interrupt service failed");
276 timer_enable_intr(group_num, timer_num);
277
278 return ret;
279 }
280
timer_isr_callback_remove(timer_group_t group_num,timer_idx_t timer_num)281 esp_err_t timer_isr_callback_remove(timer_group_t group_num, timer_idx_t timer_num)
282 {
283 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
284 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
285 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
286
287 timer_disable_intr(group_num, timer_num);
288 p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = NULL;
289 p_timer_obj[group_num][timer_num]->timer_isr_fun.args = NULL;
290 esp_intr_free(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle);
291
292 return ESP_OK;
293 }
294
timer_init(timer_group_t group_num,timer_idx_t timer_num,const timer_config_t * config)295 esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer_config_t *config)
296 {
297 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
298 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
299 ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
300 ESP_RETURN_ON_FALSE(config->divider > 1 && config->divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
301 ESP_RETURN_ON_FALSE(config->intr_type < TIMER_INTR_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, "only support Level Interrupt");
302 if (p_timer_obj[group_num][timer_num] == NULL) {
303 p_timer_obj[group_num][timer_num] = (timer_obj_t *) heap_caps_calloc(1, sizeof(timer_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
304 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num], ESP_ERR_NO_MEM, TIMER_TAG, "no mem for timer object");
305 }
306 timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
307
308 periph_module_enable(timer_group_periph_signals.groups[group_num].module);
309
310 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
311 timer_hal_init(hal, group_num, timer_num);
312 timer_hal_set_counter_value(hal, 0);
313
314 timer_src_clk_t clk_src = TIMER_SRC_CLK_DEFAULT;
315 if (config->clk_src) {
316 clk_src = config->clk_src;
317 }
318 // although `clk_src` is of `timer_src_clk_t` type, but it's binary compatible with `gptimer_clock_source_t`,
319 // as the underlying enum entries come from the same `soc_module_clk_t`
320 timer_ll_set_clock_source(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, (gptimer_clock_source_t)clk_src);
321 timer_ll_set_clock_prescale(hal->dev, timer_num, config->divider);
322 timer_ll_set_count_direction(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, config->counter_dir);
323 timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(timer_num), false);
324 timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_num));
325 timer_ll_enable_alarm(hal->dev, timer_num, config->alarm_en);
326 timer_ll_enable_auto_reload(hal->dev, timer_num, config->auto_reload);
327 timer_ll_enable_counter(hal->dev, timer_num, config->counter_en);
328 p_timer_obj[group_num][timer_num]->clk_src = clk_src;
329 p_timer_obj[group_num][timer_num]->alarm_en = config->alarm_en;
330 p_timer_obj[group_num][timer_num]->auto_reload_en = config->auto_reload;
331 p_timer_obj[group_num][timer_num]->direction = config->counter_dir;
332 p_timer_obj[group_num][timer_num]->counter_en = config->counter_en;
333 p_timer_obj[group_num][timer_num]->divider = config->divider;
334 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
335
336 return ESP_OK;
337 }
338
timer_deinit(timer_group_t group_num,timer_idx_t timer_num)339 esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num)
340 {
341 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
342 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
343 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
344 timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
345
346 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
347 timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(timer_num), false);
348 timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_num));
349 timer_hal_deinit(hal);
350 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
351
352 free(p_timer_obj[group_num][timer_num]);
353 p_timer_obj[group_num][timer_num] = NULL;
354
355 return ESP_OK;
356 }
357
timer_get_config(timer_group_t group_num,timer_idx_t timer_num,timer_config_t * config)358 esp_err_t timer_get_config(timer_group_t group_num, timer_idx_t timer_num, timer_config_t *config)
359 {
360 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
361 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
362 ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
363 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
364
365 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
366 config->alarm_en = p_timer_obj[group_num][timer_num]->alarm_en;
367 config->auto_reload = p_timer_obj[group_num][timer_num]->auto_reload_en;
368 config->counter_dir = p_timer_obj[group_num][timer_num]->direction;
369 config->counter_en = p_timer_obj[group_num][timer_num]->counter_en;
370 config->divider = p_timer_obj[group_num][timer_num]->divider;
371 config->intr_type = TIMER_INTR_LEVEL;
372 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
373 return ESP_OK;
374 }
375
timer_group_intr_enable(timer_group_t group_num,timer_intr_t en_mask)376 esp_err_t timer_group_intr_enable(timer_group_t group_num, timer_intr_t en_mask)
377 {
378 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
379 ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
380 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
381 timer_ll_enable_intr(p_timer_obj[group_num][0]->hal.dev, en_mask, true);
382 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
383 return ESP_OK;
384 }
385
timer_group_intr_disable(timer_group_t group_num,timer_intr_t disable_mask)386 esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t disable_mask)
387 {
388 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
389 ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
390 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
391 timer_ll_enable_intr(p_timer_obj[group_num][0]->hal.dev, disable_mask, false);
392 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
393 return ESP_OK;
394 }
395
timer_group_get_intr_status_in_isr(timer_group_t group_num)396 uint32_t IRAM_ATTR timer_group_get_intr_status_in_isr(timer_group_t group_num)
397 {
398 uint32_t intr_status = 0;
399 if (p_timer_obj[group_num][TIMER_0] != NULL) {
400 intr_status = timer_ll_get_intr_status(TIMER_LL_GET_HW(group_num)) & TIMER_LL_EVENT_ALARM(0);
401 }
402 #if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1
403 else if (p_timer_obj[group_num][TIMER_1] != NULL) {
404 intr_status = timer_ll_get_intr_status(TIMER_LL_GET_HW(group_num)) & TIMER_LL_EVENT_ALARM(1);
405 }
406 #endif
407 return intr_status;
408 }
409
timer_group_clr_intr_status_in_isr(timer_group_t group_num,timer_idx_t timer_num)410 void IRAM_ATTR timer_group_clr_intr_status_in_isr(timer_group_t group_num, timer_idx_t timer_num)
411 {
412 timer_ll_clear_intr_status(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num));
413 }
414
timer_group_enable_alarm_in_isr(timer_group_t group_num,timer_idx_t timer_num)415 void IRAM_ATTR timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_idx_t timer_num)
416 {
417 timer_ll_enable_alarm(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, true);
418 }
419
timer_group_get_counter_value_in_isr(timer_group_t group_num,timer_idx_t timer_num)420 uint64_t IRAM_ATTR timer_group_get_counter_value_in_isr(timer_group_t group_num, timer_idx_t timer_num)
421 {
422 timer_ll_trigger_soft_capture(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
423 uint64_t val = timer_ll_get_counter_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
424 return val;
425 }
426
timer_group_set_alarm_value_in_isr(timer_group_t group_num,timer_idx_t timer_num,uint64_t alarm_val)427 void IRAM_ATTR timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_val)
428 {
429 timer_ll_set_alarm_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_val);
430 p_timer_obj[group_num][timer_num]->alarm_value = alarm_val;
431 }
432
timer_group_set_counter_enable_in_isr(timer_group_t group_num,timer_idx_t timer_num,timer_start_t counter_en)433 void IRAM_ATTR timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en)
434 {
435 timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, counter_en);
436 p_timer_obj[group_num][timer_num]->counter_en = counter_en;
437 }
438
timer_group_get_auto_reload_in_isr(timer_group_t group_num,timer_idx_t timer_num)439 bool IRAM_ATTR timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num)
440 {
441 return p_timer_obj[group_num][timer_num]->auto_reload_en;
442 }
443
444 /**
445 * @brief This function will be called during start up, to check that this legacy timer group driver is not running along with the gptimer driver
446 */
check_legacy_timer_driver_conflict(void)447 static void check_legacy_timer_driver_conflict(void)
448 {
449 // This function was declared as weak here. gptimer driver has one implementation.
450 // So if gptimer driver is not linked in, then `gptimer_new_timer()` should be NULL at runtime.
451 extern __attribute__((weak)) esp_err_t gptimer_new_timer(const void *config, void **ret_timer);
452 if ((void *)gptimer_new_timer != NULL) {
453 ESP_EARLY_LOGE(TIMER_TAG, "CONFLICT! driver_ng is not allowed to be used with the legacy driver");
454 abort();
455 }
456 ESP_EARLY_LOGW(TIMER_TAG, "legacy driver is deprecated, please migrate to `driver/gptimer.h`");
457 }
458