1# SPDX-FileCopyrightText: 2022 Fredrik Ahlberg, Angus Gratton,
2# Espressif Systems (Shanghai) CO LTD, other contributors as noted.
3#
4# SPDX-License-Identifier: GPL-2.0-or-later
5
6import struct
7
8from .esp32c3 import ESP32C3ROM
9from ..util import FatalError, NotImplementedInROMError
10
11
12class ESP32C6ROM(ESP32C3ROM):
13    CHIP_NAME = "ESP32-C6"
14    IMAGE_CHIP_ID = 13
15
16    IROM_MAP_START = 0x42000000
17    IROM_MAP_END = 0x42800000
18    DROM_MAP_START = 0x42800000
19    DROM_MAP_END = 0x43000000
20
21    BOOTLOADER_FLASH_OFFSET = 0x0
22
23    # Magic value for ESP32C6
24    CHIP_DETECT_MAGIC_VALUE = [0x2CE0806F]
25
26    SPI_REG_BASE = 0x60003000
27    SPI_USR_OFFS = 0x18
28    SPI_USR1_OFFS = 0x1C
29    SPI_USR2_OFFS = 0x20
30    SPI_MOSI_DLEN_OFFS = 0x24
31    SPI_MISO_DLEN_OFFS = 0x28
32    SPI_W0_OFFS = 0x58
33
34    UART_DATE_REG_ADDR = 0x60000000 + 0x7C
35
36    EFUSE_BASE = 0x600B0800
37    EFUSE_BLOCK1_ADDR = EFUSE_BASE + 0x044
38    MAC_EFUSE_REG = EFUSE_BASE + 0x044
39
40    EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030  # BLOCK0 read base address
41
42    EFUSE_PURPOSE_KEY0_REG = EFUSE_BASE + 0x34
43    EFUSE_PURPOSE_KEY0_SHIFT = 24
44    EFUSE_PURPOSE_KEY1_REG = EFUSE_BASE + 0x34
45    EFUSE_PURPOSE_KEY1_SHIFT = 28
46    EFUSE_PURPOSE_KEY2_REG = EFUSE_BASE + 0x38
47    EFUSE_PURPOSE_KEY2_SHIFT = 0
48    EFUSE_PURPOSE_KEY3_REG = EFUSE_BASE + 0x38
49    EFUSE_PURPOSE_KEY3_SHIFT = 4
50    EFUSE_PURPOSE_KEY4_REG = EFUSE_BASE + 0x38
51    EFUSE_PURPOSE_KEY4_SHIFT = 8
52    EFUSE_PURPOSE_KEY5_REG = EFUSE_BASE + 0x38
53    EFUSE_PURPOSE_KEY5_SHIFT = 12
54
55    EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = EFUSE_RD_REG_BASE
56    EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 20
57
58    EFUSE_SPI_BOOT_CRYPT_CNT_REG = EFUSE_BASE + 0x034
59    EFUSE_SPI_BOOT_CRYPT_CNT_MASK = 0x7 << 18
60
61    EFUSE_SECURE_BOOT_EN_REG = EFUSE_BASE + 0x038
62    EFUSE_SECURE_BOOT_EN_MASK = 1 << 20
63
64    PURPOSE_VAL_XTS_AES128_KEY = 4
65
66    SUPPORTS_ENCRYPTED_FLASH = True
67
68    FLASH_ENCRYPTED_WRITE_ALIGN = 16
69
70    UARTDEV_BUF_NO = 0x4087F580  # Variable in ROM .bss which indicates the port in use
71    UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3  # The above var when USB-JTAG/Serial is used
72
73    DR_REG_LP_WDT_BASE = 0x600B1C00
74    RTC_CNTL_WDTCONFIG0_REG = DR_REG_LP_WDT_BASE + 0x0  # LP_WDT_RWDT_CONFIG0_REG
75    RTC_CNTL_WDTWPROTECT_REG = DR_REG_LP_WDT_BASE + 0x0018  # LP_WDT_RWDT_WPROTECT_REG
76
77    RTC_CNTL_SWD_CONF_REG = DR_REG_LP_WDT_BASE + 0x001C  # LP_WDT_SWD_CONFIG_REG
78    RTC_CNTL_SWD_AUTO_FEED_EN = 1 << 18
79    RTC_CNTL_SWD_WPROTECT_REG = DR_REG_LP_WDT_BASE + 0x0020  # LP_WDT_SWD_WPROTECT_REG
80    RTC_CNTL_SWD_WKEY = 0x50D83AA1  # LP_WDT_SWD_WKEY, same as WDT key in this case
81
82    FLASH_FREQUENCY = {
83        "80m": 0x0,  # workaround for wrong mspi HS div value in ROM
84        "40m": 0x0,
85        "20m": 0x2,
86    }
87
88    MEMORY_MAP = [
89        [0x00000000, 0x00010000, "PADDING"],
90        [0x42800000, 0x43000000, "DROM"],
91        [0x40800000, 0x40880000, "DRAM"],
92        [0x40800000, 0x40880000, "BYTE_ACCESSIBLE"],
93        [0x4004AC00, 0x40050000, "DROM_MASK"],
94        [0x40000000, 0x4004AC00, "IROM_MASK"],
95        [0x42000000, 0x42800000, "IROM"],
96        [0x40800000, 0x40880000, "IRAM"],
97        [0x50000000, 0x50004000, "RTC_IRAM"],
98        [0x50000000, 0x50004000, "RTC_DRAM"],
99        [0x600FE000, 0x60100000, "MEM_INTERNAL2"],
100    ]
101
102    UF2_FAMILY_ID = 0x540DDF62
103
104    def get_pkg_version(self):
105        num_word = 3
106        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x07
107
108    def get_minor_chip_version(self):
109        num_word = 3
110        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x0F
111
112    def get_major_chip_version(self):
113        num_word = 3
114        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 22) & 0x03
115
116    def get_chip_description(self):
117        chip_name = {
118            0: "ESP32-C6 (QFN40)",
119            1: "ESP32-C6FH4 (QFN32)",
120        }.get(self.get_pkg_version(), "unknown ESP32-C6")
121        major_rev = self.get_major_chip_version()
122        minor_rev = self.get_minor_chip_version()
123        return f"{chip_name} (revision v{major_rev}.{minor_rev})"
124
125    def get_chip_features(self):
126        return ["WiFi 6", "BT 5", "IEEE802.15.4"]
127
128    def get_crystal_freq(self):
129        # ESP32C6 XTAL is fixed to 40MHz
130        return 40
131
132    def override_vddsdio(self, new_voltage):
133        raise NotImplementedInROMError(
134            "VDD_SDIO overrides are not supported for ESP32-C6"
135        )
136
137    def read_mac(self, mac_type="BASE_MAC"):
138        """Read MAC from EFUSE region"""
139        mac0 = self.read_reg(self.MAC_EFUSE_REG)
140        mac1 = self.read_reg(self.MAC_EFUSE_REG + 4)  # only bottom 16 bits are MAC
141        base_mac = struct.pack(">II", mac1, mac0)[2:]
142        ext_mac = struct.pack(">H", (mac1 >> 16) & 0xFFFF)
143        eui64 = base_mac[0:3] + ext_mac + base_mac[3:6]
144        # BASE MAC: 60:55:f9:f7:2c:a2
145        # EUI64 MAC: 60:55:f9:ff:fe:f7:2c:a2
146        # EXT_MAC: ff:fe
147        macs = {
148            "BASE_MAC": tuple(base_mac),
149            "EUI64": tuple(eui64),
150            "MAC_EXT": tuple(ext_mac),
151        }
152        return macs.get(mac_type, None)
153
154    def get_flash_crypt_config(self):
155        return None  # doesn't exist on ESP32-C6
156
157    def get_secure_boot_enabled(self):
158        return (
159            self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)
160            & self.EFUSE_SECURE_BOOT_EN_MASK
161        )
162
163    def get_key_block_purpose(self, key_block):
164        if key_block < 0 or key_block > 5:
165            raise FatalError("Valid key block numbers must be in range 0-5")
166
167        reg, shift = [
168            (self.EFUSE_PURPOSE_KEY0_REG, self.EFUSE_PURPOSE_KEY0_SHIFT),
169            (self.EFUSE_PURPOSE_KEY1_REG, self.EFUSE_PURPOSE_KEY1_SHIFT),
170            (self.EFUSE_PURPOSE_KEY2_REG, self.EFUSE_PURPOSE_KEY2_SHIFT),
171            (self.EFUSE_PURPOSE_KEY3_REG, self.EFUSE_PURPOSE_KEY3_SHIFT),
172            (self.EFUSE_PURPOSE_KEY4_REG, self.EFUSE_PURPOSE_KEY4_SHIFT),
173            (self.EFUSE_PURPOSE_KEY5_REG, self.EFUSE_PURPOSE_KEY5_SHIFT),
174        ][key_block]
175        return (self.read_reg(reg) >> shift) & 0xF
176
177    def is_flash_encryption_key_valid(self):
178        # Need to see an AES-128 key
179        purposes = [self.get_key_block_purpose(b) for b in range(6)]
180
181        return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
182
183    def check_spi_connection(self, spi_connection):
184        if not set(spi_connection).issubset(set(range(0, 31))):
185            raise FatalError("SPI Pin numbers must be in the range 0-30.")
186        if any([v for v in spi_connection if v in [12, 13]]):
187            print(
188                "WARNING: GPIO pins 12 and 13 are used by USB-Serial/JTAG, "
189                "consider using other pins for SPI flash connection."
190            )
191
192
193class ESP32C6StubLoader(ESP32C6ROM):
194    """Access class for ESP32C6 stub loader, runs on top of ROM.
195
196    (Basically the same as ESP32StubLoader, but different base class.
197    Can possibly be made into a mixin.)
198    """
199
200    FLASH_WRITE_SIZE = 0x4000  # matches MAX_WRITE_BLOCK in stub_loader.c
201    STATUS_BYTES_LENGTH = 2  # same as ESP8266, different to ESP32 ROM
202    IS_STUB = True
203
204    def __init__(self, rom_loader):
205        self.secure_download_mode = rom_loader.secure_download_mode
206        self._port = rom_loader._port
207        self._trace_enabled = rom_loader._trace_enabled
208        self.cache = rom_loader.cache
209        self.flush_input()  # resets _slip_reader
210
211
212ESP32C6ROM.STUB_CLASS = ESP32C6StubLoader
213