1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #include <stdlib.h> 16 #include "riscv/instruction_decode.h" 17 18 typedef union { 19 struct { 20 unsigned int opcode: 7; 21 unsigned int rd: 5; 22 int imm_19_12: 8; 23 int imm_11: 1; 24 int imm_10_1: 10; 25 int imm20: 1; 26 }; 27 unsigned int inst; 28 } riscv_jal_intruction_t; 29 riscv_decode_offset_from_jal_instruction(const intptr_t inst_addr)30int riscv_decode_offset_from_jal_instruction(const intptr_t inst_addr) 31 { 32 riscv_jal_intruction_t *jal_inst = (riscv_jal_intruction_t *)inst_addr; 33 // check if it's a valid JAL instruction 34 if (jal_inst->opcode != 0x6f && jal_inst->rd != 0) { 35 abort(); 36 } 37 return (jal_inst->imm_10_1 | jal_inst->imm_11 << 10 | jal_inst->imm_19_12 << 11 | jal_inst->imm20 << 19) << 1; 38 } 39
