1 /* 2 * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #pragma once 8 9 #include <stdint.h> 10 #include <stdbool.h> 11 #include "esp_attr.h" 12 #include "esp_rom_spiflash.h" 13 14 #ifdef __cplusplus 15 extern "C" { 16 #endif 17 18 #define PERIPHS_SPI_FLASH_CMD SPI_MEM_CMD_REG(1) 19 #define PERIPHS_SPI_FLASH_ADDR SPI_MEM_ADDR_REG(1) 20 #define PERIPHS_SPI_FLASH_CTRL SPI_MEM_CTRL_REG(1) 21 #define PERIPHS_SPI_FLASH_CTRL1 SPI_MEM_CTRL1_REG(1) 22 #define PERIPHS_SPI_FLASH_STATUS SPI_MEM_RD_STATUS_REG(1) 23 #define PERIPHS_SPI_FLASH_USRREG SPI_MEM_USER_REG(1) 24 #define PERIPHS_SPI_FLASH_USRREG1 SPI_MEM_USER1_REG(1) 25 #define PERIPHS_SPI_FLASH_USRREG2 SPI_MEM_USER2_REG(1) 26 #define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1) 27 #define PERIPHS_SPI_FLASH_C1 SPI_MEM_W1_REG(1) 28 #define PERIPHS_SPI_FLASH_C2 SPI_MEM_W2_REG(1) 29 #define PERIPHS_SPI_FLASH_C3 SPI_MEM_W3_REG(1) 30 #define PERIPHS_SPI_FLASH_C4 SPI_MEM_W4_REG(1) 31 #define PERIPHS_SPI_FLASH_C5 SPI_MEM_W5_REG(1) 32 #define PERIPHS_SPI_FLASH_C6 SPI_MEM_W6_REG(1) 33 #define PERIPHS_SPI_FLASH_C7 SPI_MEM_W7_REG(1) 34 #define PERIPHS_SPI_FLASH_TX_CRC SPI_MEM_TX_CRC_REG(1) 35 36 #define SPI0_R_QIO_DUMMY_CYCLELEN 5 37 #define SPI0_R_QIO_ADDR_BITSLEN 23 38 #define SPI0_R_FAST_DUMMY_CYCLELEN 7 39 #define SPI0_R_DIO_DUMMY_CYCLELEN 3 40 #define SPI0_R_FAST_ADDR_BITSLEN 23 41 #define SPI0_R_SIO_ADDR_BITSLEN 23 42 43 #define SPI1_R_QIO_DUMMY_CYCLELEN 5 44 #define SPI1_R_QIO_ADDR_BITSLEN 23 45 #define SPI1_R_FAST_DUMMY_CYCLELEN 7 46 #define SPI1_R_DIO_DUMMY_CYCLELEN 3 47 #define SPI1_R_DIO_ADDR_BITSLEN 23 48 #define SPI1_R_FAST_ADDR_BITSLEN 23 49 #define SPI1_R_SIO_ADDR_BITSLEN 23 50 51 #define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN 23 52 53 #define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN SPI_MEM_WRSR_2B 54 55 //SPI address register 56 #define ESP_ROM_SPIFLASH_BYTES_LEN 24 57 #define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM 32 58 #define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM 16 59 #define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS 0xf 60 61 typedef void (* spi_flash_func_t)(void); 62 typedef esp_rom_spiflash_result_t (* spi_flash_op_t)(void); 63 typedef esp_rom_spiflash_result_t (* spi_flash_erase_t)(uint32_t); 64 typedef esp_rom_spiflash_result_t (* spi_flash_rd_t)(uint32_t, uint32_t*, int); 65 typedef esp_rom_spiflash_result_t (* spi_flash_wr_t)(uint32_t, const uint32_t*, int); 66 typedef esp_rom_spiflash_result_t (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t); 67 typedef esp_rom_spiflash_result_t (* spi_flash_wren_t)(void*); 68 typedef esp_rom_spiflash_result_t (* spi_flash_erase_area_t)(uint32_t, uint32_t); 69 70 typedef struct { 71 uint8_t pp_addr_bit_len; 72 uint8_t se_addr_bit_len; 73 uint8_t be_addr_bit_len; 74 uint8_t rd_addr_bit_len; 75 uint32_t read_sub_len; 76 uint32_t write_sub_len; 77 spi_flash_op_t unlock; 78 spi_flash_erase_t erase_sector; 79 spi_flash_erase_t erase_block; 80 spi_flash_rd_t read; 81 spi_flash_wr_t write; 82 spi_flash_ewr_t encrypt_write; 83 spi_flash_func_t check_sus; 84 spi_flash_wren_t wren; 85 spi_flash_op_t wait_idle; 86 spi_flash_erase_area_t erase_area; 87 } spiflash_legacy_funcs_t; 88 89 typedef struct { 90 uint8_t data_length; 91 uint8_t read_cmd0; 92 uint8_t read_cmd1; 93 uint8_t write_cmd; 94 uint16_t data_mask; 95 uint16_t data; 96 } esp_rom_spiflash_common_cmd_t; 97 98 /** 99 * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR). 100 * Please do not call this function in SDK. 101 * 102 * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. 103 * 104 * @param uint32_t *status : The pointer to which to return the Flash status value. 105 * 106 * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. 107 * ESP_ROM_SPIFLASH_RESULT_ERR : read error. 108 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. 109 */ 110 esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status); 111 112 /** 113 * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2). 114 * Please do not call this function in SDK. 115 * 116 * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. 117 * 118 * @param uint32_t *status : The pointer to which to return the Flash status value. 119 * 120 * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. 121 * ESP_ROM_SPIFLASH_RESULT_ERR : read error. 122 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. 123 */ 124 esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status); 125 126 /** 127 * @brief Write status to Flash status register. 128 * Please do not call this function in SDK. 129 * 130 * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. 131 * 132 * @param uint32_t status_value : Value to . 133 * 134 * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK. 135 * ESP_ROM_SPIFLASH_RESULT_ERR : write error. 136 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout. 137 */ 138 esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value); 139 140 /** 141 * @brief Use a command to Read Flash status register. 142 * Please do not call this function in SDK. 143 * 144 * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. 145 * 146 * @param uint32_t*status : The pointer to which to return the Flash status value. 147 * 148 * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. 149 * ESP_ROM_SPIFLASH_RESULT_ERR : read error. 150 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. 151 */ 152 esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd); 153 154 /** 155 * @brief Config SPI Flash read mode when init. 156 * Please do not call this function in SDK. 157 * 158 * @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD. 159 * 160 * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this. 161 * 162 * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. 163 * ESP_ROM_SPIFLASH_RESULT_ERR : config error. 164 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. 165 */ 166 esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode); 167 168 /** 169 * @brief Config SPI Flash clock divisor. 170 * Please do not call this function in SDK. 171 * 172 * @param uint8_t freqdiv: clock divisor. 173 * 174 * @param uint8_t spi: 0 for SPI0, 1 for SPI1. 175 * 176 * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. 177 * ESP_ROM_SPIFLASH_RESULT_ERR : config error. 178 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. 179 */ 180 esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi); 181 182 /** 183 * @brief Clear all SR bits except QE bit. 184 * Please do not call this function in SDK. 185 * 186 * @param None. 187 * 188 * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK. 189 * ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error. 190 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout. 191 */ 192 esp_rom_spiflash_result_t esp_rom_spiflash_clear_bp(void); 193 194 /** 195 * @brief Clear all SR bits except QE bit. 196 * Please do not call this function in SDK. 197 * 198 * @param None. 199 * 200 * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK. 201 * ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error. 202 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout. 203 */ 204 esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void); 205 206 /** 207 * @brief Update SPI Flash parameter. 208 * Please do not call this function in SDK. 209 * 210 * @param uint32_t deviceId : Device ID read from SPI, the low 32 bit. 211 * 212 * @param uint32_t chip_size : The Flash size. 213 * 214 * @param uint32_t block_size : The Flash block size. 215 * 216 * @param uint32_t sector_size : The Flash sector size. 217 * 218 * @param uint32_t page_size : The Flash page size. 219 * 220 * @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD). 221 * 222 * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK. 223 * ESP_ROM_SPIFLASH_RESULT_ERR : Update error. 224 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout. 225 */ 226 esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size, 227 uint32_t sector_size, uint32_t page_size, uint32_t status_mask); 228 229 /** 230 * @brief Erase whole flash chip. 231 * Please do not call this function in SDK. 232 * 233 * @param None 234 * 235 * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. 236 * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. 237 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. 238 */ 239 esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void); 240 241 /** 242 * @brief Erase a 64KB block of flash 243 * Uses SPI flash command D8H. 244 * Please do not call this function in SDK. 245 * 246 * @param uint32_t block_num : Which block to erase. 247 * 248 * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. 249 * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. 250 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. 251 */ 252 esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num); 253 254 /** 255 * @brief Erase a sector of flash. 256 * Uses SPI flash command 20H. 257 * Please do not call this function in SDK. 258 * 259 * @param uint32_t sector_num : Which sector to erase. 260 * 261 * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. 262 * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. 263 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. 264 */ 265 esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num); 266 267 /** 268 * @brief Erase some sectors. 269 * Please do not call this function in SDK. 270 * 271 * @param uint32_t start_addr : Start addr to erase, should be sector aligned. 272 * 273 * @param uint32_t area_len : Length to erase, should be sector aligned. 274 * 275 * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. 276 * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. 277 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. 278 */ 279 esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len); 280 281 /** 282 * @brief Write Data to Flash, you should Erase it yourself if need. 283 * Please do not call this function in SDK. 284 * 285 * @param uint32_t dest_addr : Address to write, should be 4 bytes aligned. 286 * 287 * @param const uint32_t *src : The pointer to data which is to write. 288 * 289 * @param uint32_t len : Length to write, should be 4 bytes aligned. 290 * 291 * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK. 292 * ESP_ROM_SPIFLASH_RESULT_ERR : Write error. 293 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout. 294 */ 295 esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len); 296 297 /** 298 * @brief Read Data from Flash, you should Erase it yourself if need. 299 * Please do not call this function in SDK. 300 * 301 * @param uint32_t src_addr : Address to read, should be 4 bytes aligned. 302 * 303 * @param uint32_t *dest : The buf to read the data. 304 * 305 * @param uint32_t len : Length to read, should be 4 bytes aligned. 306 * 307 * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK. 308 * ESP_ROM_SPIFLASH_RESULT_ERR : Read error. 309 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout. 310 */ 311 esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len); 312 313 /** 314 * @brief SPI1 go into encrypto mode. 315 * Please do not call this function in SDK. 316 * 317 * @param None 318 * 319 * @return None 320 */ 321 void esp_rom_spiflash_write_encrypted_enable(void); 322 323 /** 324 * @brief SPI1 go out of encrypto mode. 325 * Please do not call this function in SDK. 326 * 327 * @param None 328 * 329 * @return None 330 */ 331 void esp_rom_spiflash_write_encrypted_disable(void); 332 333 /** 334 * @brief Write data to flash with transparent encryption. 335 * @note Sectors to be written should already be erased. 336 * 337 * @note Please do not call this function in SDK. 338 * 339 * @param uint32_t flash_addr : Address to write, should be 32 byte aligned. 340 * 341 * @param uint32_t *data : The pointer to data to write. Note, this pointer must 342 * be 32 bit aligned and the content of the data will be 343 * modified by the encryption function. 344 * 345 * @param uint32_t len : Length to write, should be 32 bytes aligned. 346 * 347 * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully. 348 * ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error. 349 * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout. 350 */ 351 esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len); 352 353 354 /** @brief Wait until SPI flash write operation is complete 355 * 356 * @note Please do not call this function in SDK. 357 * 358 * Reads the Write In Progress bit of the SPI flash status register, 359 * repeats until this bit is zero (indicating write complete). 360 * 361 * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete 362 * ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status. 363 */ 364 esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi); 365 366 367 /** @brief Enable Quad I/O pin functions 368 * 369 * @note Please do not call this function in SDK. 370 * 371 * Sets the HD & WP pin functions for Quad I/O modes, based on the 372 * efuse SPI pin configuration. 373 * 374 * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O. 375 * 376 * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig(). 377 * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored. 378 * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored. 379 * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used 380 * to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI). 381 * Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral. 382 */ 383 void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig); 384 385 /** 386 * @brief Clear WEL bit unconditionally. 387 * 388 * @return always ESP_ROM_SPIFLASH_RESULT_OK 389 */ 390 esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void); 391 392 /** 393 * @brief Set WREN bit. 394 * 395 * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. 396 * 397 * @return always ESP_ROM_SPIFLASH_RESULT_OK 398 */ 399 esp_rom_spiflash_result_t esp_rom_spiflash_write_enable(esp_rom_spiflash_chip_t *spi); 400 401 /** 402 * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. 403 * Please do not call this function in SDK. 404 * 405 * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). 406 * 407 * @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M. 408 * 409 * @return None 410 */ 411 void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); 412 413 /** 414 * @brief Set SPI Flash pad drivers. 415 * Please do not call this function in SDK. 416 * 417 * @param uint8_t wp_gpio_num: WP gpio number. 418 * 419 * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping 420 * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd 421 * 422 * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid 423 * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. 424 * Values usually read from falsh by rom code, function usually callde by rom code. 425 * if value with bit(3) set, the value is valid, bit[2:0] is the real value. 426 * 427 * @return None 428 */ 429 void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); 430 431 /** 432 * @brief Select SPI Flash function for pads. 433 * Please do not call this function in SDK. 434 * 435 * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping 436 * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd 437 * 438 * @return None 439 */ 440 void esp_rom_spiflash_select_padsfunc(uint32_t ishspi); 441 442 /** 443 * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. 444 * Please do not call this function in SDK. 445 * 446 * @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command. 447 * 448 * @return uint16_t 0 : do not send command any more. 449 * 1 : go to the next command. 450 * n > 1 : skip (n - 1) commands. 451 */ 452 uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd); 453 454 extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs; 455 456 #ifdef __cplusplus 457 } 458 #endif 459
