1 /*
2 * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <stddef.h>
8 #include <string.h>
9 #include <stdarg.h>
10
11 #include "sdkconfig.h"
12 #include "soc/soc_caps.h"
13
14 #include "esp_err.h"
15 #include "esp_log.h"
16 #include "esp_attr.h"
17 #include "esp_check.h"
18 #include "esp_regdma.h"
19 #include "esp_private/startup_internal.h"
20 #include "esp_private/sleep_retention.h"
21 #include "esp_private/sleep_clock.h"
22
23 #include "soc/pcr_reg.h"
24 #include "modem/modem_syscon_reg.h"
25
26 #if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
27 #include "modem/modem_lpcon_reg.h"
28 #endif
29
30 static __attribute__((unused)) const char *TAG = "sleep_clock";
31
sleep_clock_system_retention_init(void)32 esp_err_t sleep_clock_system_retention_init(void)
33 {
34 #if CONFIG_IDF_TARGET_ESP32C6
35 #define N_REGS_PCR() (((PCR_SRAM_POWER_CONF_REG - DR_REG_PCR_BASE) / 4) + 1)
36 #elif CONFIG_IDF_TARGET_ESP32H2
37 #define N_REGS_PCR() (((PCR_PWDET_SAR_CLK_CONF_REG - DR_REG_PCR_BASE) / 4) + 1)
38 #endif
39 const static sleep_retention_entries_config_t pcr_regs_retention[] = {
40 [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_PCR_LINK(0), DR_REG_PCR_BASE, DR_REG_PCR_BASE, N_REGS_PCR(), 0, 0), .owner = ENTRY(0) | ENTRY(2) } /* pcr */
41 };
42
43 esp_err_t err = sleep_retention_entries_create(pcr_regs_retention, ARRAY_SIZE(pcr_regs_retention), REGDMA_LINK_PRI_1, SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
44 ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for system (PCR) retention");
45 ESP_LOGI(TAG, "System Power, Clock and Reset sleep retention initialization");
46 return ESP_OK;
47 }
48
sleep_clock_system_retention_deinit(void)49 void sleep_clock_system_retention_deinit(void)
50 {
51 sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
52 }
53
sleep_clock_modem_retention_init(void)54 esp_err_t sleep_clock_modem_retention_init(void)
55 {
56 #define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
57 #if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
58 #define N_REGS_LPCON() (((MODEM_LPCON_MEM_CONF_REG - MODEM_LPCON_TEST_CONF_REG) / 4) + 1)
59 #endif
60
61 const static sleep_retention_entries_config_t modem_regs_retention[] = {
62 [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMSYSCON_LINK(0), MODEM_SYSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, N_REGS_SYSCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */
63 #if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
64 [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMLPCON_LINK(0), MODEM_LPCON_TEST_CONF_REG, MODEM_LPCON_TEST_CONF_REG, N_REGS_LPCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) } /* MODEM LPCON */
65 #endif
66 };
67
68 esp_err_t err = sleep_retention_entries_create(modem_regs_retention, ARRAY_SIZE(modem_regs_retention), REGDMA_LINK_PRI_2, SLEEP_RETENTION_MODULE_CLOCK_MODEM);
69 ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (SYSCON) retention, 2 level priority");
70 ESP_LOGI(TAG, "Modem Power, Clock and Reset sleep retention initialization");
71 return ESP_OK;
72 }
73
sleep_clock_modem_retention_deinit(void)74 void sleep_clock_modem_retention_deinit(void)
75 {
76 sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
77 }
78
clock_domain_pd_allowed(void)79 bool IRAM_ATTR clock_domain_pd_allowed(void)
80 {
81 const uint32_t modules = sleep_retention_get_modules();
82 const uint32_t mask = (const uint32_t) (
83 SLEEP_RETENTION_MODULE_CLOCK_SYSTEM
84 #if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
85 | SLEEP_RETENTION_MODULE_CLOCK_MODEM
86 #endif
87 );
88 return ((modules & mask) == mask);
89 }
90
91 #if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP || CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
92 ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, BIT(0), 106)
93 {
94 #if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
95 sleep_clock_system_retention_init();
96 #endif
97
98 #if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
99 sleep_clock_modem_retention_init();
100 #endif
101 return ESP_OK;
102 }
103 #endif
104