1 /*
2 * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 #include <stdio.h>
7 #include <stdlib.h>
8 #include <string.h>
9 #include "esp_log.h"
10 #include "soc/adc_periph.h"
11 #include "esp_adc/adc_oneshot.h"
12 #include "driver/gpio.h"
13 #include "driver/rtc_io.h"
14 #include "test_common_adc.h"
15
16 const __attribute__((unused)) static char *TAG = "TEST_ADC";
17
18 /*---------------------------------------------------------------
19 ADC General Macros
20 ---------------------------------------------------------------*/
21 //ADC Channels
22 #if CONFIG_IDF_TARGET_ESP32
23 #define ADC1_TEST_CHAN0 ADC_CHANNEL_4
24 #define ADC1_TEST_CHAN1 ADC_CHANNEL_5
25 #define ADC2_TEST_CHAN0 ADC_CHANNEL_0
26 static const char *TAG_CH[2][10] = {{"ADC1_CH4", "ADC1_CH5"}, {"ADC2_CH0"}};
27 #else
28 #define ADC1_TEST_CHAN0 ADC_CHANNEL_2
29 #define ADC1_TEST_CHAN1 ADC_CHANNEL_3
30 #define ADC2_TEST_CHAN0 ADC_CHANNEL_0
31 static const char *TAG_CH[2][10] = {{"ADC1_CH2", "ADC1_CH3"}, {"ADC2_CH0"}};
32 #endif
33
34
35 /*---------------------------------------------------------------
36 ADC Oneshot High / Low test
37 ---------------------------------------------------------------*/
38 //ESP32C3 ADC2 oneshot mode is not supported anymore
39 #define ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 ((SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3)
40
41 TEST_CASE("ADC oneshot high/low test", "[adc_oneshot]")
42 {
43 static int adc_raw[2][10];
44
45 //-------------ADC1 Init---------------//
46 adc_oneshot_unit_handle_t adc1_handle;
47 adc_oneshot_unit_init_cfg_t init_config1 = {
48 .unit_id = ADC_UNIT_1,
49 .ulp_mode = ADC_ULP_MODE_DISABLE,
50 };
51 TEST_ESP_OK(adc_oneshot_new_unit(&init_config1, &adc1_handle));
52
53 #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
54 //-------------ADC2 Init---------------//
55 adc_oneshot_unit_handle_t adc2_handle;
56 adc_oneshot_unit_init_cfg_t init_config2 = {
57 .unit_id = ADC_UNIT_2,
58 .ulp_mode = ADC_ULP_MODE_DISABLE,
59 };
60 TEST_ESP_OK(adc_oneshot_new_unit(&init_config2, &adc2_handle));
61 #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
62
63 //-------------ADC1 TEST Channel 0 Config---------------//
64 adc_oneshot_chan_cfg_t config = {
65 .bitwidth = ADC_BITWIDTH_DEFAULT,
66 .atten = ADC_ATTEN_DB_11,
67 };
68 TEST_ESP_OK(adc_oneshot_config_channel(adc1_handle, ADC1_TEST_CHAN0, &config));
69
70 //-------------ADC1 TEST Channel 1 Config---------------//
71 TEST_ESP_OK(adc_oneshot_config_channel(adc1_handle, ADC1_TEST_CHAN1, &config));
72
73 #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
74 //-------------ADC2 TEST Channel 0 Config---------------//
75 TEST_ESP_OK(adc_oneshot_config_channel(adc2_handle, ADC2_TEST_CHAN0, &config));
76 #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
77
78 test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0);
79 TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0]));
80 ESP_LOGI(TAG_CH[0][0], "raw data: %d", adc_raw[0][0]);
81 TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][0]);
82
83 test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 1);
84 TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1]));
85 ESP_LOGI(TAG_CH[0][1], "raw data: %d", adc_raw[0][1]);
86 TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][1]);
87
88 #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
89 test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 0);
90 TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0]));
91 ESP_LOGI(TAG_CH[1][0], "raw data: %d", adc_raw[1][0]);
92 TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[1][0]);
93 #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
94
95
96 test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 1);
97 TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0]));
98 ESP_LOGI(TAG_CH[0][0], "raw data: %d", adc_raw[0][0]);
99 TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][0]);
100
101 test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 0);
102 TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1]));
103 ESP_LOGI(TAG_CH[0][1], "raw data: %d", adc_raw[0][1]);
104 TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][1]);
105
106 #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
107 test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 1);
108 TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0]));
109 ESP_LOGI(TAG_CH[1][0], "raw data: %d", adc_raw[1][0]);
110 TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[1][0]);
111 #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
112
113
114 TEST_ESP_OK(adc_oneshot_del_unit(adc1_handle));
115 #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
116 TEST_ESP_OK(adc_oneshot_del_unit(adc2_handle));
117 #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
118 }
119
120
121
122 #if SOC_ADC_CALIBRATION_V1_SUPPORTED
123 /*---------------------------------------------------------------
124 ADC Oneshot with Light Sleep
125 ---------------------------------------------------------------*/
126 #include <inttypes.h>
127 #include "esp_sleep.h"
128 #include "esp_private/regi2c_ctrl.h"
129 #include "soc/regi2c_saradc.h"
130
131 #define TEST_REGI2C_ANA_CALI_BYTE_NUM 8
132
s_adc_oneshot_with_sleep(adc_unit_t unit_id,adc_channel_t channel)133 static void s_adc_oneshot_with_sleep(adc_unit_t unit_id, adc_channel_t channel)
134 {
135 //-------------ADC Init---------------//
136 adc_oneshot_unit_handle_t adc_handle;
137 adc_oneshot_unit_init_cfg_t init_config = {
138 .unit_id = unit_id,
139 .ulp_mode = ADC_ULP_MODE_DISABLE,
140 };
141 TEST_ESP_OK(adc_oneshot_new_unit(&init_config, &adc_handle));
142
143 //-------------ADC Channel Config---------------//
144 adc_oneshot_chan_cfg_t config = {
145 .bitwidth = SOC_ADC_RTC_MAX_BITWIDTH,
146 };
147
148 //-------------ADC Calibration Init---------------//
149 bool do_calibration = false;
150 adc_cali_handle_t cali_handle[TEST_ATTEN_NUMS] = {};
151 for (int i = 0; i < TEST_ATTEN_NUMS; i++) {
152 do_calibration = test_adc_calibration_init(unit_id, channel, g_test_atten[i], SOC_ADC_RTC_MAX_BITWIDTH, &cali_handle[i]);
153 }
154 if (!do_calibration) {
155 ESP_LOGW(TAG, "No efuse bits burnt, only test the regi2c analog register values");
156 }
157
158 for (int i = 0; i < TEST_ATTEN_NUMS; i++) {
159
160 //-------------ADC Channel Config---------------//
161 config.atten = g_test_atten[i];
162 TEST_ESP_OK(adc_oneshot_config_channel(adc_handle, channel, &config));
163 printf("Test with atten: %d\n", g_test_atten[i]);
164
165 //---------------------------------Before Sleep-----------------------------------//
166 printf("Before Light Sleep\n");
167 int raw_expected = 0;
168 int cali_expected = 0;
169 uint8_t regi2c_cali_val_before[TEST_REGI2C_ANA_CALI_BYTE_NUM] = {};
170
171 //Read
172 TEST_ESP_OK(adc_oneshot_read(adc_handle, channel, &raw_expected));
173 if (do_calibration) {
174 TEST_ESP_OK(adc_cali_raw_to_voltage(cali_handle[i], raw_expected, &cali_expected));
175 }
176
177 //Print regi2c
178 printf("regi2c cali val is: ");
179 for (int j = 0; j < TEST_REGI2C_ANA_CALI_BYTE_NUM; j++) {
180 regi2c_cali_val_before[j] = regi2c_ctrl_read_reg(I2C_SAR_ADC, I2C_SAR_ADC_HOSTID, j);
181 printf("0x%x ", regi2c_cali_val_before[j]);
182 }
183 printf("\n");
184
185 //Print result
186 ESP_LOGI(TAG, "ADC%d Chan%d: raw data: %d", unit_id + 1, channel, raw_expected);
187 ESP_LOGI(TAG, "ADC%d Chan%d: cali data: %d", unit_id + 1, channel, cali_expected);
188
189 //---------------------------------Sleep-----------------------------------//
190 esp_sleep_enable_timer_wakeup(30 * 1000);
191 esp_light_sleep_start();
192
193 //---------------------------------After Sleep-----------------------------------//
194 printf("After Light Sleep\n");
195 int raw_after_sleep = 0;
196 int cali_after_sleep = 0;
197 uint8_t regi2c_cali_val_after[TEST_REGI2C_ANA_CALI_BYTE_NUM] = {};
198
199 //Print regi2c
200 printf("regi2c cali val is: ");
201 for (int i = 0; i < TEST_REGI2C_ANA_CALI_BYTE_NUM; i++) {
202 regi2c_cali_val_after[i] = regi2c_ctrl_read_reg(I2C_SAR_ADC, I2C_SAR_ADC_HOSTID, i);
203 printf("0x%x ", regi2c_cali_val_after[i]);
204 }
205 printf("\n");
206
207 //Read
208 TEST_ESP_OK(adc_oneshot_read(adc_handle, channel, &raw_after_sleep));
209 if (do_calibration) {
210 TEST_ESP_OK(adc_cali_raw_to_voltage(cali_handle[i], raw_after_sleep, &cali_after_sleep));
211 }
212
213 //Print result
214 ESP_LOGI(TAG, "ADC%d Chan%d: raw data: %d", unit_id + 1, channel, raw_after_sleep);
215 if (do_calibration) {
216 ESP_LOGI(TAG, "ADC%d Chan%d: cali data: %d", unit_id + 1, channel, cali_after_sleep);
217 }
218
219 //Compare
220 int32_t raw_diff = raw_expected - raw_after_sleep;
221 ESP_LOGI(TAG, "ADC%d Chan%d: raw difference: %"PRId32, unit_id + 1, channel, raw_diff);
222
223 if (do_calibration) {
224 int32_t cali_diff = cali_expected - cali_after_sleep;
225 ESP_LOGI(TAG, "ADC%d Chan%d: cali difference: %"PRId32, unit_id + 1, channel, cali_diff);
226 }
227
228 //Test Calibration registers
229 for (int i = 0; i < TEST_REGI2C_ANA_CALI_BYTE_NUM; i++) {
230 TEST_ASSERT_EQUAL(regi2c_cali_val_before[i], regi2c_cali_val_after[i]);
231 }
232 ESP_LOGI(TAG, "Cali register settings unchanged\n");
233
234 }
235 TEST_ESP_OK(adc_oneshot_del_unit(adc_handle));
236 for (int i = 0; i < TEST_ATTEN_NUMS; i++) {
237 if (cali_handle[i]) {
238 test_adc_calibration_deinit(cali_handle[i]);
239 }
240 }
241 }
242
243 //ADC Channels
244 #if CONFIG_IDF_TARGET_ESP32
245 #define ADC1_SLEEP_TEST_CHAN ADC_CHANNEL_6
246 #define ADC2_SLEEP_TEST_CHAN ADC_CHANNEL_0
247 #else
248 #define ADC1_SLEEP_TEST_CHAN ADC_CHANNEL_2
249 #define ADC2_SLEEP_TEST_CHAN ADC_CHANNEL_0
250 #endif
251
252 TEST_CASE("test ADC1 Single Read with Light Sleep", "[adc][manul][ignore]")
253 {
254 s_adc_oneshot_with_sleep(ADC_UNIT_1, ADC1_SLEEP_TEST_CHAN);
255 }
256
257 #if (SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3
258 //ESP32C3 ADC2 oneshot mode is not supported anymore
259 TEST_CASE("test ADC2 Single Read with Light Sleep", "[adc][manul][ignore]")
260 {
261 s_adc_oneshot_with_sleep(ADC_UNIT_2, ADC2_SLEEP_TEST_CHAN);
262 }
263 #endif //#if (SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3
264
265 #endif //#if SOC_ADC_CALIBRATION_V1_SUPPORTED
266
