1 /*
2 * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <stddef.h>
8 #include <stdlib.h>
9 #include <stdio.h>
10 #include <string.h>
11
12 #include "sdkconfig.h"
13 #include "esp_heap_caps.h"
14 #include "esp_heap_caps_init.h"
15 #include "freertos/FreeRTOS.h"
16 #include "freertos/task.h"
17 #include "freertos/queue.h"
18 #include "freertos/semphr.h"
19 #include "freertos/portmacro.h"
20 #include "esp_types.h"
21 #include "esp_mac.h"
22 #include "esp_random.h"
23 #include "esp_task.h"
24 #include "esp_attr.h"
25 #include "esp_phy_init.h"
26 #include "esp_bt.h"
27 #include "esp_err.h"
28 #include "esp_log.h"
29 #include "esp_pm.h"
30 #include "esp_ipc.h"
31 #include "esp_private/periph_ctrl.h"
32 #include "esp_private/esp_clk.h"
33 #include "soc/soc_caps.h"
34 #include "soc/rtc.h"
35 #include "soc/rtc_cntl_reg.h"
36 #include "soc/soc_memory_layout.h"
37 #include "esp_coexist_internal.h"
38 #include "esp_timer.h"
39 #include "esp_sleep.h"
40 #include "esp_rom_sys.h"
41 #include "esp_private/phy.h"
42 #if CONFIG_IDF_TARGET_ESP32C3
43 #include "riscv/interrupt.h"
44 #include "esp32c3/rom/rom_layout.h"
45 #else //CONFIG_IDF_TARGET_ESP32S3
46 #include "freertos/xtensa_api.h"
47 #include "xtensa/core-macros.h"
48 #include "esp32s3/rom/rom_layout.h"
49 #endif
50 #if CONFIG_BT_ENABLED
51
52 /* Macro definition
53 ************************************************************************
54 */
55
56 #define BT_LOG_TAG "BLE_INIT"
57
58 #define BTDM_INIT_PERIOD (5000) /* ms */
59
60 /* Low Power Clock Selection */
61 #define BTDM_LPCLK_SEL_XTAL (0)
62 #define BTDM_LPCLK_SEL_XTAL32K (1)
63 #define BTDM_LPCLK_SEL_RTC_SLOW (2)
64 #define BTDM_LPCLK_SEL_8M (3)
65
66 // wakeup request sources
67 enum {
68 BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
69 BTDM_ASYNC_WAKEUP_SRC_DISA,
70 BTDM_ASYNC_WAKEUP_SRC_TMR,
71 BTDM_ASYNC_WAKEUP_SRC_MAX,
72 };
73
74 // low power control struct
75 typedef union {
76 struct {
77 uint32_t enable : 1; // whether low power mode is required
78 uint32_t lpclk_sel : 2; // low power clock source
79 uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
80 uint32_t wakeup_timer_required : 1; // whether system timer is needed
81 uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
82 uint32_t main_xtal_pu : 1; // power up main XTAL
83 uint32_t reserved : 25; // reserved
84 };
85 uint32_t val;
86 } btdm_lpcntl_t;
87
88 // low power control status
89 typedef union {
90 struct {
91 uint32_t pm_lock_released : 1; // whether power management lock is released
92 uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
93 uint32_t phy_enabled : 1; // whether phy is switched on
94 uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
95 uint32_t reserved : 28; // reserved
96 };
97 uint32_t val;
98 } btdm_lpstat_t;
99
100 /* Sleep and wakeup interval control */
101 #define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
102 #define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
103
104 #define BT_DEBUG(...)
105 #define BT_API_CALL_CHECK(info, api_call, ret) \
106 do{\
107 esp_err_t __err = (api_call);\
108 if ((ret) != __err) {\
109 BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
110 return __err;\
111 }\
112 } while(0)
113
114 #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
115 #define OSI_VERSION 0x00010006
116 #define OSI_MAGIC_VALUE 0xFADEBEAD
117
118 /* Types definition
119 ************************************************************************
120 */
121 /* vendor dependent signals to be posted to controller task */
122 typedef enum {
123 BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
124 BTDM_VND_OL_SIG_NUM,
125 } btdm_vnd_ol_sig_t;
126
127 /* prototype of function to handle vendor dependent signals */
128 typedef void (* btdm_vnd_ol_task_func_t)(void *param);
129
130 /* VHCI function interface */
131 typedef struct vhci_host_callback {
132 void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
133 int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
134 } vhci_host_callback_t;
135
136 typedef struct {
137 void *handle;
138 } btdm_queue_item_t;
139
140 typedef void (* osi_intr_handler)(void);
141
142 /* OSI function */
143 struct osi_funcs_t {
144 uint32_t _magic;
145 uint32_t _version;
146 void (*_interrupt_set)(int cpu_no, int intr_source, int interrupt_no, int interrpt_prio);
147 void (*_interrupt_clear)(int interrupt_source, int interrupt_no);
148 void (*_interrupt_handler_set)(int interrupt_no, intr_handler_t fn, void *arg);
149 void (*_interrupt_disable)(void);
150 void (*_interrupt_restore)(void);
151 void (*_task_yield)(void);
152 void (*_task_yield_from_isr)(void);
153 void *(*_semphr_create)(uint32_t max, uint32_t init);
154 void (*_semphr_delete)(void *semphr);
155 int (*_semphr_take_from_isr)(void *semphr, void *hptw);
156 int (*_semphr_give_from_isr)(void *semphr, void *hptw);
157 int (*_semphr_take)(void *semphr, uint32_t block_time_ms);
158 int (*_semphr_give)(void *semphr);
159 void *(*_mutex_create)(void);
160 void (*_mutex_delete)(void *mutex);
161 int (*_mutex_lock)(void *mutex);
162 int (*_mutex_unlock)(void *mutex);
163 void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
164 void (* _queue_delete)(void *queue);
165 int (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
166 int (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
167 int (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
168 int (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
169 int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
170 void (* _task_delete)(void *task_handle);
171 bool (* _is_in_isr)(void);
172 int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
173 void *(* _malloc)(size_t size);
174 void *(* _malloc_internal)(size_t size);
175 void (* _free)(void *p);
176 int (* _read_efuse_mac)(uint8_t mac[6]);
177 void (* _srand)(unsigned int seed);
178 int (* _rand)(void);
179 uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
180 uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
181 bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
182 void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
183 void (* _btdm_sleep_enter_phase2)(void);
184 void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
185 void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
186 void (* _btdm_sleep_exit_phase3)(void); /* called from task */
187 void (* _coex_wifi_sleep_set)(bool sleep);
188 int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
189 void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
190 void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
191 void (* _interrupt_on)(int intr_num);
192 void (* _interrupt_off)(int intr_num);
193 void (* _esp_hw_power_down)(void);
194 void (* _esp_hw_power_up)(void);
195 void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
196 };
197
198
199 /* External functions or values
200 ************************************************************************
201 */
202
203 /* not for user call, so don't put to include file */
204 /* OSI */
205 extern int btdm_osi_funcs_register(void *osi_funcs);
206 /* Initialise and De-initialise */
207 extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
208 extern void btdm_controller_deinit(void);
209 extern int btdm_controller_enable(esp_bt_mode_t mode);
210 extern void btdm_controller_disable(void);
211 extern uint8_t btdm_controller_get_mode(void);
212 extern const char *btdm_controller_get_compile_version(void);
213 extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
214 /* Sleep */
215 extern void btdm_controller_enable_sleep(bool enable);
216 extern uint8_t btdm_controller_get_sleep_mode(void);
217 extern bool btdm_power_state_active(void);
218 extern void btdm_wakeup_request(void);
219 extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
220
221 /* vendor dependent tasks to be posted and handled by controller task*/
222 extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
223 extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
224 extern int r_btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
225 extern int r_btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
226
227 /* Low Power Clock */
228 extern bool btdm_lpclk_select_src(uint32_t sel);
229 extern bool btdm_lpclk_set_div(uint32_t div);
230 extern int btdm_hci_tl_io_event_post(int event);
231
232 /* VHCI */
233 extern bool API_vhci_host_check_send_available(void);
234 extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
235 extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
236 /* TX power */
237 extern int ble_txpwr_set(int power_type, int power_level);
238 extern int ble_txpwr_get(int power_type);
239
240 extern uint16_t l2c_ble_link_get_tx_buf_num(void);
241 extern void coex_pti_v2(void);
242
243 extern bool btdm_deep_sleep_mem_init(void);
244 extern void btdm_deep_sleep_mem_deinit(void);
245 extern void btdm_ble_power_down_dma_copy(bool copy);
246 extern uint8_t btdm_sleep_clock_sync(void);
247
248 #if CONFIG_MAC_BB_PD
249 extern void esp_mac_bb_power_down(void);
250 extern void esp_mac_bb_power_up(void);
251 extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
252 #endif
253
254 extern uint32_t _bt_bss_start;
255 extern uint32_t _bt_bss_end;
256 extern uint32_t _btdm_bss_start;
257 extern uint32_t _btdm_bss_end;
258 extern uint32_t _nimble_bss_start;
259 extern uint32_t _nimble_bss_end;
260 extern uint32_t _bt_data_start;
261 extern uint32_t _bt_data_end;
262 extern uint32_t _btdm_data_start;
263 extern uint32_t _btdm_data_end;
264 extern uint32_t _nimble_data_start;
265 extern uint32_t _nimble_data_end;
266
267 /* Local Function Declare
268 *********************************************************************
269 */
270 static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio);
271 static void interrupt_clear_wrapper(int intr_source, int intr_num);
272 static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg);
273 static void interrupt_disable(void);
274 static void interrupt_restore(void);
275 static void task_yield_from_isr(void);
276 static void *semphr_create_wrapper(uint32_t max, uint32_t init);
277 static void semphr_delete_wrapper(void *semphr);
278 static int semphr_take_from_isr_wrapper(void *semphr, void *hptw);
279 static int semphr_give_from_isr_wrapper(void *semphr, void *hptw);
280 static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
281 static int semphr_give_wrapper(void *semphr);
282 static void *mutex_create_wrapper(void);
283 static void mutex_delete_wrapper(void *mutex);
284 static int mutex_lock_wrapper(void *mutex);
285 static int mutex_unlock_wrapper(void *mutex);
286 static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
287 static void queue_delete_wrapper(void *queue);
288 static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
289 static int queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
290 static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
291 static int queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
292 static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
293 static void task_delete_wrapper(void *task_handle);
294 static bool is_in_isr_wrapper(void);
295 static void *malloc_internal_wrapper(size_t size);
296 static int read_mac_wrapper(uint8_t mac[6]);
297 static void srand_wrapper(unsigned int seed);
298 static int rand_wrapper(void);
299 static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
300 static uint32_t btdm_hus_2_lpcycles(uint32_t hus);
301 static bool btdm_sleep_check_duration(int32_t *slot_cnt);
302 static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
303 static void btdm_sleep_enter_phase2_wrapper(void);
304 static void btdm_sleep_exit_phase3_wrapper(void);
305 static void coex_wifi_sleep_set_hook(bool sleep);
306 static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
307 static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
308 static void interrupt_on_wrapper(int intr_num);
309 static void interrupt_off_wrapper(int intr_num);
310 static void btdm_hw_mac_power_up_wrapper(void);
311 static void btdm_hw_mac_power_down_wrapper(void);
312 static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
313
314 static void btdm_slp_tmr_callback(void *arg);
315
316 static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end);
317
318 static void bt_controller_deinit_internal(void);
319
320 /* Local variable definition
321 ***************************************************************************
322 */
323 /* OSI funcs */
324 static const struct osi_funcs_t osi_funcs_ro = {
325 ._magic = OSI_MAGIC_VALUE,
326 ._version = OSI_VERSION,
327 ._interrupt_set = interrupt_set_wrapper,
328 ._interrupt_clear = interrupt_clear_wrapper,
329 ._interrupt_handler_set = interrupt_handler_set_wrapper,
330 ._interrupt_disable = interrupt_disable,
331 ._interrupt_restore = interrupt_restore,
332 ._task_yield = vPortYield,
333 ._task_yield_from_isr = task_yield_from_isr,
334 ._semphr_create = semphr_create_wrapper,
335 ._semphr_delete = semphr_delete_wrapper,
336 ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
337 ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
338 ._semphr_take = semphr_take_wrapper,
339 ._semphr_give = semphr_give_wrapper,
340 ._mutex_create = mutex_create_wrapper,
341 ._mutex_delete = mutex_delete_wrapper,
342 ._mutex_lock = mutex_lock_wrapper,
343 ._mutex_unlock = mutex_unlock_wrapper,
344 ._queue_create = queue_create_wrapper,
345 ._queue_delete = queue_delete_wrapper,
346 ._queue_send = queue_send_wrapper,
347 ._queue_send_from_isr = queue_send_from_isr_wrapper,
348 ._queue_recv = queue_recv_wrapper,
349 ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
350 ._task_create = task_create_wrapper,
351 ._task_delete = task_delete_wrapper,
352 ._is_in_isr = is_in_isr_wrapper,
353 ._cause_sw_intr_to_core = NULL,
354 ._malloc = malloc,
355 ._malloc_internal = malloc_internal_wrapper,
356 ._free = free,
357 ._read_efuse_mac = read_mac_wrapper,
358 ._srand = srand_wrapper,
359 ._rand = rand_wrapper,
360 ._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
361 ._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
362 ._btdm_sleep_check_duration = btdm_sleep_check_duration,
363 ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
364 ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
365 ._btdm_sleep_exit_phase1 = NULL,
366 ._btdm_sleep_exit_phase2 = NULL,
367 ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
368 ._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
369 ._coex_core_ble_conn_dyn_prio_get = NULL,
370 ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
371 ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
372 ._interrupt_on = interrupt_on_wrapper,
373 ._interrupt_off = interrupt_off_wrapper,
374 ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
375 ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
376 ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
377 };
378
379 static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
380
381 /* Static variable declare */
382 static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
383
384 static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
385
386 // low power control struct
387 static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
388 // low power status struct
389 static DRAM_ATTR btdm_lpstat_t s_lp_stat;
390 // measured average low power clock period in micro seconds
391 static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
392 // number of fractional bit for btdm_lpcycle_us
393 static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
394 // semaphore used for blocking VHCI API to wait for controller to wake up
395 static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
396 // wakeup timer
397 static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
398
399 #ifdef CONFIG_PM_ENABLE
400 static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
401 // pm_lock to prevent light sleep due to incompatibility currently
402 static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
403 #endif
404
btdm_hw_mac_power_down_wrapper(void)405 void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
406 {
407 #if CONFIG_MAC_BB_PD
408 #if SOC_PM_SUPPORT_BT_PD
409 // Bluetooth module power down
410 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
411 SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
412 #endif
413 esp_mac_bb_power_down();
414 #endif
415 }
416
btdm_hw_mac_power_up_wrapper(void)417 void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
418 {
419 #if CONFIG_MAC_BB_PD
420 #if SOC_PM_SUPPORT_BT_PD
421 // Bluetooth module power up
422 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
423 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
424 #endif
425 esp_mac_bb_power_up();
426 #endif
427 }
428
btdm_backup_dma_copy_wrapper(uint32_t reg,uint32_t mem_addr,uint32_t num,bool to_mem)429 void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
430 {
431 #if CONFIG_MAC_BB_PD
432 ets_backup_dma_copy(reg, mem_addr, num, to_mem);
433 #endif
434 }
435
esp_bt_power_domain_on(void)436 static inline void esp_bt_power_domain_on(void)
437 {
438 // Bluetooth module power up
439 #if SOC_PM_SUPPORT_BT_PD
440 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
441 CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
442 #endif
443 esp_wifi_bt_power_domain_on();
444 }
445
esp_bt_power_domain_off(void)446 static inline void esp_bt_power_domain_off(void)
447 {
448 // Bluetooth module power down
449 #if SOC_PM_SUPPORT_BT_PD
450 SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
451 SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
452 #endif
453 esp_wifi_bt_power_domain_off();
454 }
455
interrupt_set_wrapper(int cpu_no,int intr_source,int intr_num,int intr_prio)456 static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio)
457 {
458 esp_rom_route_intr_matrix(cpu_no, intr_source, intr_num);
459 #if __riscv
460 esprv_intc_int_set_priority(intr_num, intr_prio);
461 //esprv_intc_int_enable_level(1 << intr_num);
462 esprv_intc_int_set_type(intr_num, 0);
463 #endif
464 }
465
interrupt_clear_wrapper(int intr_source,int intr_num)466 static void interrupt_clear_wrapper(int intr_source, int intr_num)
467 {
468 }
469
interrupt_handler_set_wrapper(int n,intr_handler_t fn,void * arg)470 static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg)
471 {
472 esp_cpu_intr_set_handler(n, fn, arg);
473 }
474
interrupt_on_wrapper(int intr_num)475 static void interrupt_on_wrapper(int intr_num)
476 {
477 esp_cpu_intr_enable(1 << intr_num);
478 }
479
interrupt_off_wrapper(int intr_num)480 static void interrupt_off_wrapper(int intr_num)
481 {
482 esp_cpu_intr_disable(1<<intr_num);
483 }
484
interrupt_disable(void)485 static void IRAM_ATTR interrupt_disable(void)
486 {
487 if (xPortInIsrContext()) {
488 portENTER_CRITICAL_ISR(&global_int_mux);
489 } else {
490 portENTER_CRITICAL(&global_int_mux);
491 }
492 }
493
interrupt_restore(void)494 static void IRAM_ATTR interrupt_restore(void)
495 {
496 if (xPortInIsrContext()) {
497 portEXIT_CRITICAL_ISR(&global_int_mux);
498 } else {
499 portEXIT_CRITICAL(&global_int_mux);
500 }
501 }
502
task_yield_from_isr(void)503 static void IRAM_ATTR task_yield_from_isr(void)
504 {
505 portYIELD_FROM_ISR();
506 }
507
semphr_create_wrapper(uint32_t max,uint32_t init)508 static void *semphr_create_wrapper(uint32_t max, uint32_t init)
509 {
510 btdm_queue_item_t *semphr = heap_caps_calloc(1, sizeof(btdm_queue_item_t), MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
511 assert(semphr);
512
513 /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
514 semphr->handle = (void *)xSemaphoreCreateCounting(max, init);
515 assert(semphr->handle);
516
517 return semphr;
518 }
519
semphr_delete_wrapper(void * semphr)520 static void semphr_delete_wrapper(void *semphr)
521 {
522 if (semphr == NULL) {
523 return;
524 }
525
526 btdm_queue_item_t *semphr_item = (btdm_queue_item_t *)semphr;
527
528 if (semphr_item->handle) {
529 vSemaphoreDelete(semphr_item->handle);
530 }
531
532 free(semphr);
533 }
534
semphr_take_from_isr_wrapper(void * semphr,void * hptw)535 static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
536 {
537 return (int)xSemaphoreTakeFromISR(((btdm_queue_item_t *)semphr)->handle, hptw);
538 }
539
semphr_give_from_isr_wrapper(void * semphr,void * hptw)540 static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
541 {
542 return (int)xSemaphoreGiveFromISR(((btdm_queue_item_t *)semphr)->handle, hptw);
543 }
544
semphr_take_wrapper(void * semphr,uint32_t block_time_ms)545 static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
546 {
547 if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
548 return (int)xSemaphoreTake(((btdm_queue_item_t *)semphr)->handle, portMAX_DELAY);
549 } else {
550 return (int)xSemaphoreTake(((btdm_queue_item_t *)semphr)->handle, block_time_ms / portTICK_PERIOD_MS);
551 }
552 }
553
semphr_give_wrapper(void * semphr)554 static int semphr_give_wrapper(void *semphr)
555 {
556 return (int)xSemaphoreGive(((btdm_queue_item_t *)semphr)->handle);
557 }
558
mutex_create_wrapper(void)559 static void *mutex_create_wrapper(void)
560 {
561 return (void *)xSemaphoreCreateMutex();
562 }
563
mutex_delete_wrapper(void * mutex)564 static void mutex_delete_wrapper(void *mutex)
565 {
566 vSemaphoreDelete(mutex);
567 }
568
mutex_lock_wrapper(void * mutex)569 static int mutex_lock_wrapper(void *mutex)
570 {
571 return (int)xSemaphoreTake(mutex, portMAX_DELAY);
572 }
573
mutex_unlock_wrapper(void * mutex)574 static int mutex_unlock_wrapper(void *mutex)
575 {
576 return (int)xSemaphoreGive(mutex);
577 }
578
queue_create_wrapper(uint32_t queue_len,uint32_t item_size)579 static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
580 {
581 btdm_queue_item_t *queue = NULL;
582
583 queue = (btdm_queue_item_t*)heap_caps_malloc(sizeof(btdm_queue_item_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
584 assert(queue);
585
586 /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
587 queue->handle = xQueueCreate( queue_len, item_size);
588 assert(queue->handle);
589
590 return queue;
591 }
592
queue_delete_wrapper(void * queue)593 static void queue_delete_wrapper(void *queue)
594 {
595 btdm_queue_item_t *queue_item = (btdm_queue_item_t *)queue;
596 if (queue_item) {
597 if(queue_item->handle){
598 vQueueDelete(queue_item->handle);
599 }
600 free(queue_item);
601 }
602 }
603
queue_send_wrapper(void * queue,void * item,uint32_t block_time_ms)604 static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
605 {
606 if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
607 return (int)xQueueSend(((btdm_queue_item_t*)queue)->handle, item, portMAX_DELAY);
608 } else {
609 return (int)xQueueSend(((btdm_queue_item_t*)queue)->handle, item, block_time_ms / portTICK_PERIOD_MS);
610 }
611 }
612
queue_send_from_isr_wrapper(void * queue,void * item,void * hptw)613 static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
614 {
615 return (int)xQueueSendFromISR(((btdm_queue_item_t*)queue)->handle, item, hptw);
616 }
617
queue_recv_wrapper(void * queue,void * item,uint32_t block_time_ms)618 static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
619 {
620 if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
621 return (int)xQueueReceive(((btdm_queue_item_t*)queue)->handle, item, portMAX_DELAY);
622 } else {
623 return (int)xQueueReceive(((btdm_queue_item_t*)queue)->handle, item, block_time_ms / portTICK_PERIOD_MS);
624 }
625 }
626
queue_recv_from_isr_wrapper(void * queue,void * item,void * hptw)627 static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
628 {
629 return (int)xQueueReceiveFromISR(((btdm_queue_item_t*)queue)->handle, item, hptw);
630 }
631
task_create_wrapper(void * task_func,const char * name,uint32_t stack_depth,void * param,uint32_t prio,void * task_handle,uint32_t core_id)632 static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
633 {
634 return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
635 }
636
task_delete_wrapper(void * task_handle)637 static void task_delete_wrapper(void *task_handle)
638 {
639 vTaskDelete(task_handle);
640 }
641
is_in_isr_wrapper(void)642 static bool IRAM_ATTR is_in_isr_wrapper(void)
643 {
644 return (bool)xPortInIsrContext();
645 }
646
malloc_internal_wrapper(size_t size)647 static void *malloc_internal_wrapper(size_t size)
648 {
649 void *p = heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
650 if(p == NULL) {
651 ESP_LOGE(BT_LOG_TAG, "Malloc failed");
652 }
653 return p;
654 }
655
read_mac_wrapper(uint8_t mac[6])656 static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
657 {
658 int ret = esp_read_mac(mac, ESP_MAC_BT);
659 ESP_LOGI(BT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
660 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
661
662 return ret;
663 }
664
srand_wrapper(unsigned int seed)665 static void IRAM_ATTR srand_wrapper(unsigned int seed)
666 {
667 /* empty function */
668 }
669
rand_wrapper(void)670 static int IRAM_ATTR rand_wrapper(void)
671 {
672 return (int)esp_random();
673 }
674
btdm_lpcycles_2_hus(uint32_t cycles,uint32_t * error_corr)675 static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
676 {
677 uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
678 uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
679 local_error_corr += res;
680 res = (local_error_corr >> btdm_lpcycle_us_frac);
681 local_error_corr -= (res << btdm_lpcycle_us_frac);
682 if (error_corr) {
683 *error_corr = (uint32_t) local_error_corr;
684 }
685 return (uint32_t)res;
686 }
687
688 /*
689 * @brief Converts a duration in half us into a number of low power clock cycles.
690 */
btdm_hus_2_lpcycles(uint32_t hus)691 static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
692 {
693 // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
694 // Compute the sleep duration in us to low power clock cycles, with calibration result applied
695 // clock measurement is conducted
696 uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
697 cycles >>= 1;
698
699 return (uint32_t)cycles;
700 }
701
btdm_sleep_check_duration(int32_t * half_slot_cnt)702 static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
703 {
704 if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
705 return false;
706 }
707 /* wake up in advance considering the delay in enabling PHY/RF */
708 *half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
709 return true;
710 }
711
btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)712 static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
713 {
714 if (s_lp_cntl.wakeup_timer_required == 0) {
715 return;
716 }
717
718 // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
719 uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
720
721 #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
722 assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
723 // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
724 // and set the timer in advance
725 uint32_t uncertainty = (us_to_sleep >> 11);
726 if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
727 uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
728 }
729
730 assert (s_lp_stat.wakeup_timer_started == 0);
731 if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
732 s_lp_stat.wakeup_timer_started = 1;
733 } else {
734 ESP_LOGE(BT_LOG_TAG, "timer start failed");
735 assert(0);
736 }
737 }
738
btdm_sleep_enter_phase2_wrapper(void)739 static void btdm_sleep_enter_phase2_wrapper(void)
740 {
741 if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
742 if (s_lp_stat.phy_enabled) {
743 esp_phy_disable();
744 s_lp_stat.phy_enabled = 0;
745 } else {
746 assert(0);
747 }
748
749 if (s_lp_stat.pm_lock_released == 0) {
750 #ifdef CONFIG_PM_ENABLE
751 esp_pm_lock_release(s_pm_lock);
752 #endif
753 s_lp_stat.pm_lock_released = 1;
754 }
755 }
756 }
757
btdm_sleep_exit_phase3_wrapper(void)758 static void btdm_sleep_exit_phase3_wrapper(void)
759 {
760 #ifdef CONFIG_PM_ENABLE
761 // If BT wakeup before esp timer coming due to timer task have no chance to run.
762 // Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
763 // Do it again here to fix this issue.
764 if (s_lp_stat.pm_lock_released) {
765 esp_pm_lock_acquire(s_pm_lock);
766 s_lp_stat.pm_lock_released = 0;
767 }
768 #endif
769
770 if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
771 if (s_lp_stat.phy_enabled == 0) {
772 esp_phy_enable();
773 s_lp_stat.phy_enabled = 1;
774 }
775 }
776
777 // If BT wakeup before esp timer coming due to timer task have no chance to run.
778 // Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
779 // Do it again here to fix this issue.
780 if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
781 esp_timer_stop(s_btdm_slp_tmr);
782 s_lp_stat.wakeup_timer_started = 0;
783 }
784
785 // wait for the sleep state to change
786 // the procedure duration is at micro-second level or less
787 while (btdm_sleep_clock_sync()) {
788 ;
789 }
790 }
791
btdm_sleep_exit_phase0(void * param)792 static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
793 {
794 assert(s_lp_cntl.enable == 1);
795
796 #ifdef CONFIG_PM_ENABLE
797 if (s_lp_stat.pm_lock_released) {
798 esp_pm_lock_acquire(s_pm_lock);
799 s_lp_stat.pm_lock_released = 0;
800 }
801 #endif
802
803 int event = (int) param;
804 if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
805 btdm_wakeup_request();
806 }
807
808 if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
809 esp_timer_stop(s_btdm_slp_tmr);
810 s_lp_stat.wakeup_timer_started = 0;
811 }
812
813 if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
814 semphr_give_wrapper(s_wakeup_req_sem);
815 }
816 }
817
btdm_slp_tmr_callback(void * arg)818 static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
819 {
820 #ifdef CONFIG_PM_ENABLE
821 r_btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
822 #endif
823 }
824
825
async_wakeup_request(int event)826 static bool async_wakeup_request(int event)
827 {
828 if (s_lp_cntl.enable == 0) {
829 return false;
830 }
831
832 bool do_wakeup_request = false;
833 switch (event) {
834 case BTDM_ASYNC_WAKEUP_SRC_VHCI:
835 case BTDM_ASYNC_WAKEUP_SRC_DISA:
836 btdm_in_wakeup_requesting_set(true);
837 if (!btdm_power_state_active()) {
838 r_btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
839 do_wakeup_request = true;
840 semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
841 }
842 break;
843 default:
844 break;
845 }
846
847 return do_wakeup_request;
848 }
849
async_wakeup_request_end(int event)850 static void async_wakeup_request_end(int event)
851 {
852 if (s_lp_cntl.enable == 0) {
853 return;
854 }
855
856 bool allow_to_sleep;
857 switch (event) {
858 case BTDM_ASYNC_WAKEUP_SRC_VHCI:
859 case BTDM_ASYNC_WAKEUP_SRC_DISA:
860 allow_to_sleep = true;
861 break;
862 default:
863 allow_to_sleep = true;
864 break;
865 }
866
867 if (allow_to_sleep) {
868 btdm_in_wakeup_requesting_set(false);
869 }
870
871 return;
872 }
873
coex_schm_status_bit_set_wrapper(uint32_t type,uint32_t status)874 static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
875 {
876 #if CONFIG_SW_COEXIST_ENABLE
877 coex_schm_status_bit_set(type, status);
878 #endif
879 }
880
coex_schm_status_bit_clear_wrapper(uint32_t type,uint32_t status)881 static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
882 {
883 #if CONFIG_SW_COEXIST_ENABLE
884 coex_schm_status_bit_clear(type, status);
885 #endif
886 }
887
esp_vhci_host_check_send_available(void)888 bool esp_vhci_host_check_send_available(void)
889 {
890 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
891 return false;
892 }
893 return API_vhci_host_check_send_available();
894 }
895
esp_vhci_host_send_packet(uint8_t * data,uint16_t len)896 void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
897 {
898 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
899 return;
900 }
901 async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
902
903 API_vhci_host_send_packet(data, len);
904
905 async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
906 }
907
esp_vhci_host_register_callback(const esp_vhci_host_callback_t * callback)908 esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
909 {
910 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
911 return ESP_FAIL;
912 }
913 return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
914 }
915
btdm_controller_mem_init(void)916 static void btdm_controller_mem_init(void)
917 {
918 extern void btdm_controller_rom_data_init(void );
919 btdm_controller_rom_data_init();
920 }
921
esp_bt_controller_mem_release(esp_bt_mode_t mode)922 esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
923 {
924 intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
925 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
926 return ESP_ERR_INVALID_STATE;
927 }
928
929 if (mode & ESP_BT_MODE_BLE) {
930 /* if the addresses of rom btdm .data and .bss are consecutive,
931 they are registered in the system heap as a piece of memory
932 */
933 if(ets_rom_layout_p->data_end_btdm == ets_rom_layout_p->bss_start_btdm) {
934 mem_start = (intptr_t)ets_rom_layout_p->data_start_btdm;
935 mem_end = (intptr_t)ets_rom_layout_p->bss_end_btdm;
936 if (mem_start != mem_end) {
937 ESP_LOGD(BT_LOG_TAG, "Release rom btdm [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
938 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
939 }
940 } else {
941 mem_start = (intptr_t)ets_rom_layout_p->bss_start_btdm;
942 mem_end = (intptr_t)ets_rom_layout_p->bss_end_btdm;
943 if (mem_start != mem_end) {
944 ESP_LOGD(BT_LOG_TAG, "Release rom btdm BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
945 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
946 }
947
948 mem_start = (intptr_t)ets_rom_layout_p->data_start_btdm;
949 mem_end = (intptr_t)ets_rom_layout_p->data_end_btdm;
950 if (mem_start != mem_end) {
951 ESP_LOGD(BT_LOG_TAG, "Release rom btdm Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
952 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
953 }
954 }
955 /* if the addresses of rom interface btdm .data and .bss are consecutive,
956 they are registered in the system heap as a piece of memory
957 */
958 if(ets_rom_layout_p->data_end_interface_btdm == ets_rom_layout_p->bss_start_interface_btdm) {
959 mem_start = (intptr_t)ets_rom_layout_p->data_start_interface_btdm;
960 mem_end = (intptr_t)ets_rom_layout_p->bss_end_interface_btdm;
961 if (mem_start != mem_end) {
962 ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
963 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
964 }
965 } else {
966 mem_start = (intptr_t)ets_rom_layout_p->data_start_interface_btdm;
967 mem_end = (intptr_t)ets_rom_layout_p->data_end_interface_btdm;
968 if (mem_start != mem_end) {
969 ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
970 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
971 }
972
973 mem_start = (intptr_t)ets_rom_layout_p->bss_start_interface_btdm;
974 mem_end = (intptr_t)ets_rom_layout_p->bss_end_interface_btdm;
975 if (mem_start != mem_end) {
976 ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
977 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
978 }
979 }
980
981 }
982 return ESP_OK;
983 }
984
esp_bt_mem_release(esp_bt_mode_t mode)985 esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
986 {
987 int ret;
988 intptr_t mem_start, mem_end;
989
990 ret = esp_bt_controller_mem_release(mode);
991 if (ret != ESP_OK) {
992 return ret;
993 }
994
995 if (mode & ESP_BT_MODE_BLE) {
996 /* if the addresses of btdm .bss and bt .bss are consecutive,
997 they are registered in the system heap as a piece of memory
998 */
999 if(_bt_bss_end == _btdm_bss_start) {
1000 mem_start = (intptr_t)&_bt_bss_start;
1001 mem_end = (intptr_t)&_btdm_bss_end;
1002 if (mem_start != mem_end) {
1003 ESP_LOGD(BT_LOG_TAG, "Release BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
1004 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
1005 }
1006 } else {
1007 mem_start = (intptr_t)&_bt_bss_start;
1008 mem_end = (intptr_t)&_bt_bss_end;
1009 if (mem_start != mem_end) {
1010 ESP_LOGD(BT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
1011 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
1012 }
1013
1014 mem_start = (intptr_t)&_btdm_bss_start;
1015 mem_end = (intptr_t)&_btdm_bss_end;
1016 if (mem_start != mem_end) {
1017 ESP_LOGD(BT_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
1018 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
1019 }
1020 }
1021 /* if the addresses of btdm .data and bt .data are consecutive,
1022 they are registered in the system heap as a piece of memory
1023 */
1024 if(_bt_data_end == _btdm_data_start) {
1025 mem_start = (intptr_t)&_bt_data_start;
1026 mem_end = (intptr_t)&_btdm_data_end;
1027 if (mem_start != mem_end) {
1028 ESP_LOGD(BT_LOG_TAG, "Release data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
1029 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
1030 }
1031 } else {
1032 mem_start = (intptr_t)&_bt_data_start;
1033 mem_end = (intptr_t)&_bt_data_end;
1034 if (mem_start != mem_end) {
1035 ESP_LOGD(BT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
1036 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
1037 }
1038
1039 mem_start = (intptr_t)&_btdm_data_start;
1040 mem_end = (intptr_t)&_btdm_data_end;
1041 if (mem_start != mem_end) {
1042 ESP_LOGD(BT_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
1043 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
1044 }
1045 }
1046
1047 mem_start = (intptr_t)&_nimble_bss_start;
1048 mem_end = (intptr_t)&_nimble_bss_end;
1049 if (mem_start != mem_end) {
1050 ESP_LOGD(BT_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
1051 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
1052 }
1053 mem_start = (intptr_t)&_nimble_data_start;
1054 mem_end = (intptr_t)&_nimble_data_end;
1055 if (mem_start != mem_end) {
1056 ESP_LOGD(BT_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
1057 ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
1058 }
1059 }
1060 return ESP_OK;
1061 }
1062
try_heap_caps_add_region(intptr_t start,intptr_t end)1063 static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
1064 {
1065 int ret = heap_caps_add_region(start, end);
1066 /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
1067 * is too small to fit a heap. This cannot be termed as a fatal error and hence
1068 * we replace it by ESP_OK
1069 */
1070
1071 if (ret == ESP_ERR_INVALID_SIZE) {
1072 return ESP_OK;
1073 }
1074 return ret;
1075 }
1076
1077 #if CONFIG_MAC_BB_PD
btdm_mac_bb_power_down_cb(void)1078 static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
1079 {
1080 if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
1081 btdm_ble_power_down_dma_copy(true);
1082 s_lp_stat.mac_bb_pd = 1;
1083 }
1084 }
1085
btdm_mac_bb_power_up_cb(void)1086 static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
1087 {
1088 if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
1089 btdm_ble_power_down_dma_copy(false);
1090 s_lp_stat.mac_bb_pd = 0;
1091 }
1092 }
1093 #endif
1094
esp_bt_controller_init(esp_bt_controller_config_t * cfg)1095 esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
1096 {
1097 esp_err_t err = ESP_FAIL;
1098
1099 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
1100 return ESP_ERR_INVALID_STATE;
1101 }
1102
1103 if (cfg == NULL) {
1104 return ESP_ERR_INVALID_ARG;
1105 }
1106
1107 if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
1108 || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
1109 ESP_LOGE(BT_LOG_TAG, "Invalid controller task prioriy or stack size");
1110 return ESP_ERR_INVALID_ARG;
1111 }
1112
1113 if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
1114 ESP_LOGE(BT_LOG_TAG, "%s controller only support BLE only mode", __func__);
1115 return ESP_ERR_NOT_SUPPORTED;
1116 }
1117
1118 if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
1119 if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
1120 ESP_LOGE(BT_LOG_TAG, "Invalid value of ble_max_act");
1121 return ESP_ERR_INVALID_ARG;
1122 }
1123 }
1124
1125 if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
1126 if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
1127 ESP_LOGE(BT_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
1128 return ESP_ERR_INVALID_ARG;
1129 }
1130 }
1131
1132 // overwrite some parameters
1133 cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
1134
1135 #if CONFIG_MAC_BB_PD
1136 esp_mac_bb_pd_mem_init();
1137 #endif
1138 esp_phy_modem_init();
1139 esp_bt_power_domain_on();
1140
1141 btdm_controller_mem_init();
1142
1143 #if CONFIG_MAC_BB_PD
1144 if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
1145 err = ESP_ERR_INVALID_ARG;
1146 goto error;
1147 }
1148
1149 if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
1150 err = ESP_ERR_INVALID_ARG;
1151 goto error;
1152 }
1153 #endif
1154
1155 osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
1156 if (osi_funcs_p == NULL) {
1157 return ESP_ERR_NO_MEM;
1158 }
1159
1160 memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
1161 if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
1162 return ESP_ERR_INVALID_ARG;
1163 }
1164
1165 ESP_LOGI(BT_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
1166
1167 // init low-power control resources
1168 do {
1169 // set default values for global states or resources
1170 s_lp_stat.val = 0;
1171 s_lp_cntl.val = 0;
1172 s_lp_cntl.main_xtal_pu = 0;
1173 s_wakeup_req_sem = NULL;
1174 s_btdm_slp_tmr = NULL;
1175
1176 // configure and initialize resources
1177 s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
1178 s_lp_cntl.no_light_sleep = 0;
1179
1180 if (s_lp_cntl.enable) {
1181 #if CONFIG_MAC_BB_PD
1182 if (!btdm_deep_sleep_mem_init()) {
1183 err = ESP_ERR_NO_MEM;
1184 goto error;
1185 }
1186 s_lp_cntl.mac_bb_pd = 1;
1187 #endif
1188 #ifdef CONFIG_PM_ENABLE
1189 s_lp_cntl.wakeup_timer_required = 1;
1190 #endif
1191 // async wakeup semaphore for VHCI
1192 s_wakeup_req_sem = semphr_create_wrapper(1, 0);
1193 if (s_wakeup_req_sem == NULL) {
1194 err = ESP_ERR_NO_MEM;
1195 goto error;
1196 }
1197 btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
1198 }
1199
1200 if (s_lp_cntl.wakeup_timer_required) {
1201 esp_timer_create_args_t create_args = {
1202 .callback = btdm_slp_tmr_callback,
1203 .arg = NULL,
1204 .name = "btSlp",
1205 };
1206 if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
1207 goto error;
1208 }
1209 }
1210
1211 // set default bluetooth sleep clock cycle and its fractional bits
1212 btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
1213 btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
1214
1215 // set default bluetooth sleep clock source
1216 s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
1217 #if CONFIG_BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
1218 // check whether or not EXT_CRYS is working
1219 if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
1220 s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32 kHz XTAL
1221 } else {
1222 ESP_LOGW(BT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
1223 #if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
1224 s_lp_cntl.no_light_sleep = 1;
1225 #endif
1226 }
1227 #elif (CONFIG_BT_CTRL_LPCLK_SEL_MAIN_XTAL)
1228 ESP_LOGI(BT_LOG_TAG, "Bluetooth will use main XTAL as Bluetooth sleep clock.");
1229 #if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
1230 s_lp_cntl.no_light_sleep = 1;
1231 #endif
1232 #elif (CONFIG_BT_CTRL_LPCLK_SEL_RTC_SLOW)
1233 // check whether or not internal 150 kHz RC oscillator is working
1234 if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
1235 s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_RTC_SLOW; // Internal 150 kHz RC oscillator
1236 ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC osciallator. The accuracy of this clock is a lot larger than 500ppm which is "
1237 "required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
1238 } else {
1239 ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC oscillator not detected.");
1240 assert(0);
1241 }
1242 #endif
1243
1244 bool select_src_ret __attribute__((unused));
1245 bool set_div_ret __attribute__((unused));
1246 if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
1247 #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
1248 ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON));
1249 s_lp_cntl.main_xtal_pu = 1;
1250 #endif
1251 select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
1252 set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() / MHZ);
1253 assert(select_src_ret && set_div_ret);
1254 btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
1255 btdm_lpcycle_us = 1 << (btdm_lpcycle_us_frac);
1256 } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL32K) {
1257 select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
1258 set_div_ret = btdm_lpclk_set_div(0);
1259 assert(select_src_ret && set_div_ret);
1260 btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
1261 btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
1262 (1000000 >> (15 - RTC_CLK_CAL_FRACT));
1263 assert(btdm_lpcycle_us != 0);
1264 } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_RTC_SLOW) {
1265 select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
1266 set_div_ret = btdm_lpclk_set_div(0);
1267 assert(select_src_ret && set_div_ret);
1268 btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
1269 btdm_lpcycle_us = esp_clk_slowclk_cal_get();
1270 } else {
1271 err = ESP_ERR_INVALID_ARG;
1272 goto error;
1273 }
1274 #if CONFIG_SW_COEXIST_ENABLE
1275 coex_update_lpclk_interval();
1276 #endif
1277
1278 #ifdef CONFIG_PM_ENABLE
1279 if (s_lp_cntl.no_light_sleep) {
1280 if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
1281 err = ESP_ERR_NO_MEM;
1282 goto error;
1283 }
1284 ESP_LOGW(BT_LOG_TAG, "light sleep mode will not be able to apply when bluetooth is enabled.");
1285 }
1286 if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
1287 err = ESP_ERR_NO_MEM;
1288 goto error;
1289 } else {
1290 s_lp_stat.pm_lock_released = 1;
1291 }
1292 #endif
1293 } while (0);
1294
1295 #if CONFIG_SW_COEXIST_ENABLE
1296 coex_init();
1297 #endif
1298
1299 periph_module_enable(PERIPH_BT_MODULE);
1300 periph_module_reset(PERIPH_BT_MODULE);
1301
1302 esp_phy_enable();
1303 s_lp_stat.phy_enabled = 1;
1304
1305 if (btdm_controller_init(cfg) != 0) {
1306 err = ESP_ERR_NO_MEM;
1307 goto error;
1308 }
1309 coex_pti_v2();
1310
1311 btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
1312
1313 return ESP_OK;
1314
1315 error:
1316
1317 bt_controller_deinit_internal();
1318
1319 return err;
1320 }
1321
esp_bt_controller_deinit(void)1322 esp_err_t esp_bt_controller_deinit(void)
1323 {
1324 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
1325 return ESP_ERR_INVALID_STATE;
1326 }
1327
1328 btdm_controller_deinit();
1329
1330 bt_controller_deinit_internal();
1331
1332 return ESP_OK;
1333 }
1334
bt_controller_deinit_internal(void)1335 static void bt_controller_deinit_internal(void)
1336 {
1337 periph_module_disable(PERIPH_BT_MODULE);
1338
1339 if (s_lp_stat.phy_enabled) {
1340 esp_phy_disable();
1341 s_lp_stat.phy_enabled = 0;
1342 }
1343
1344 // deinit low power control resources
1345 do {
1346
1347 #if CONFIG_MAC_BB_PD
1348 if (s_lp_cntl.mac_bb_pd) {
1349 btdm_deep_sleep_mem_deinit();
1350 s_lp_cntl.mac_bb_pd = 0;
1351 }
1352 #endif
1353
1354 #ifdef CONFIG_PM_ENABLE
1355 if (s_lp_cntl.no_light_sleep) {
1356 if (s_light_sleep_pm_lock != NULL) {
1357 esp_pm_lock_delete(s_light_sleep_pm_lock);
1358 s_light_sleep_pm_lock = NULL;
1359 }
1360 }
1361
1362 if (s_pm_lock != NULL) {
1363 esp_pm_lock_delete(s_pm_lock);
1364 s_pm_lock = NULL;
1365 s_lp_stat.pm_lock_released = 0;
1366 }
1367
1368 #endif
1369
1370 if (s_lp_cntl.wakeup_timer_required) {
1371 if (s_lp_stat.wakeup_timer_started) {
1372 esp_timer_stop(s_btdm_slp_tmr);
1373 }
1374 s_lp_stat.wakeup_timer_started = 0;
1375 esp_timer_delete(s_btdm_slp_tmr);
1376 s_btdm_slp_tmr = NULL;
1377 }
1378
1379 if (s_lp_cntl.enable) {
1380 btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
1381 if (s_wakeup_req_sem != NULL) {
1382 semphr_delete_wrapper(s_wakeup_req_sem);
1383 s_wakeup_req_sem = NULL;
1384 }
1385 }
1386
1387 if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
1388 #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
1389 if (s_lp_cntl.main_xtal_pu) {
1390 ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF));
1391 s_lp_cntl.main_xtal_pu = 0;
1392 }
1393 #endif
1394 btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
1395 btdm_lpclk_set_div(0);
1396 #if CONFIG_SW_COEXIST_ENABLE
1397 coex_update_lpclk_interval();
1398 #endif
1399 }
1400
1401 btdm_lpcycle_us = 0;
1402 } while (0);
1403
1404 #if CONFIG_MAC_BB_PD
1405 esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
1406 esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
1407 #endif
1408
1409 esp_bt_power_domain_off();
1410 #if CONFIG_MAC_BB_PD
1411 esp_mac_bb_pd_mem_deinit();
1412 #endif
1413 esp_phy_modem_deinit();
1414
1415 if (osi_funcs_p != NULL) {
1416 free(osi_funcs_p);
1417 osi_funcs_p = NULL;
1418 }
1419
1420 btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
1421 }
1422
esp_bt_controller_enable(esp_bt_mode_t mode)1423 esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
1424 {
1425 esp_err_t ret = ESP_OK;
1426
1427 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
1428 return ESP_ERR_INVALID_STATE;
1429 }
1430
1431 //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
1432 if (mode != btdm_controller_get_mode()) {
1433 ESP_LOGE(BT_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
1434 return ESP_ERR_INVALID_ARG;
1435 }
1436
1437 #if CONFIG_SW_COEXIST_ENABLE
1438 coex_enable();
1439 #endif
1440
1441 // enable low power mode
1442 do {
1443 #ifdef CONFIG_PM_ENABLE
1444 if (s_lp_cntl.no_light_sleep) {
1445 esp_pm_lock_acquire(s_light_sleep_pm_lock);
1446 }
1447 esp_pm_lock_acquire(s_pm_lock);
1448 s_lp_stat.pm_lock_released = 0;
1449 #endif
1450
1451 if (s_lp_cntl.enable) {
1452 btdm_controller_enable_sleep(true);
1453 }
1454 } while (0);
1455
1456 if (btdm_controller_enable(mode) != 0) {
1457 ret = ESP_ERR_INVALID_STATE;
1458 goto error;
1459 }
1460
1461 btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
1462
1463 return ret;
1464
1465 error:
1466 // disable low power mode
1467 do {
1468 btdm_controller_enable_sleep(false);
1469 #ifdef CONFIG_PM_ENABLE
1470 if (s_lp_cntl.no_light_sleep) {
1471 esp_pm_lock_release(s_light_sleep_pm_lock);
1472 }
1473 if (s_lp_stat.pm_lock_released == 0) {
1474 esp_pm_lock_release(s_pm_lock);
1475 s_lp_stat.pm_lock_released = 1;
1476 }
1477 #endif
1478 } while (0);
1479
1480 #if CONFIG_SW_COEXIST_ENABLE
1481 coex_disable();
1482 #endif
1483 return ret;
1484 }
1485
esp_bt_controller_disable(void)1486 esp_err_t esp_bt_controller_disable(void)
1487 {
1488 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1489 return ESP_ERR_INVALID_STATE;
1490 }
1491
1492 async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
1493 while (!btdm_power_state_active()){}
1494 btdm_controller_disable();
1495
1496 async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
1497
1498 #if CONFIG_SW_COEXIST_ENABLE
1499 coex_disable();
1500 #endif
1501
1502 btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
1503
1504 // disable low power mode
1505 do {
1506 #ifdef CONFIG_PM_ENABLE
1507 if (s_lp_cntl.no_light_sleep) {
1508 esp_pm_lock_release(s_light_sleep_pm_lock);
1509 }
1510
1511 if (s_lp_stat.pm_lock_released == 0) {
1512 esp_pm_lock_release(s_pm_lock);
1513 s_lp_stat.pm_lock_released = 1;
1514 } else {
1515 assert(0);
1516 }
1517 #endif
1518 } while (0);
1519
1520 return ESP_OK;
1521 }
1522
esp_bt_controller_get_status(void)1523 esp_bt_controller_status_t esp_bt_controller_get_status(void)
1524 {
1525 return btdm_controller_status;
1526 }
1527
1528 /* extra functions */
esp_ble_tx_power_set(esp_ble_power_type_t power_type,esp_power_level_t power_level)1529 esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
1530 {
1531 esp_err_t stat = ESP_FAIL;
1532
1533 switch (power_type) {
1534 case ESP_BLE_PWR_TYPE_ADV:
1535 case ESP_BLE_PWR_TYPE_SCAN:
1536 case ESP_BLE_PWR_TYPE_DEFAULT:
1537 if (ble_txpwr_set(power_type, power_level) == 0) {
1538 stat = ESP_OK;
1539 }
1540 break;
1541 default:
1542 stat = ESP_ERR_NOT_SUPPORTED;
1543 break;
1544 }
1545
1546 return stat;
1547 }
1548
esp_ble_tx_power_get(esp_ble_power_type_t power_type)1549 esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
1550 {
1551 esp_power_level_t lvl;
1552
1553 switch (power_type) {
1554 case ESP_BLE_PWR_TYPE_ADV:
1555 case ESP_BLE_PWR_TYPE_SCAN:
1556 lvl = (esp_power_level_t)ble_txpwr_get(power_type);
1557 break;
1558 case ESP_BLE_PWR_TYPE_CONN_HDL0:
1559 case ESP_BLE_PWR_TYPE_CONN_HDL1:
1560 case ESP_BLE_PWR_TYPE_CONN_HDL2:
1561 case ESP_BLE_PWR_TYPE_CONN_HDL3:
1562 case ESP_BLE_PWR_TYPE_CONN_HDL4:
1563 case ESP_BLE_PWR_TYPE_CONN_HDL5:
1564 case ESP_BLE_PWR_TYPE_CONN_HDL6:
1565 case ESP_BLE_PWR_TYPE_CONN_HDL7:
1566 case ESP_BLE_PWR_TYPE_CONN_HDL8:
1567 case ESP_BLE_PWR_TYPE_DEFAULT:
1568 lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
1569 break;
1570 default:
1571 lvl = ESP_PWR_LVL_INVALID;
1572 break;
1573 }
1574
1575 return lvl;
1576 }
1577
esp_bt_sleep_enable(void)1578 esp_err_t esp_bt_sleep_enable (void)
1579 {
1580 esp_err_t status;
1581 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1582 return ESP_ERR_INVALID_STATE;
1583 }
1584 if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
1585 btdm_controller_enable_sleep (true);
1586 status = ESP_OK;
1587 } else {
1588 status = ESP_ERR_NOT_SUPPORTED;
1589 }
1590
1591 return status;
1592 }
1593
esp_bt_sleep_disable(void)1594 esp_err_t esp_bt_sleep_disable (void)
1595 {
1596 esp_err_t status;
1597 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1598 return ESP_ERR_INVALID_STATE;
1599 }
1600 if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
1601 btdm_controller_enable_sleep (false);
1602 status = ESP_OK;
1603 } else {
1604 status = ESP_ERR_NOT_SUPPORTED;
1605 }
1606
1607 return status;
1608 }
1609
esp_bt_controller_is_sleeping(void)1610 bool esp_bt_controller_is_sleeping(void)
1611 {
1612 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
1613 btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
1614 return false;
1615 }
1616
1617 return !btdm_power_state_active();
1618 }
1619
esp_bt_controller_wakeup_request(void)1620 void esp_bt_controller_wakeup_request(void)
1621 {
1622 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
1623 btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
1624 return;
1625 }
1626
1627 btdm_wakeup_request();
1628
1629 }
1630
esp_bt_h4tl_eif_io_event_notify(int event)1631 int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
1632 {
1633 return btdm_hci_tl_io_event_post(event);
1634 }
1635
esp_bt_get_tx_buf_num(void)1636 uint16_t esp_bt_get_tx_buf_num(void)
1637 {
1638 return l2c_ble_link_get_tx_buf_num();
1639 }
1640
coex_wifi_sleep_set_hook(bool sleep)1641 static void coex_wifi_sleep_set_hook(bool sleep)
1642 {
1643
1644 }
1645 #endif /* CONFIG_BT_ENABLED */
1646
