1 /*
2 * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 #include <stdint.h>
7 #include "sdkconfig.h"
8 #include "esp_attr.h"
9 #include "esp_log.h"
10 #include "esp_image_format.h"
11 #include "flash_qio_mode.h"
12 #include "esp_rom_gpio.h"
13 #include "esp_rom_efuse.h"
14 #include "esp_rom_uart.h"
15 #include "esp_rom_sys.h"
16 #include "esp_rom_spiflash.h"
17 #include "soc/gpio_sig_map.h"
18 #include "soc/io_mux_reg.h"
19 #include "soc/assist_debug_reg.h"
20 #include "esp_cpu.h"
21 #include "soc/rtc.h"
22 #include "soc/spi_periph.h"
23 #include "soc/extmem_reg.h"
24 #include "soc/io_mux_reg.h"
25 #include "soc/pcr_reg.h"
26 #include "esp32c6/rom/efuse.h"
27 #include "esp32c6/rom/ets_sys.h"
28 #include "esp32c6/rom/spi_flash.h"
29 #include "bootloader_common.h"
30 #include "bootloader_init.h"
31 #include "bootloader_clock.h"
32 #include "bootloader_flash_config.h"
33 #include "bootloader_mem.h"
34 #include "esp_private/regi2c_ctrl.h"
35 #include "soc/regi2c_lp_bias.h"
36 #include "soc/regi2c_bias.h"
37 #include "bootloader_console.h"
38 #include "bootloader_flash_priv.h"
39 #include "bootloader_soc.h"
40 #include "esp_private/bootloader_flash_internal.h"
41 #include "esp_efuse.h"
42 #include "hal/mmu_hal.h"
43 #include "hal/cache_hal.h"
44 #include "hal/clk_tree_ll.h"
45 #include "soc/lp_wdt_reg.h"
46 #include "hal/efuse_hal.h"
47 #include "modem/modem_lpcon_reg.h"
48 #ifdef CONFIG_ESP_SIMPLE_BOOT
49 #include "esp_flash_internal.h"
50 #endif
51
52 static const char *TAG = "boot.esp32c6";
53
wdt_reset_cpu0_info_enable(void)54 static void wdt_reset_cpu0_info_enable(void)
55 {
56 REG_SET_BIT(PCR_ASSIST_CONF_REG, PCR_ASSIST_CLK_EN);
57 REG_CLR_BIT(PCR_ASSIST_CONF_REG, PCR_ASSIST_RST_EN);
58 REG_WRITE(ASSIST_DEBUG_CORE_0_RCD_EN_REG, ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN | ASSIST_DEBUG_CORE_0_RCD_RECORDEN);
59 }
60
wdt_reset_info_dump(int cpu)61 static void wdt_reset_info_dump(int cpu)
62 {
63 (void) cpu;
64 // saved PC was already printed by the ROM bootloader.
65 // nothing to do here.
66 }
67
bootloader_check_wdt_reset(void)68 static void bootloader_check_wdt_reset(void)
69 {
70 int wdt_rst = 0;
71 soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
72 if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
73 rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
74 ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
75 wdt_rst = 1;
76 }
77 if (wdt_rst) {
78 // if reset by WDT dump info from trace port
79 wdt_reset_info_dump(0);
80 }
81 wdt_reset_cpu0_info_enable();
82 }
83
bootloader_super_wdt_auto_feed(void)84 static void bootloader_super_wdt_auto_feed(void)
85 {
86 REG_WRITE(LP_WDT_SWD_WPROTECT_REG, LP_WDT_SWD_WKEY_VALUE);
87 REG_SET_BIT(LP_WDT_SWD_CONFIG_REG, LP_WDT_SWD_AUTO_FEED_EN);
88 REG_WRITE(LP_WDT_SWD_WPROTECT_REG, 0);
89 }
90
bootloader_hardware_init(void)91 static inline void bootloader_hardware_init(void)
92 {
93 // In 80MHz flash mode, ROM sets the mspi module clk divider to 2, fix it here
94 #if CONFIG_ESPTOOLPY_FLASHFREQ_80M && !CONFIG_APP_BUILD_TYPE_RAM
95 clk_ll_mspi_fast_set_hs_divider(6);
96 esp_rom_spiflash_config_clk(1, 0);
97 esp_rom_spiflash_config_clk(1, 1);
98 esp_rom_spiflash_fix_dummylen(0, 1);
99 esp_rom_spiflash_fix_dummylen(1, 1);
100 #endif
101
102 /* Enable analog i2c master clock */
103 SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
104 SET_PERI_REG_MASK(MODEM_LPCON_I2C_MST_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_SEL_160M);
105 }
106
bootloader_ana_reset_config(void)107 static inline void bootloader_ana_reset_config(void)
108 {
109 //Enable super WDT reset.
110 bootloader_ana_super_wdt_reset_config(true);
111 //Enable BOD reset
112 bootloader_ana_bod_reset_config(true);
113 }
114
bootloader_init(void)115 esp_err_t bootloader_init(void)
116 {
117 esp_err_t ret = ESP_OK;
118
119 bootloader_hardware_init();
120 bootloader_ana_reset_config();
121 bootloader_super_wdt_auto_feed();
122
123 // In RAM_APP, memory will be initialized in `call_start_cpu0`
124 #if !CONFIG_APP_BUILD_TYPE_RAM
125 // protect memory region
126 bootloader_init_mem();
127 /* check that static RAM is after the stack */
128 assert(&_bss_start <= &_bss_end);
129 assert(&_data_start <= &_data_end);
130 // clear bss section
131 bootloader_clear_bss_section();
132 #endif // !CONFIG_APP_BUILD_TYPE_RAM
133
134 // init eFuse virtual mode (read eFuses to RAM)
135 #ifdef CONFIG_EFUSE_VIRTUAL
136 ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
137 #ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
138 esp_efuse_init_virtual_mode_in_ram();
139 #endif
140 #endif
141 // config clock
142 bootloader_clock_configure();
143 // initialize console, from now on, we can use esp_log
144 bootloader_console_init();
145 /* print 2nd bootloader banner */
146 bootloader_print_banner();
147
148 /* TODO: fix the flash init for all scenarios */
149 #ifdef CONFIG_ESP_SIMPLE_BOOT
150 esp_mspi_pin_init();
151 spi_flash_init_chip_state();
152
153 if ((ret = esp_flash_init_default_chip()) != ESP_OK) {
154 ESP_EARLY_LOGE(TAG, "esp_flash_init_default_chip err=%x\n", ret);
155 return ret;
156 }
157 #endif
158
159 #if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
160 //init cache hal
161 cache_hal_init();
162 //init mmu
163 mmu_hal_init();
164 // update flash ID
165 bootloader_flash_update_id();
166 // Check and run XMC startup flow
167 if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
168 ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
169 return ret;
170 }
171 #if !CONFIG_APP_BUILD_TYPE_RAM
172 // read bootloader header
173 if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
174 return ret;
175 }
176 // read chip revision and check if it's compatible to bootloader
177 if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
178 return ret;
179 }
180 #endif // !CONFIG_APP_BUILD_TYPE_RAM
181 // initialize spi flash
182 if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
183 return ret;
184 }
185 #endif // #if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
186
187 // check whether a WDT reset happend
188 bootloader_check_wdt_reset();
189 // config WDT
190 bootloader_config_wdt();
191 // enable RNG early entropy source
192 bootloader_enable_random();
193
194 return ret;
195 }
196
