1.. code-block:: none 2 3 espefuse.py -p PORT summary 4 5 Connecting.... 6 Detecting chip type... ESP32-C3 7 espefuse.py v3.1-dev 8 EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value) 9 ---------------------------------------------------------------------------------------- 10 Config fuses: 11 DIS_ICACHE (BLOCK0) Disables ICache = False R/W (0b0) 12 DIS_DOWNLOAD_ICACHE (BLOCK0) Disables Icache when SoC is in Download mode = False R/W (0b0) 13 DIS_FORCE_DOWNLOAD (BLOCK0) Disables forcing chip into Download mode = False R/W (0b0) 14 DIS_CAN (BLOCK0) Disables the TWAI Controller hardware = False R/W (0b0) 15 VDD_SPI_AS_GPIO (BLOCK0) Set this bit to vdd spi pin function as gpio = False R/W (0b0) 16 BTLC_GPIO_ENABLE (BLOCK0) Enable btlc gpio = 0 R/W (0b00) 17 POWERGLITCH_EN (BLOCK0) Set this bit to enable power glitch function = False R/W (0b0) 18 POWER_GLITCH_DSENSE (BLOCK0) Sample delay configuration of power glitch = 0 R/W (0b00) 19 DIS_LEGACY_SPI_BOOT (BLOCK0) Disables Legacy SPI boot mode = False R/W (0b0) 20 UART_PRINT_CHANNEL (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0) 21 UART_PRINT_CONTROL (BLOCK0) Sets the default UART boot message output mode = Enabled R/W (0b00) 22 FORCE_SEND_RESUME (BLOCK0) Force ROM code to send a resume command during SPI = False R/W (0b0) 23 bootduring SPI boot 24 BLOCK_USR_DATA (BLOCK3) User data 25 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 26 27 Efuse fuses: 28 WR_DIS (BLOCK0) Disables programming of individual eFuses = 0 R/W (0x00000000) 29 RD_DIS (BLOCK0) Disables software reading from BLOCK4-10 = 0 R/W (0b0000000) 30 31 Flash Config fuses: 32 FLASH_TPUW (BLOCK0) Configures flash startup delay after SoC power-up, = 0 R/W (0x0) 33 unit is (ms/2). When the value is 15, delay is 7. 34 5 ms 35 FLASH_ECC_MODE (BLOCK0) Set this bit to set flsah ecc mode. 36 = flash ecc 16to18 byte mode R/W (0b0) 37 FLASH_TYPE (BLOCK0) Selects SPI flash type = 4 data lines R/W (0b0) 38 FLASH_PAGE_SIZE (BLOCK0) Flash page size = 0 R/W (0b00) 39 FLASH_ECC_EN (BLOCK0) Enable ECC for flash boot = False R/W (0b0) 40 41 Identity fuses: 42 SECURE_VERSION (BLOCK0) Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000) 43 ure) 44 MAC (BLOCK1) Factory MAC Address 45 = 7c:df:a1:40:40:08: (OK) R/W 46 WAFER_VERSION (BLOCK1) WAFER version = (revision 0) R/W (0b000) 47 PKG_VERSION (BLOCK1) Package version = ESP32-C3 R/W (0x0) 48 BLOCK1_VERSION (BLOCK1) BLOCK1 efuse version = 0 R/W (0b000) 49 OPTIONAL_UNIQUE_ID (BLOCK2)(0 errors): Optional unique 128-bit ID 50 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 51 BLOCK2_VERSION (BLOCK2) Version of BLOCK2 = No calibration R/W (0b000) 52 CUSTOM_MAC (BLOCK3) Custom MAC Address 53 = 00:00:00:00:00:00 (OK) R/W 54 55 Jtag Config fuses: 56 JTAG_SEL_ENABLE (BLOCK0) Set this bit to enable selection between usb_to_jt = False R/W (0b0) 57 ag and pad_to_jtag through strapping gpio10 when b 58 oth reg_dis_usb_jtag and reg_dis_pad_jtag are equa 59 l to 0. 60 SOFT_DIS_JTAG (BLOCK0) Software disables JTAG. When software disabled, JT = 0 R/W (0b000) 61 AG can be activated temporarily by HMAC peripheral 62 DIS_PAD_JTAG (BLOCK0) Permanently disable JTAG access via pads. USB JTAG = False R/W (0b0) 63 is controlled separately. 64 65 Security fuses: 66 DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Disables flash encryption when in download boot mo = False R/W (0b0) 67 des 68 SPI_BOOT_CRYPT_CNT (BLOCK0) Enables encryption and decryption, when an SPI boo = Disable R/W (0b000) 69 t mode is set. Enabled when 1 or 3 bits are set,di 70 sabled otherwise 71 SECURE_BOOT_KEY_REVOKE0 (BLOCK0) If set, revokes use of secure boot key digest 0 = False R/W (0b0) 72 SECURE_BOOT_KEY_REVOKE1 (BLOCK0) If set, revokes use of secure boot key digest 1 = False R/W (0b0) 73 SECURE_BOOT_KEY_REVOKE2 (BLOCK0) If set, revokes use of secure boot key digest 2 = False R/W (0b0) 74 KEY_PURPOSE_0 (BLOCK0) KEY0 purpose = USER R/W (0x0) 75 KEY_PURPOSE_1 (BLOCK0) KEY1 purpose = USER R/W (0x0) 76 KEY_PURPOSE_2 (BLOCK0) KEY2 purpose = USER R/W (0x0) 77 KEY_PURPOSE_3 (BLOCK0) KEY3 purpose = USER R/W (0x0) 78 KEY_PURPOSE_4 (BLOCK0) KEY4 purpose = USER R/W (0x0) 79 KEY_PURPOSE_5 (BLOCK0) KEY5 purpose = USER R/W (0x0) 80 SECURE_BOOT_EN (BLOCK0) Enables secure boot = False R/W (0b0) 81 SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Enables aggressive secure boot key revocation mode = False R/W (0b0) 82 DIS_DOWNLOAD_MODE (BLOCK0) Disables all Download boot modes = False R/W (0b0) 83 ENABLE_SECURITY_DOWNLOAD (BLOCK0) Enables secure UART download mode (read/write flas = False R/W (0b0) 84 h only) 85 BLOCK_KEY0 (BLOCK4)(0 errors): 86 Purpose: USER 87 Encryption key0 or user data 88 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 89 BLOCK_KEY1 (BLOCK5)(0 errors): 90 Purpose: USER 91 Encryption key1 or user data 92 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 93 BLOCK_KEY2 (BLOCK6)(0 errors): 94 Purpose: USER 95 Encryption key2 or user data 96 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 97 BLOCK_KEY3 (BLOCK7)(0 errors): 98 Purpose: USER 99 Encryption key3 or user data 100 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 101 BLOCK_KEY4 (BLOCK8)(0 errors): 102 Purpose: USER 103 Encryption key4 or user data 104 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 105 BLOCK_KEY5 (BLOCK9)(0 errors): 106 Purpose: USER 107 Encryption key5 or user data 108 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 109 BLOCK_SYS_DATA2 (BLOCK10)(0 errors): System data (part 2) 110 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 111 112 Spi_Pad_Config fuses: 113 SPI_PAD_CONFIG_CLK (BLOCK1) SPI CLK pad = 0 R/W (0b000000) 114 SPI_PAD_CONFIG_Q (BLOCK1) SPI Q (D1) pad = 0 R/W (0b000000) 115 SPI_PAD_CONFIG_D (BLOCK1) SPI D (D0) pad = 0 R/W (0b000000) 116 SPI_PAD_CONFIG_CS (BLOCK1) SPI CS pad = 0 R/W (0b000000) 117 SPI_PAD_CONFIG_HD (BLOCK1) SPI HD (D3) pad = 0 R/W (0b000000) 118 SPI_PAD_CONFIG_WP (BLOCK1) SPI WP (D2) pad = 0 R/W (0b000000) 119 SPI_PAD_CONFIG_DQS (BLOCK1) SPI DQS pad = 0 R/W (0b000000) 120 SPI_PAD_CONFIG_D4 (BLOCK1) SPI D4 pad = 0 R/W (0b000000) 121 SPI_PAD_CONFIG_D5 (BLOCK1) SPI D5 pad = 0 R/W (0b000000) 122 SPI_PAD_CONFIG_D6 (BLOCK1) SPI D6 pad = 0 R/W (0b000000) 123 SPI_PAD_CONFIG_D7 (BLOCK1) SPI D7 pad = 0 R/W (0b000000) 124 125 Usb Config fuses: 126 DIS_USB_JTAG (BLOCK0) Disables USB JTAG. JTAG access via pads is control = False R/W (0b0) 127 led separately 128 DIS_USB_DEVICE (BLOCK0) Disables USB DEVICE = False R/W (0b0) 129 DIS_USB (BLOCK0) Disables the USB OTG hardware = False R/W (0b0) 130 USB_EXCHG_PINS (BLOCK0) Exchanges USB D+ and D- pins = False R/W (0b0) 131 DIS_USB_DOWNLOAD_MODE (BLOCK0) Disables use of USB in UART download boot mode = False R/W (0b0) 132 133 Vdd_Spi Config fuses: 134 PIN_POWER_SELECTION (BLOCK0) GPIO33-GPIO37 power supply selection in ROM code = VDD3P3_CPU R/W (0b0) 135 136 Wdt Config fuses: 137 WDT_DELAY_SEL (BLOCK0) Selects RTC WDT timeout threshold at startup = False R/W (0b0) 138 139 140To get a dump for all eFuse registers. 141 142.. code-block:: none 143 144 espefuse.py -p PORT dump 145 146 Connecting.... 147 Detecting chip type... ESP32-C3 148 BLOCK0 ( ) [0 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 149 MAC_SPI_8M_0 (BLOCK1 ) [1 ] read_regs: a1404008 00007cdf 00000000 00000000 00000000 00000000 150 BLOCK_SYS_DATA (BLOCK2 ) [2 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 151 BLOCK_USR_DATA (BLOCK3 ) [3 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 152 BLOCK_KEY0 (BLOCK4 ) [4 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 153 BLOCK_KEY1 (BLOCK5 ) [5 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 154 BLOCK_KEY2 (BLOCK6 ) [6 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 155 BLOCK_KEY3 (BLOCK7 ) [7 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 156 BLOCK_KEY4 (BLOCK8 ) [8 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 157 BLOCK_KEY5 (BLOCK9 ) [9 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 158 BLOCK_SYS_DATA2 (BLOCK10 ) [10] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 159 espefuse.py v3.1-dev 160
