1 // Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 #ifndef _SOC_GPIO_STRUCT_H_ 15 #define _SOC_GPIO_STRUCT_H_ 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 typedef volatile struct gpio_dev_s { 21 uint32_t bt_select; /**/ 22 uint32_t out; /**/ 23 uint32_t out_w1ts; /**/ 24 uint32_t out_w1tc; /**/ 25 union { 26 struct { 27 uint32_t data: 22; 28 uint32_t reserved22:10; 29 }; 30 uint32_t val; 31 } out1; 32 union { 33 struct { 34 uint32_t data: 22; 35 uint32_t reserved22:10; 36 }; 37 uint32_t val; 38 } out1_w1ts; 39 union { 40 struct { 41 uint32_t data: 22; 42 uint32_t reserved22:10; 43 }; 44 uint32_t val; 45 } out1_w1tc; 46 union { 47 struct { 48 uint32_t sel: 8; 49 uint32_t reserved8: 24; 50 }; 51 uint32_t val; 52 } sdio_select; 53 uint32_t enable; /**/ 54 uint32_t enable_w1ts; /**/ 55 uint32_t enable_w1tc; /**/ 56 union { 57 struct { 58 uint32_t data: 22; 59 uint32_t reserved22: 10; 60 }; 61 uint32_t val; 62 } enable1; 63 union { 64 struct { 65 uint32_t data: 22; 66 uint32_t reserved22: 10; 67 }; 68 uint32_t val; 69 } enable1_w1ts; 70 union { 71 struct { 72 uint32_t data: 22; 73 uint32_t reserved22: 10; 74 }; 75 uint32_t val; 76 } enable1_w1tc; 77 union { 78 struct { 79 uint32_t strapping: 16; 80 uint32_t reserved16:16; 81 }; 82 uint32_t val; 83 } strap; 84 uint32_t in; /**/ 85 union { 86 struct { 87 uint32_t data: 22; 88 uint32_t reserved22: 10; 89 }; 90 uint32_t val; 91 } in1; 92 uint32_t status; /**/ 93 uint32_t status_w1ts; /**/ 94 uint32_t status_w1tc; /**/ 95 union { 96 struct { 97 uint32_t intr_st: 22; 98 uint32_t reserved22: 10; 99 }; 100 uint32_t val; 101 } status1; 102 union { 103 struct { 104 uint32_t intr_st: 22; 105 uint32_t reserved22: 10; 106 }; 107 uint32_t val; 108 } status1_w1ts; 109 union { 110 struct { 111 uint32_t intr_st: 22; 112 uint32_t reserved22: 10; 113 }; 114 uint32_t val; 115 } status1_w1tc; 116 uint32_t pcpu_int; /**/ 117 uint32_t pcpu_nmi_int; /**/ 118 uint32_t cpusdio_int; /**/ 119 union { 120 struct { 121 uint32_t intr: 22; 122 uint32_t reserved22:10; 123 }; 124 uint32_t val; 125 } pcpu_int1; 126 union { 127 struct { 128 uint32_t intr: 22; 129 uint32_t reserved22: 10; 130 }; 131 uint32_t val; 132 } pcpu_nmi_int1; 133 union { 134 struct { 135 uint32_t intr: 22; 136 uint32_t reserved22:10; 137 }; 138 uint32_t val; 139 } cpusdio_int1; 140 union { 141 struct { 142 uint32_t sync2_bypass: 2; 143 uint32_t pad_driver: 1; 144 uint32_t sync1_bypass: 2; 145 uint32_t reserved5: 2; 146 uint32_t int_type: 3; 147 uint32_t wakeup_enable: 1; 148 uint32_t config: 2; 149 uint32_t int_ena: 5; 150 uint32_t reserved18: 14; 151 }; 152 uint32_t val; 153 } pin[54]; 154 uint32_t status_next; /**/ 155 union { 156 struct { 157 uint32_t intr_st_next: 22; 158 uint32_t reserved22: 10; 159 }; 160 uint32_t val; 161 } status_next1; 162 union { 163 struct { 164 uint32_t func_sel: 6; 165 uint32_t sig_in_inv: 1; 166 uint32_t sig_in_sel: 1; 167 uint32_t reserved8: 24; 168 }; 169 uint32_t val; 170 } func_in_sel_cfg[256]; 171 union { 172 struct { 173 uint32_t func_sel: 9; 174 uint32_t inv_sel: 1; 175 uint32_t oen_sel: 1; 176 uint32_t oen_inv_sel: 1; 177 uint32_t reserved12: 20; 178 }; 179 uint32_t val; 180 } func_out_sel_cfg[54]; 181 union { 182 struct { 183 uint32_t clk_en: 1; 184 uint32_t reserved1: 31; 185 }; 186 uint32_t val; 187 } clock_gate; 188 uint32_t reserved_630; 189 uint32_t reserved_634; 190 uint32_t reserved_638; 191 uint32_t reserved_63c; 192 uint32_t reserved_640; 193 uint32_t reserved_644; 194 uint32_t reserved_648; 195 uint32_t reserved_64c; 196 uint32_t reserved_650; 197 uint32_t reserved_654; 198 uint32_t reserved_658; 199 uint32_t reserved_65c; 200 uint32_t reserved_660; 201 uint32_t reserved_664; 202 uint32_t reserved_668; 203 uint32_t reserved_66c; 204 uint32_t reserved_670; 205 uint32_t reserved_674; 206 uint32_t reserved_678; 207 uint32_t reserved_67c; 208 uint32_t reserved_680; 209 uint32_t reserved_684; 210 uint32_t reserved_688; 211 uint32_t reserved_68c; 212 uint32_t reserved_690; 213 uint32_t reserved_694; 214 uint32_t reserved_698; 215 uint32_t reserved_69c; 216 uint32_t reserved_6a0; 217 uint32_t reserved_6a4; 218 uint32_t reserved_6a8; 219 uint32_t reserved_6ac; 220 uint32_t reserved_6b0; 221 uint32_t reserved_6b4; 222 uint32_t reserved_6b8; 223 uint32_t reserved_6bc; 224 uint32_t reserved_6c0; 225 uint32_t reserved_6c4; 226 uint32_t reserved_6c8; 227 uint32_t reserved_6cc; 228 uint32_t reserved_6d0; 229 uint32_t reserved_6d4; 230 uint32_t reserved_6d8; 231 uint32_t reserved_6dc; 232 uint32_t reserved_6e0; 233 uint32_t reserved_6e4; 234 uint32_t reserved_6e8; 235 uint32_t reserved_6ec; 236 uint32_t reserved_6f0; 237 uint32_t reserved_6f4; 238 uint32_t reserved_6f8; 239 union { 240 struct { 241 uint32_t date: 28; 242 uint32_t reserved28: 4; 243 }; 244 uint32_t val; 245 } date; 246 } gpio_dev_t; 247 extern gpio_dev_t GPIO; 248 #ifdef __cplusplus 249 } 250 #endif 251 252 #endif /* _SOC_GPIO_STRUCT_H_ */ 253
