1 #include <esp_types.h>
2 #include <stdio.h>
3 #include "sdkconfig.h"
4 #include "freertos/FreeRTOS.h"
5 #include "freertos/task.h"
6 #include "freertos/semphr.h"
7 #include "freertos/queue.h"
8 #include "esp_intr_alloc.h"
9 #include "unity.h"
10 #include "soc/cpu.h"
11 #include "test_utils.h"
12 #if CONFIG_IDF_TARGET_ARCH_XTENSA
13 #include "xtensa/hal.h"
14 #include "freertos/xtensa_api.h"
15 #define TEST_SET_INT_MASK(mask) xt_set_intset(mask)
16 #define TEST_CLR_INT_MASK(mask) xt_set_intclear(mask)
17 #elif CONFIG_IDF_TARGET_ARCH_RISCV
18 #include "riscv/interrupt.h"
19 #define TEST_SET_INT_MASK(mask) esprv_intc_int_enable(mask)
20 #define TEST_CLR_INT_MASK(mask) esprv_intc_int_disable(mask)
21 #endif
22
23 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
24
25 #define SW_ISR_LEVEL_1 7
26
27 static SemaphoreHandle_t sync;
28 static SemaphoreHandle_t end_sema;
29 static uint32_t cycle_before_trigger;
30 static uint32_t cycle_before_exit;
31 static uint32_t delta_enter_cycles = 0;
32 static uint32_t delta_exit_cycles = 0;
33
software_isr_using_parameter_vportyield(void * arg)34 static void software_isr_using_parameter_vportyield(void *arg) {
35 (void)arg;
36 BaseType_t yield;
37 delta_enter_cycles += portGET_RUN_TIME_COUNTER_VALUE() - cycle_before_trigger;
38 TEST_CLR_INT_MASK(1 << SW_ISR_LEVEL_1);
39
40 xSemaphoreGiveFromISR(sync, &yield);
41 portYIELD_FROM_ISR(yield);
42
43 cycle_before_exit = portGET_RUN_TIME_COUNTER_VALUE();
44 }
45
software_isr_using_no_argument_vportyield(void * arg)46 static void software_isr_using_no_argument_vportyield(void *arg) {
47 (void)arg;
48 BaseType_t yield;
49 delta_enter_cycles += portGET_RUN_TIME_COUNTER_VALUE() - cycle_before_trigger;
50
51 TEST_CLR_INT_MASK(1 << SW_ISR_LEVEL_1);
52
53 xSemaphoreGiveFromISR(sync, &yield);
54 if(yield) {
55 portYIELD_FROM_ISR();
56 }
57 cycle_before_exit = portGET_RUN_TIME_COUNTER_VALUE();
58 }
59
test_task(void * arg)60 static void test_task(void *arg) {
61 (void) arg;
62
63 for(int i = 0;i < 10000; i++) {
64 cycle_before_trigger = portGET_RUN_TIME_COUNTER_VALUE();
65 TEST_SET_INT_MASK(1 << SW_ISR_LEVEL_1);
66 xSemaphoreTake(sync, portMAX_DELAY);
67 delta_exit_cycles += portGET_RUN_TIME_COUNTER_VALUE() - cycle_before_exit;
68 }
69
70 delta_enter_cycles /= 10000;
71 delta_exit_cycles /= 10000;
72
73 xSemaphoreGive(end_sema);
74 vTaskDelete(NULL);
75 }
76
77 TEST_CASE("isr latency test vport-yield-from-isr with no parameter", "[freertos] [ignore]")
78 {
79 intr_handle_t handle;
80 esp_err_t err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE, ESP_INTR_FLAG_LEVEL1, &software_isr_using_no_argument_vportyield, NULL, &handle);
81 TEST_ASSERT_EQUAL_HEX32(ESP_OK, err);
82
83 sync = xSemaphoreCreateBinary();
84 TEST_ASSERT(sync != NULL);
85 end_sema = xSemaphoreCreateBinary();
86 TEST_ASSERT(end_sema != NULL);
87 xTaskCreatePinnedToCore(test_task, "tst" , 4096, NULL, configMAX_PRIORITIES - 1, NULL, 0);
88 vTaskDelay(100);
89 BaseType_t result = xSemaphoreTake(end_sema, portMAX_DELAY);
90 TEST_ASSERT_EQUAL_HEX32(pdTRUE, result);
91 TEST_PERFORMANCE_LESS_THAN(ISR_ENTER_CYCLES, "%d cycles" ,delta_enter_cycles);
92 TEST_PERFORMANCE_LESS_THAN(ISR_EXIT_CYCLES, "%d cycles" ,delta_exit_cycles);
93
94 esp_intr_free(handle);
95 }
96
97 TEST_CASE("isr latency test vport-yield-from-isr with parameter", "[freertos][ignore]")
98 {
99 intr_handle_t handle;
100 esp_err_t err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE, ESP_INTR_FLAG_LEVEL1, &software_isr_using_parameter_vportyield, NULL, &handle);
101 TEST_ASSERT_EQUAL_HEX32(ESP_OK, err);
102
103 sync = xSemaphoreCreateBinary();
104 TEST_ASSERT(sync != NULL);
105 end_sema = xSemaphoreCreateBinary();
106 TEST_ASSERT(end_sema != NULL);
107 xTaskCreatePinnedToCore(test_task, "tst" , 4096, NULL, configMAX_PRIORITIES - 1, NULL, 0);
108 BaseType_t result = xSemaphoreTake(end_sema, portMAX_DELAY);
109 TEST_ASSERT_EQUAL_HEX32(pdTRUE, result);
110 TEST_PERFORMANCE_LESS_THAN(ISR_ENTER_CYCLES, "%d cycles" ,delta_enter_cycles);
111 TEST_PERFORMANCE_LESS_THAN(ISR_EXIT_CYCLES, "%d cycles" ,delta_exit_cycles);
112
113 esp_intr_free(handle);
114 }
115
116 #endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
117
