1 /*
2  * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include "bootloader_common.h"
8 #include "bootloader_clock.h"
9 #include "soc/efuse_reg.h"
10 #include "soc/syscon_reg.h"
11 
bootloader_common_get_chip_revision(void)12 uint8_t bootloader_common_get_chip_revision(void)
13 {
14     uint8_t eco_bit0, eco_bit1, eco_bit2;
15     eco_bit0 = (REG_READ(EFUSE_BLK0_RDATA3_REG) & 0xF000) >> 15;
16     eco_bit1 = (REG_READ(EFUSE_BLK0_RDATA5_REG) & 0x100000) >> 20;
17     eco_bit2 = (REG_READ(SYSCON_DATE_REG) & 0x80000000) >> 31;
18     uint32_t combine_value = (eco_bit2 << 2) | (eco_bit1 << 1) | eco_bit0;
19     uint8_t chip_ver = 0;
20     switch (combine_value) {
21     case 0:
22         chip_ver = 0;
23         break;
24     case 1:
25         chip_ver = 1;
26         break;
27     case 3:
28         chip_ver = 2;
29         break;
30 #if CONFIG_IDF_ENV_FPGA
31     case 4: /* Empty efuses, but SYSCON_DATE_REG bit is set */
32         chip_ver = 3;
33         break;
34 #endif
35     case 7:
36         chip_ver = 3;
37         break;
38     default:
39         chip_ver = 0;
40         break;
41     }
42     return chip_ver;
43 }
44 
bootloader_common_get_chip_ver_pkg(void)45 uint32_t bootloader_common_get_chip_ver_pkg(void)
46 {
47     uint32_t pkg_version = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG);
48     uint32_t pkg_version_4bit = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG_4BIT);
49     return (pkg_version_4bit << 3) | pkg_version;
50 }
51 
bootloader_clock_get_rated_freq_mhz()52 int bootloader_clock_get_rated_freq_mhz()
53 {
54     //Check if ESP32 is rated for a CPU frequency of 160MHz only
55     if (REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_RATED) &&
56         REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_LOW)) {
57         return 160;
58     }
59     return 240;
60 }
61