1 /*
2 * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 /*
7 Tests for the interrupt allocator.
8 */
9
10 #include <stdio.h>
11 #include "esp_types.h"
12 #include "esp_rom_sys.h"
13 #include "freertos/FreeRTOS.h"
14 #include "freertos/task.h"
15 #include "freertos/semphr.h"
16 #include "freertos/queue.h"
17 #include "unity.h"
18 #include "esp_intr_alloc.h"
19 #include "driver/periph_ctrl.h"
20 #include "driver/timer.h"
21 #include "soc/soc_caps.h"
22 #include "soc/spi_periph.h"
23 #include "hal/spi_ll.h"
24 #include "sdkconfig.h"
25
26 #define TIMER_DIVIDER (16) /*!< Hardware timer clock divider */
27 #define TIMER_SCALE (APB_CLK_FREQ / TIMER_DIVIDER) /*!< used to calculate counter value */
28 #define TIMER_INTERVAL0_SEC (3) /*!< test interval for timer 0 */
29 #define TIMER_INTERVAL1_SEC (5) /*!< test interval for timer 1 */
30
my_timer_init(int timer_group,int timer_idx,uint64_t alarm_value)31 static void my_timer_init(int timer_group, int timer_idx, uint64_t alarm_value)
32 {
33 timer_config_t config = {
34 .alarm_en = 1,
35 .auto_reload = 1,
36 .counter_dir = TIMER_COUNT_UP,
37 .divider = TIMER_DIVIDER,
38 };
39 /*Configure timer*/
40 timer_init(timer_group, timer_idx, &config);
41 /*Stop timer counter*/
42 timer_pause(timer_group, timer_idx);
43 /*Load counter value */
44 timer_set_counter_value(timer_group, timer_idx, 0);
45 /*Set alarm value*/
46 timer_set_alarm_value(timer_group, timer_idx, alarm_value);
47 /*Enable timer interrupt*/
48 timer_enable_intr(timer_group, timer_idx);
49 }
50
51 static volatile int count[SOC_TIMER_GROUP_TOTAL_TIMERS] = {0};
52
timer_isr(void * arg)53 static void timer_isr(void *arg)
54 {
55 int timer_idx = (int)arg;
56 int group_id = timer_idx / SOC_TIMER_GROUP_TIMERS_PER_GROUP;
57 int timer_id = timer_idx % SOC_TIMER_GROUP_TIMERS_PER_GROUP;
58 count[timer_idx]++;
59
60 timer_group_clr_intr_status_in_isr(group_id, timer_id);
61 timer_group_enable_alarm_in_isr(group_id, timer_id);
62 }
63
timer_test(int flags)64 static void timer_test(int flags)
65 {
66 timer_isr_handle_t inth[SOC_TIMER_GROUP_TOTAL_TIMERS];
67 for (int i = 0; i < SOC_TIMER_GROUPS; i++) {
68 for (int j = 0; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
69 my_timer_init(i, j, 100000 + 10000 * (i * SOC_TIMER_GROUP_TIMERS_PER_GROUP + j + 1));
70 }
71 }
72 timer_isr_register(0, 0, timer_isr, (void *)0, flags | ESP_INTR_FLAG_INTRDISABLED, &inth[0]);
73 printf("Interrupts allocated: %d (dis)\r\n", esp_intr_get_intno(inth[0]));
74
75 for (int j = 1; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
76 timer_isr_register(0, j, timer_isr, (void *)1, flags, &inth[j]);
77 printf("Interrupts allocated: %d\r\n", esp_intr_get_intno(inth[j]));
78 }
79 for (int i = 1; i < SOC_TIMER_GROUPS; i++) {
80 for (int j = 0; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
81 timer_isr_register(i, j, timer_isr, (void *)(i * SOC_TIMER_GROUP_TIMERS_PER_GROUP + j), flags, &inth[i * SOC_TIMER_GROUP_TIMERS_PER_GROUP + j]);
82 printf("Interrupts allocated: %d\r\n", esp_intr_get_intno(inth[i * SOC_TIMER_GROUP_TIMERS_PER_GROUP + j]));
83 }
84 }
85 for (int i = 0; i < SOC_TIMER_GROUPS; i++) {
86 for (int j = 0; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
87 timer_start(i, j);
88 }
89 }
90
91 printf("Timer values on start:");
92 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
93 count[i] = 0;
94 printf(" %d", count[i]);
95 }
96 printf("\r\n");
97
98 vTaskDelay(1000 / portTICK_PERIOD_MS);
99 printf("Timer values after 1 sec:");
100 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
101 printf(" %d", count[i]);
102 }
103 printf("\r\n");
104
105 TEST_ASSERT(count[0] == 0);
106 for (int i = 1; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
107 TEST_ASSERT(count[i] != 0);
108 }
109
110 printf("Disabling half of timers' interrupt...\r\n");
111 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i++) {
112 esp_intr_disable(inth[i]);
113 }
114 for (int i = SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
115 esp_intr_enable(inth[i]);
116 }
117 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
118 count[i] = 0;
119 }
120
121 vTaskDelay(1000 / portTICK_PERIOD_MS);
122 printf("Timer values after 1 sec:");
123 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
124 printf(" %d", count[i]);
125 }
126 printf("\r\n");
127 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i++) {
128 TEST_ASSERT(count[i] == 0);
129 }
130 for (int i = SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
131 TEST_ASSERT(count[i] != 0);
132 }
133
134 printf("Disabling another half...\r\n");
135 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i++) {
136 esp_intr_enable(inth[i]);
137 }
138 for (int i = SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
139 esp_intr_disable(inth[i]);
140 }
141 for (int x = 0; x < SOC_TIMER_GROUP_TOTAL_TIMERS; x++) {
142 count[x] = 0;
143 }
144 vTaskDelay(1000 / portTICK_PERIOD_MS);
145 printf("Timer values after 1 sec:");
146 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
147 printf(" %d", count[i]);
148 }
149 printf("\r\n");
150 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i++) {
151 TEST_ASSERT(count[i] != 0);
152 }
153 for (int i = SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
154 TEST_ASSERT(count[i] == 0);
155 }
156 printf("Done.\n");
157 for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
158 esp_intr_free(inth[i]);
159 }
160 }
161
162 TEST_CASE("Intr_alloc test, private ints", "[intr_alloc]")
163 {
164 timer_test(0);
165 }
166
167 TEST_CASE("Intr_alloc test, shared ints", "[intr_alloc]")
168 {
169 timer_test(ESP_INTR_FLAG_SHARED);
170 }
171
172 typedef struct {
173 bool flag1;
174 bool flag2;
175 bool flag3;
176 bool flag4;
177 } intr_alloc_test_ctx_t;
178
int_handler1(void * arg)179 void IRAM_ATTR int_handler1(void *arg)
180 {
181 intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
182 esp_rom_printf("handler 1 called.\n");
183 if ( ctx->flag1 ) {
184 ctx->flag3 = true;
185 } else {
186 ctx->flag1 = true;
187 }
188
189 #ifdef CONFIG_IDF_TARGET_ESP32
190 spi_ll_clear_int_stat(&SPI2);
191 #else
192 spi_ll_clear_int_stat(&GPSPI2);
193 #endif
194 }
195
int_handler2(void * arg)196 void IRAM_ATTR int_handler2(void *arg)
197 {
198 intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
199 esp_rom_printf("handler 2 called.\n");
200 if ( ctx->flag2 ) {
201 ctx->flag4 = true;
202 } else {
203 ctx->flag2 = true;
204 }
205 }
206
207 TEST_CASE("allocate 2 handlers for a same source and remove the later one", "[intr_alloc]")
208 {
209 intr_alloc_test_ctx_t ctx = {false, false, false, false };
210 intr_handle_t handle1, handle2;
211
212 // enable SPI2
213 periph_module_enable(spi_periph_signal[1].module);
214
215 esp_err_t r;
216 r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler1, &ctx, &handle1);
217 TEST_ESP_OK(r);
218 //try an invalid assign first
219 r = esp_intr_alloc(spi_periph_signal[1].irq, 0, int_handler2, NULL, &handle2);
220 TEST_ASSERT_EQUAL_INT(ESP_ERR_NOT_FOUND, r);
221 //assign shared then
222 r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler2, &ctx, &handle2);
223 TEST_ESP_OK(r);
224
225 #ifdef CONFIG_IDF_TARGET_ESP32
226 spi_ll_enable_int(&SPI2);
227 #else
228 spi_ll_enable_int(&GPSPI2);
229 #endif
230
231 printf("trigger first time.\n");
232
233 #ifdef CONFIG_IDF_TARGET_ESP32
234 spi_ll_set_int_stat(&SPI2);
235 #else
236 spi_ll_set_int_stat(&GPSPI2);
237 #endif
238
239 vTaskDelay(100);
240 TEST_ASSERT( ctx.flag1 && ctx.flag2 );
241
242 printf("remove intr 1.\n");
243 r = esp_intr_free(handle2);
244
245 printf("trigger second time.\n");
246
247 #ifdef CONFIG_IDF_TARGET_ESP32
248 spi_ll_set_int_stat(&SPI2);
249 #else
250 spi_ll_set_int_stat(&GPSPI2);
251 #endif
252
253 vTaskDelay(500);
254 TEST_ASSERT( ctx.flag3 && !ctx.flag4 );
255 printf("test passed.\n");
256 esp_intr_free(handle1);
257 }
258
dummy(void * arg)259 static void dummy(void *arg)
260 {
261 }
dummy_iram(void * arg)262 static IRAM_ATTR void dummy_iram(void *arg)
263 {
264 }
dummy_rtc(void * arg)265 static RTC_IRAM_ATTR void dummy_rtc(void *arg)
266 {
267 }
268
269 TEST_CASE("Can allocate IRAM int only with an IRAM handler", "[intr_alloc]")
270 {
271 intr_handle_t ih;
272 esp_err_t err = esp_intr_alloc(spi_periph_signal[1].irq,
273 ESP_INTR_FLAG_IRAM, &dummy, NULL, &ih);
274 TEST_ASSERT_EQUAL_INT(ESP_ERR_INVALID_ARG, err);
275 err = esp_intr_alloc(spi_periph_signal[1].irq,
276 ESP_INTR_FLAG_IRAM, &dummy_iram, NULL, &ih);
277 TEST_ESP_OK(err);
278 err = esp_intr_free(ih);
279 TEST_ESP_OK(err);
280 err = esp_intr_alloc(spi_periph_signal[1].irq,
281 ESP_INTR_FLAG_IRAM, &dummy_rtc, NULL, &ih);
282 TEST_ESP_OK(err);
283 err = esp_intr_free(ih);
284 TEST_ESP_OK(err);
285 }
286
287 #ifndef CONFIG_FREERTOS_UNICORE
isr_free_task(void * param)288 void isr_free_task(void *param)
289 {
290 esp_err_t ret = ESP_FAIL;
291 intr_handle_t *test_handle = (intr_handle_t *)param;
292 if (*test_handle != NULL) {
293 ret = esp_intr_free(*test_handle);
294 if (ret == ESP_OK) {
295 *test_handle = NULL;
296 }
297 }
298 vTaskDelete(NULL);
299 }
300
isr_alloc_free_test(void)301 void isr_alloc_free_test(void)
302 {
303 intr_handle_t test_handle = NULL;
304 esp_err_t ret = esp_intr_alloc(spi_periph_signal[1].irq, 0, int_handler1, NULL, &test_handle);
305 if (ret != ESP_OK) {
306 printf("alloc isr handle fail\n");
307 } else {
308 printf("alloc isr handle on core %d\n", esp_intr_get_cpu(test_handle));
309 }
310 TEST_ASSERT(ret == ESP_OK);
311 xTaskCreatePinnedToCore(isr_free_task, "isr_free_task", 1024 * 2, (void *)&test_handle, 10, NULL, !xPortGetCoreID());
312 vTaskDelay(1000 / portTICK_RATE_MS);
313 TEST_ASSERT(test_handle == NULL);
314 printf("test passed\n");
315 }
316
317 TEST_CASE("alloc and free isr handle on different core", "[intr_alloc]")
318 {
319 isr_alloc_free_test();
320 }
321 #endif
322
323 #if __XTENSA__
324 static volatile int int_timer_ctr;
325
int_timer_handler(void * arg)326 void int_timer_handler(void *arg)
327 {
328 xthal_set_ccompare(1, xthal_get_ccount() + 8000000);
329 int_timer_ctr++;
330 }
331
local_timer_test(void)332 static void local_timer_test(void)
333 {
334 intr_handle_t ih;
335 esp_err_t r;
336 r = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, int_timer_handler, NULL, &ih);
337 TEST_ASSERT(r == ESP_OK);
338 printf("Int timer 1 intno %d\n", esp_intr_get_intno(ih));
339 xthal_set_ccompare(1, xthal_get_ccount() + 8000000);
340 int_timer_ctr = 0;
341 vTaskDelay(1000 / portTICK_PERIOD_MS);
342 printf("Timer val after 1 sec: %d\n", int_timer_ctr);
343 TEST_ASSERT(int_timer_ctr != 0);
344 printf("Disabling int\n");
345 esp_intr_disable(ih);
346 int_timer_ctr = 0;
347 vTaskDelay(1000 / portTICK_PERIOD_MS);
348 printf("Timer val after 1 sec: %d\n", int_timer_ctr);
349 TEST_ASSERT(int_timer_ctr == 0);
350 printf("Re-enabling\n");
351 esp_intr_enable(ih);
352 vTaskDelay(1000 / portTICK_PERIOD_MS);
353 printf("Timer val after 1 sec: %d\n", int_timer_ctr);
354 TEST_ASSERT(int_timer_ctr != 0);
355
356 printf("Free int, re-alloc disabled\n");
357 r = esp_intr_free(ih);
358 TEST_ASSERT(r == ESP_OK);
359 r = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, ESP_INTR_FLAG_INTRDISABLED, int_timer_handler, NULL, &ih);
360 TEST_ASSERT(r == ESP_OK);
361 int_timer_ctr = 0;
362 vTaskDelay(1000 / portTICK_PERIOD_MS);
363 printf("Timer val after 1 sec: %d\n", int_timer_ctr);
364 TEST_ASSERT(int_timer_ctr == 0);
365 printf("Re-enabling\n");
366 esp_intr_enable(ih);
367 vTaskDelay(1000 / portTICK_PERIOD_MS);
368 printf("Timer val after 1 sec: %d\n", int_timer_ctr);
369 TEST_ASSERT(int_timer_ctr != 0);
370 r = esp_intr_free(ih);
371 TEST_ASSERT(r == ESP_OK);
372 printf("Done.\n");
373 }
374
375
376 TEST_CASE("Intr_alloc test, CPU-local int source", "[intr_alloc]")
377 {
378 local_timer_test();
379 }
380
381 #endif // #if __XTENSA__
382
