1 /*
2 * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #ifndef _ESP_CPU_H
8 #define _ESP_CPU_H
9
10 #include <stdint.h>
11 #include <stdbool.h>
12 #include <stddef.h>
13
14 #include "hal/cpu_hal.h"
15
16 #ifdef __cplusplus
17 extern "C" {
18 #endif
19
20 #define ESP_WATCHPOINT_LOAD 0x40000000
21 #define ESP_WATCHPOINT_STORE 0x80000000
22 #define ESP_WATCHPOINT_ACCESS 0xC0000000
23
24 typedef uint32_t esp_cpu_ccount_t;
25
26 /** @brief Read current stack pointer address
27 *
28 */
esp_cpu_get_sp(void)29 static inline void *esp_cpu_get_sp(void)
30 {
31 return cpu_hal_get_sp();
32 }
33
34 /**
35 * @brief Stall CPU using RTC controller
36 * @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP)
37 */
38 void esp_cpu_stall(int cpu_id);
39
40 /**
41 * @brief Un-stall CPU using RTC controller
42 * @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP)
43 */
44 void esp_cpu_unstall(int cpu_id);
45
46 /**
47 * @brief Reset CPU using RTC controller
48 * @param cpu_id ID of the CPU to reset (0 = PRO, 1 = APP)
49 */
50 void esp_cpu_reset(int cpu_id);
51
52 /**
53 * @brief Returns true if a JTAG debugger is attached to CPU
54 * OCD (on chip debug) port.
55 *
56 * @note If "Make exception and panic handlers JTAG/OCD aware"
57 * is disabled, this function always returns false.
58 */
59 bool esp_cpu_in_ocd_debug_mode(void);
60
esp_cpu_get_ccount(void)61 static inline esp_cpu_ccount_t esp_cpu_get_ccount(void)
62 {
63 return cpu_hal_get_cycle_count();
64 }
65
esp_cpu_set_ccount(esp_cpu_ccount_t val)66 static inline void esp_cpu_set_ccount(esp_cpu_ccount_t val)
67 {
68 cpu_hal_set_cycle_count(val);
69 }
70
71 /**
72 * @brief Set a watchpoint to break/panic when a certain memory range is accessed.
73 *
74 * @param no Watchpoint number. On the ESP32, this can be 0 or 1.
75 * @param adr Base address to watch
76 * @param size Size of the region, starting at the base address, to watch. Must
77 * be one of 2^n, with n in [0..6].
78 * @param flags One of ESP_WATCHPOINT_* flags
79 *
80 * @return ESP_ERR_INVALID_ARG on invalid arg, ESP_OK otherwise
81 *
82 * @warning The ESP32 watchpoint hardware watches a region of bytes by effectively
83 * masking away the lower n bits for a region with size 2^n. If adr does
84 * not have zero for these lower n bits, you may not be watching the
85 * region you intended.
86 */
87 esp_err_t esp_cpu_set_watchpoint(int no, void *adr, int size, int flags);
88
89 /**
90 * @brief Clear a watchpoint
91 *
92 * @param no Watchpoint to clear
93 *
94 */
95 void esp_cpu_clear_watchpoint(int no);
96
97 #ifdef __cplusplus
98 }
99 #endif
100
101 #endif // _ESP_CPU_H
102
