1Hardware Abstraction
2====================
3
4Hardware abstraction in ESP-IDF are a group of API that allow users to control peripherals at differing levels of abstraction, as opposed to interfacing with hardware using only the ESP-IDF drivers. ESP-IDF Hardware abstraction will likely be useful for users writing high performance bare-metal drivers, or for those attempting to port an ESP chip to another platform.
5
6This guide is split into the following sections:
7
8    1. :ref:`hw-abstraction-architecture`
9    2. :ref:`hw-abstraction-ll-layer`
10    3. :ref:`hw-abstraction-hal-layer`
11
12.. warning::
13    Hardware abstraction API (excluding the driver and ``xxx_types.h``) should be considered an experimental feature, thus cannot be considered public API. Hardware abstraction API do not adhere to the API name changing restrictions of ESP-IDF's versioning scheme. In other words, it is possible that Hardware Abstraction API may change in between non-major release versions.
14
15.. note::
16    Although this document mainly focuses on hardware abstraction of peripherals (e.g., UART, SPI, I2C), certain layers of hardware abstraction extend to other aspects of hardware as well (e.g., some of the CPU's features are partially abstracted).
17
18.. _hw-abstraction-architecture:
19
20Architecture
21------------
22
23Hardware abstraction in ESP-IDF is comprised of the following layers, ordered from low level (closer to hardware) to high level (further away from hardware) of abstraction.
24
25- Low Level (LL) Layer
26- Hardware Abstraction Layer (HAL)
27- Driver Layers
28
29The LL Layer, and HAL are entirely contained within the ``hal`` component. Each layer is dependent on the layer below it (i.e, driver depends on HAL, HAL depends on LL, LL depends on the register header files).
30
31For a particular peripheral ``xxx``, its hardware abstraction will generally consist of the header files described in the table below. Files that are **Target Specific** will have a separate implementation for each target (i.e., a separate copy for each chip). However, the ``#include`` directive will still be target-independent (i.e., will be the same for different targets) as the build system will automatically include the correct version of the header and source files.
32
33.. |br| raw:: html
34
35    <br>
36
37.. list-table:: Hardware Abstraction Header Files
38    :widths: 25 5 70
39    :header-rows: 1
40
41    * - Include |br| Directive
42      - Target |br| Specific
43      - Description
44    * - ``#include 'soc/xxx_caps.h"``
45      - Y
46      - This header contains a list of C macros specifying the various capabilities of the {IDF_TARGET_NAME}'s peripheral ``xxx``. Hardware capabilities of a peripheral include things such as the number of channels, DMA support, hardware FIFO/buffer lengths, etc.
47    * - ``#include "soc/xxx_struct.h"`` |br| ``#include "soc/xxx_reg.h"``
48      - Y
49      - The two headers contain a representation of a peripheral's registers in C structure and C macro format respectively. Users can operate a peripheral at the register level via either of these two header files.
50    * - ``#include "soc/xxx_pins.h"``
51      - Y
52      - If certain signals of a peripheral are mapped to a particular pin of the {IDF_TARGET_NAME}, their mappings are defined in this header as C macros.
53    * - ``#include "soc/xxx_periph.h"``
54      - N
55      - This header is mainly used as a convenience header file to automatically include ``xxx_caps.h``, ``xxx_struct.h``, and ``xxx_reg.h``.
56    * - ``#include "hal/xxx_types.h``
57      - N
58      - This header contains type definitions and macros that are shared among the LL, HAL, and driver layers. Moreover, it is considered public API thus can be included by the application level. The shared types and definitions usually related to non-implementation specific concepts such as the following:
59
60          - Protocol related types/macros such a frames, modes, common bus speeds, etc.
61          - Features/characteristics of an ``xxx`` peripheral that are likely to be present on any implementation (implementation-independent) such as channels, operating modes, signal amplification or attenuation intensities, etc.
62    * - ``#include "hal/xxx_ll.h"``
63      - Y
64      - This header contains the Low Level (LL) Layer of hardware abstraction. LL Layer API are primarily used to abstract away register operations into readable functions.
65    * - ``#include "hal/xxx_hal.h"``
66      - Y
67      - The Hardware Abstraction Layer (HAL) is used to abstract away peripheral operation steps into functions (e.g., reading a buffer, starting a transmission, handling an event, etc). The HAL is built on top of the LL Layer.
68    * - ``#include "driver/xxx.h"``
69      - N
70      - The driver layer is the highest level of ESP-IDF's hardware abstraction. Driver layer API are meant to be called from ESP-IDF applications, and internally utilize OS primitives. Thus, driver layer API are event-driven, and can used in a multi-threaded environment.
71
72
73.. _hw-abstraction-ll-layer:
74
75LL (Low Level) Layer
76--------------------
77
78The primary purpose of the LL Layer is to abstract away register field access into more easily understandable functions. LL functions essentially translate various in/out arguments into the register fields of a peripheral in the form of get/set functions. All the necessary bit shifting, masking, offsetting, and endianness of the register fields should be handled by the LL functions.
79
80.. code-block:: c
81
82    //Inside xxx_ll.h
83
84    static inline void xxx_ll_set_baud_rate(xxx_dev_t *hw,
85                                            xxx_ll_clk_src_t clock_source,
86                                            uint32_t baud_rate) {
87        uint32_t src_clk_freq = (source_clk == XXX_SCLK_APB) ? APB_CLK_FREQ : REF_CLK_FREQ;
88        uint32_t clock_divider = src_clk_freq / baud;
89        // Set clock select field
90        hw->clk_div_reg.divider = clock_divider >> 4;
91        // Set clock divider field
92        hw->config.clk_sel = (source_clk == XXX_SCLK_APB) ? 0 : 1;
93    }
94
95    static inline uint32_t xxx_ll_get_rx_byte_count(xxx_dev_t *hw) {
96        return hw->status_reg.rx_cnt;
97    }
98
99The code snippet above illustrates typical LL functions for a peripheral ``xxx``. LL functions typically have the following characteristics:
100
101- All LL functions are defined as ``static inline`` so that there is minimal overhead when calling these functions due to compiler optimization.
102- The first argument should be a pointer to a ``xxx_dev_t`` type. The ``xxx_dev_t`` type is a structure representing the peripheral's registers, thus the first argument is always a pointer to the starting address of the peripheral's registers. Note that in some cases where the peripheral has multiple channels with identical register layouts, ``xxx_dev_t *hw`` may point to the registers of a particular channel instead.
103- LL functions should be short and in most cases are deterministic. In other words, the worst case runtime of the LL function can be determined at compile time. Thus, any loops in LL functions should be finite bounded; however, there are currently a few exceptions to this rule.
104- LL functions are not thread safe, it is the responsibility of the upper layers (driver layer) to ensure that registers or register fields are not accessed concurrently.
105
106
107.. _hw-abstraction-hal-layer:
108
109HAL (Hardware Abstraction Layer)
110--------------------------------
111
112The HAL layer models the operational process of a peripheral as a set of general steps, where each step has an associated function. For each step, the details of a peripheral's register implementation (i.e., which registers need to be set/read) are hidden (abstracted away) by the HAL. By modelling peripheral operation as a set of functional steps, any minor hardware implementation differences of the peripheral between different targets or chip versions can be abstracted away by the HAL (i.e., handled transparently). In other words, the HAL API for a particular peripheral will remain mostly the same across multiple targets/chip versions.
113
114The following HAL function examples are selected from the Watchdog Timer HAL as each function maps to one of the steps in a WDT's operation life cycle, thus illustrating how a HAL abstracts a peripheral's operation into functional steps.
115
116.. code-block:: c
117
118    // Initialize one of the WDTs
119    void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr);
120
121    // Configure a particular timeout stage of the WDT
122    void wdt_hal_config_stage(wdt_hal_context_t *hal, wdt_stage_t stage, uint32_t timeout, wdt_stage_action_t behavior);
123
124    // Start the WDT
125    void wdt_hal_enable(wdt_hal_context_t *hal);
126
127    // Feed (i.e., reset) the WDT
128    void wdt_hal_feed(wdt_hal_context_t *hal);
129
130    // Handle a WDT timeout
131    void wdt_hal_handle_intr(wdt_hal_context_t *hal);
132
133    // Stop the WDT
134    void wdt_hal_disable(wdt_hal_context_t *hal);
135
136    // De-initialize the WDT
137    void wdt_hal_deinit(wdt_hal_context_t *hal);
138
139
140HAL functions will generally have the following characteristics:
141
142- The first argument to a HAL function has the ``xxx_hal_context_t *`` type. The HAL context type is used to store information about a particular instance of the peripheral (i.e. the context instance). A HAL context is initialized by the ``xxx_hal_init()`` function and can store information such as the following:
143
144    - The channel number of this instance
145    - Pointer to the peripheral's (or channel's) registers  (i.e., a ``xxx_dev_t *`` type)
146    - Information about an ongoing transaction (e.g., pointer to DMA descriptor list in use)
147    - Some configuration values for the instance (e.g., channel configurations)
148    - Variables to maintain state information regarding the instance (e.g., a flag to indicate if the instance is waiting for transaction to complete)
149- HAL functions should not contain any OS primitives such as queues, semaphores, mutexes, etc. All synchronization/concurrency should be handled at higher layers (e.g., the driver).
150- Some peripherals may have steps that cannot be further abstracted by the HAL, thus will end up being a direct wrapper (or macro) for an LL function.
151- Some HAL functions may be placed in IRAM thus may carry an ``IRAM_ATTR`` or be placed in a separate ``xxx_hal_iram.c`` source file.
152