1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 #ifndef _SOC_I2C_STRUCT_H_ 15 #define _SOC_I2C_STRUCT_H_ 16 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 #include "soc.h" 22 23 typedef volatile struct i2c_dev_s { 24 union { 25 struct { 26 uint32_t period : 9; 27 uint32_t reserved9 : 23; 28 }; 29 uint32_t val; 30 } scl_low_period; 31 union { 32 struct { 33 uint32_t sda_force_out : 1; 34 uint32_t scl_force_out : 1; 35 uint32_t sample_scl_level : 1; 36 uint32_t rx_full_ack_level : 1; 37 uint32_t ms_mode : 1; 38 uint32_t trans_start : 1; 39 uint32_t tx_lsb_first : 1; 40 uint32_t rx_lsb_first : 1; 41 uint32_t clk_en : 1; 42 uint32_t arbitration_en : 1; 43 uint32_t fsm_rst : 1; 44 uint32_t conf_upgate : 1; 45 uint32_t slv_tx_auto_start_en : 1; 46 uint32_t addr_10bit_rw_check_en : 1; 47 uint32_t addr_broadcasting_en : 1; 48 uint32_t reserved15 : 17; 49 }; 50 uint32_t val; 51 } ctr; 52 union { 53 struct { 54 uint32_t resp_rec : 1; 55 uint32_t slave_rw : 1; 56 uint32_t reserved2 : 1; 57 uint32_t arb_lost : 1; 58 uint32_t bus_busy : 1; 59 uint32_t slave_addressed : 1; 60 uint32_t reserved6 : 1; 61 uint32_t reserved7 : 1; 62 uint32_t rx_fifo_cnt : 6; 63 uint32_t stretch_cause : 2; 64 uint32_t reserved16 : 2; 65 uint32_t tx_fifo_cnt : 6; 66 uint32_t scl_main_state_last : 3; 67 uint32_t reserved27 : 1; 68 uint32_t scl_state_last : 3; 69 uint32_t reserved31 : 1; 70 }; 71 uint32_t val; 72 } sr; 73 union { 74 struct { 75 uint32_t time_out_value : 5; 76 uint32_t time_out_en : 1; 77 uint32_t reserved6 : 26; 78 }; 79 uint32_t val; 80 } timeout; 81 union { 82 struct { 83 uint32_t addr : 15; 84 uint32_t reserved15 : 16; 85 uint32_t en_10bit : 1; 86 }; 87 uint32_t val; 88 } slave_addr; 89 union { 90 struct { 91 uint32_t rx_fifo_raddr : 5; 92 uint32_t rx_fifo_waddr : 5; 93 uint32_t tx_fifo_raddr : 5; 94 uint32_t tx_fifo_waddr : 5; 95 uint32_t reserved20 : 1; 96 uint32_t reserved21 : 1; 97 uint32_t slave_rw_point : 8; 98 uint32_t reserved30 : 2; 99 }; 100 uint32_t val; 101 } fifo_st; 102 union { 103 struct { 104 uint32_t rx_fifo_wm_thrhd : 5; 105 uint32_t tx_fifo_wm_thrhd : 5; 106 uint32_t nonfifo_en : 1; 107 uint32_t fifo_addr_cfg_en : 1; 108 uint32_t rx_fifo_rst : 1; 109 uint32_t tx_fifo_rst : 1; 110 uint32_t fifo_prt_en : 1; 111 uint32_t reserved15 : 5; 112 uint32_t reserved20 : 6; 113 uint32_t reserved26 : 1; 114 uint32_t reserved27 : 5; 115 }; 116 uint32_t val; 117 } fifo_conf; 118 union { 119 struct { 120 uint32_t data : 8; 121 uint32_t reserved8 : 24; 122 }; 123 uint32_t val; 124 } fifo_data; 125 union { 126 struct { 127 uint32_t rx_fifo_wm : 1; 128 uint32_t tx_fifo_wm : 1; 129 uint32_t rx_fifo_ovf : 1; 130 uint32_t end_detect : 1; 131 uint32_t byte_trans_done : 1; 132 uint32_t arbitration_lost : 1; 133 uint32_t mst_tx_fifo_udf : 1; 134 uint32_t trans_complete : 1; 135 uint32_t time_out : 1; 136 uint32_t trans_start : 1; 137 uint32_t nack : 1; 138 uint32_t tx_fifo_ovf : 1; 139 uint32_t rx_fifo_udf : 1; 140 uint32_t scl_st_to : 1; 141 uint32_t scl_main_st_to : 1; 142 uint32_t det_start : 1; 143 uint32_t slave_stretch : 1; 144 uint32_t general_call : 1; 145 uint32_t reserved18 : 14; 146 }; 147 uint32_t val; 148 } int_raw; 149 union { 150 struct { 151 uint32_t rx_fifo_wm : 1; 152 uint32_t tx_fifo_wm : 1; 153 uint32_t rx_fifo_ovf : 1; 154 uint32_t end_detect : 1; 155 uint32_t byte_trans_done : 1; 156 uint32_t arbitration_lost : 1; 157 uint32_t mst_tx_fifo_udf : 1; 158 uint32_t trans_complete : 1; 159 uint32_t time_out : 1; 160 uint32_t trans_start : 1; 161 uint32_t nack : 1; 162 uint32_t tx_fifo_ovf : 1; 163 uint32_t rx_fifo_udf : 1; 164 uint32_t scl_st_to : 1; 165 uint32_t scl_main_st_to : 1; 166 uint32_t det_start : 1; 167 uint32_t slave_stretch : 1; 168 uint32_t general_call : 1; 169 uint32_t reserved18 : 14; 170 }; 171 uint32_t val; 172 } int_clr; 173 union { 174 struct { 175 uint32_t rx_fifo_wm : 1; 176 uint32_t tx_fifo_wm : 1; 177 uint32_t rx_fifo_ovf : 1; 178 uint32_t end_detect : 1; 179 uint32_t byte_trans_done : 1; 180 uint32_t arbitration_lost : 1; 181 uint32_t mst_tx_fifo_udf : 1; 182 uint32_t trans_complete : 1; 183 uint32_t time_out : 1; 184 uint32_t trans_start : 1; 185 uint32_t nack : 1; 186 uint32_t tx_fifo_ovf : 1; 187 uint32_t rx_fifo_udf : 1; 188 uint32_t scl_st_to : 1; 189 uint32_t scl_main_st_to : 1; 190 uint32_t det_start : 1; 191 uint32_t slave_stretch : 1; 192 uint32_t general_call : 1; 193 uint32_t reserved18 : 14; 194 }; 195 uint32_t val; 196 } int_ena; 197 union { 198 struct { 199 uint32_t rx_fifo_wm : 1; 200 uint32_t tx_fifo_wm : 1; 201 uint32_t rx_fifo_ovf : 1; 202 uint32_t end_detect : 1; 203 uint32_t byte_trans_done : 1; 204 uint32_t arbitration_lost : 1; 205 uint32_t mst_tx_fifo_udf : 1; 206 uint32_t trans_complete : 1; 207 uint32_t time_out : 1; 208 uint32_t trans_start : 1; 209 uint32_t nack : 1; 210 uint32_t tx_fifo_ovf : 1; 211 uint32_t rx_fifo_udf : 1; 212 uint32_t scl_st_to : 1; 213 uint32_t scl_main_st_to : 1; 214 uint32_t det_start : 1; 215 uint32_t slave_stretch : 1; 216 uint32_t general_call : 1; 217 uint32_t reserved18 : 14; 218 }; 219 uint32_t val; 220 } int_status; 221 union { 222 struct { 223 uint32_t time : 9; 224 uint32_t reserved9 : 23; 225 }; 226 uint32_t val; 227 } sda_hold; 228 union { 229 struct { 230 uint32_t time : 9; 231 uint32_t reserved9 : 23; 232 }; 233 uint32_t val; 234 } sda_sample; 235 union { 236 struct { 237 uint32_t period : 9; 238 uint32_t scl_wait_high_period : 7; 239 uint32_t reserved16 : 16; 240 }; 241 uint32_t val; 242 } scl_high_period; 243 uint32_t reserved_3c; 244 union { 245 struct { 246 uint32_t time : 9; 247 uint32_t reserved9 : 23; 248 }; 249 uint32_t val; 250 } scl_start_hold; 251 union { 252 struct { 253 uint32_t time : 9; 254 uint32_t reserved9 : 23; 255 }; 256 uint32_t val; 257 } scl_rstart_setup; 258 union { 259 struct { 260 uint32_t time : 9; 261 uint32_t reserved9 : 23; 262 }; 263 uint32_t val; 264 } scl_stop_hold; 265 union { 266 struct { 267 uint32_t time : 9; 268 uint32_t reserved9 : 23; 269 }; 270 uint32_t val; 271 } scl_stop_setup; 272 union { 273 struct { 274 uint32_t scl_thres : 4; 275 uint32_t sda_thres : 4; 276 uint32_t scl_en : 1; 277 uint32_t sda_en : 1; 278 uint32_t reserved10 : 22; 279 }; 280 uint32_t val; 281 } filter_cfg; 282 union { 283 struct { 284 uint32_t sclk_div_num : 8; 285 uint32_t sclk_div_a : 6; 286 uint32_t sclk_div_b : 6; 287 uint32_t sclk_sel : 1; 288 uint32_t sclk_active : 1; 289 uint32_t reserved22 : 10; 290 }; 291 uint32_t val; 292 } clk_conf; 293 union { 294 struct { 295 uint32_t command0 : 14; 296 uint32_t reserved14 : 17; 297 uint32_t command0_done : 1; 298 }; 299 uint32_t val; 300 } command[8]; 301 union { 302 struct { 303 uint32_t scl_st_to : 5; /*no more than 23*/ 304 uint32_t reserved5 : 27; 305 }; 306 uint32_t val; 307 } scl_st_time_out; 308 union { 309 struct { 310 uint32_t scl_main_st_to : 5; /*no more than 23*/ 311 uint32_t reserved5 : 27; 312 }; 313 uint32_t val; 314 } scl_main_st_time_out; 315 union { 316 struct { 317 uint32_t scl_rst_slv_en : 1; 318 uint32_t scl_rst_slv_num : 5; 319 uint32_t scl_pd_en : 1; 320 uint32_t sda_pd_en : 1; 321 uint32_t reserved8 : 24; 322 }; 323 uint32_t val; 324 } scl_sp_conf; 325 union { 326 struct { 327 uint32_t stretch_protect_num : 10; 328 uint32_t slave_scl_stretch_en : 1; 329 uint32_t slave_scl_stretch_clr : 1; 330 uint32_t slave_byte_ack_ctl_en : 1; 331 uint32_t slave_byte_ack_level : 1; 332 uint32_t reserved14 : 18; 333 }; 334 uint32_t val; 335 } scl_stretch_conf; 336 uint32_t reserved_88; 337 uint32_t reserved_8c; 338 uint32_t reserved_90; 339 uint32_t reserved_94; 340 uint32_t reserved_98; 341 uint32_t reserved_9c; 342 uint32_t reserved_a0; 343 uint32_t reserved_a4; 344 uint32_t reserved_a8; 345 uint32_t reserved_ac; 346 uint32_t reserved_b0; 347 uint32_t reserved_b4; 348 uint32_t reserved_b8; 349 uint32_t reserved_bc; 350 uint32_t reserved_c0; 351 uint32_t reserved_c4; 352 uint32_t reserved_c8; 353 uint32_t reserved_cc; 354 uint32_t reserved_d0; 355 uint32_t reserved_d4; 356 uint32_t reserved_d8; 357 uint32_t reserved_dc; 358 uint32_t reserved_e0; 359 uint32_t reserved_e4; 360 uint32_t reserved_e8; 361 uint32_t reserved_ec; 362 uint32_t reserved_f0; 363 uint32_t reserved_f4; 364 uint32_t date; 365 uint32_t reserved_fc; 366 uint32_t txfifo_start_addr; 367 uint32_t reserved_104; 368 uint32_t reserved_108; 369 uint32_t reserved_10c; 370 uint32_t reserved_110; 371 uint32_t reserved_114; 372 uint32_t reserved_118; 373 uint32_t reserved_11c; 374 uint32_t reserved_120; 375 uint32_t reserved_124; 376 uint32_t reserved_128; 377 uint32_t reserved_12c; 378 uint32_t reserved_130; 379 uint32_t reserved_134; 380 uint32_t reserved_138; 381 uint32_t reserved_13c; 382 uint32_t reserved_140; 383 uint32_t reserved_144; 384 uint32_t reserved_148; 385 uint32_t reserved_14c; 386 uint32_t reserved_150; 387 uint32_t reserved_154; 388 uint32_t reserved_158; 389 uint32_t reserved_15c; 390 uint32_t reserved_160; 391 uint32_t reserved_164; 392 uint32_t reserved_168; 393 uint32_t reserved_16c; 394 uint32_t reserved_170; 395 uint32_t reserved_174; 396 uint32_t reserved_178; 397 uint32_t reserved_17c; 398 uint32_t rxfifo_start_addr; 399 } i2c_dev_t; 400 extern i2c_dev_t I2C0; 401 #ifdef __cplusplus 402 } 403 #endif 404 405 406 407 #endif /*_SOC_I2C_STRUCT_H_ */ 408
