1 /*
2  * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 // The HAL layer for RTC CNTL (common part)
8 
9 #include "hal/rtc_hal.h"
10 #include "soc/soc_caps.h"
11 #include "esp32s3/rom/lldesc.h"
12 #include "esp32s3/rom/cache.h"
13 #include "hal/dma_types.h"
14 #include "hal/assert.h"
15 #include "esp_attr.h"
16 
17 #define RTC_CNTL_HAL_LINK_BUF_SIZE_MIN  (SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE) /* The minimum size of dma link buffer */
18 
19 typedef struct rtc_cntl_link_buf_conf {
20     uint32_t cfg[4];    /* 4 word for dma link buffer configuration */
21 } rtc_cntl_link_buf_conf_t;
22 
rtc_cntl_hal_dma_link_init(void * elem,void * buff,int size,void * next)23 void * rtc_cntl_hal_dma_link_init(void *elem, void *buff, int size, void *next)
24 {
25     HAL_ASSERT(elem != NULL);
26     HAL_ASSERT(buff != NULL);
27     HAL_ASSERT(size >= RTC_CNTL_HAL_LINK_BUF_SIZE_MIN);
28 
29     lldesc_t *plink = (lldesc_t *)elem;
30 
31     plink->eof    = next ? 0 : 1;
32     plink->owner  = DMA_DESCRIPTOR_BUFFER_OWNER_DMA;
33     plink->size   = size >> 4;  /* in unit of 16 bytes */
34     plink->length = size >> 4;
35     plink->buf    = buff;
36     plink->offset = 0;
37     plink->sosf   = 0;
38     STAILQ_NEXT(plink, qe) = next;
39     return (void *)plink;
40 }
41 
42 #if SOC_PM_SUPPORT_CPU_PD
43 
44 #define DEFAULT_RETENTION_WAIT_CYCLES          (0x7f)
45 #define DEFAULT_RETENTION_CLKOFF_WAIT_CYCLES   (0xf)
46 #define DEFAULT_RETENTION_DONE_WAIT_CYCLES     (0x7)
47 
rtc_cntl_hal_enable_cpu_retention(void * addr)48 void rtc_cntl_hal_enable_cpu_retention(void *addr)
49 {
50     rtc_cntl_sleep_retent_t *retent = (rtc_cntl_sleep_retent_t *)addr;
51 
52     if (addr) {
53         if (retent->cpu_pd_mem) {
54             lldesc_t *plink = (lldesc_t *)retent->cpu_pd_mem;
55 
56             /* dma link buffer configure */
57             rtc_cntl_link_buf_conf_t *pbuf = (rtc_cntl_link_buf_conf_t *)plink->buf;
58             pbuf->cfg[0] = 0;
59             pbuf->cfg[1] = 0;
60             pbuf->cfg[2] = 0;
61             pbuf->cfg[3] = 0xfffe0000;
62 
63             rtc_cntl_ll_set_cpu_retention_link_addr((uint32_t)plink);
64             rtc_cntl_ll_config_cpu_retention_timing(
65                     DEFAULT_RETENTION_WAIT_CYCLES,
66                     DEFAULT_RETENTION_CLKOFF_WAIT_CYCLES,
67                     DEFAULT_RETENTION_DONE_WAIT_CYCLES
68                 );
69             rtc_cntl_ll_enable_cpu_retention_clock();
70             rtc_cntl_ll_enable_cpu_retention();
71         }
72     }
73 }
74 
rtc_cntl_hal_disable_cpu_retention(void * addr)75 void IRAM_ATTR rtc_cntl_hal_disable_cpu_retention(void *addr)
76 {
77     rtc_cntl_sleep_retent_t *retent = (rtc_cntl_sleep_retent_t *)addr;
78 
79     if (addr) {
80         if (retent->cpu_pd_mem) {
81             /* I/d-cache tagmem retention has not been included or not
82              * been enabled, after the system wakes up, all the contents
83              * of i/d-cache need to be invalidated. */
84 #if SOC_PM_SUPPORT_TAGMEM_PD
85             if (!retent->tagmem.icache.enable) {
86                 Cache_Invalidate_ICache_All();
87             }
88             if (!retent->tagmem.dcache.enable) {
89                 Cache_Invalidate_DCache_All();
90             }
91 #else
92             Cache_Invalidate_ICache_All();
93             Cache_Invalidate_DCache_All();
94 #endif // SOC_PM_SUPPORT_TAGMEM_PD
95             rtc_cntl_ll_disable_cpu_retention();
96         }
97     }
98 }
99 
100 #endif // SOC_PM_SUPPORT_CPU_PD
101 
102 #if SOC_PM_SUPPORT_TAGMEM_PD
103 
rtc_cntl_hal_enable_tagmem_retention(void * addr)104 void rtc_cntl_hal_enable_tagmem_retention(void *addr)
105 {
106     rtc_cntl_sleep_retent_t *retent = (rtc_cntl_sleep_retent_t *)addr;
107 
108     if (addr) {
109         if (retent->tagmem.link_addr) {
110             rtc_cntl_ll_set_tagmem_retention_link_addr((uint32_t)(retent->tagmem.link_addr));
111             rtc_cntl_ll_enable_tagmem_retention();
112             if (retent->tagmem.icache.enable) {
113                 rtc_cntl_ll_enable_icache_tagmem_retention(
114                         retent->tagmem.icache.start_point,
115                         retent->tagmem.icache.vld_size,
116                         retent->tagmem.icache.size
117                     );
118             }
119             if (retent->tagmem.dcache.enable) {
120                 rtc_cntl_ll_enable_dcache_tagmem_retention(
121                         retent->tagmem.dcache.start_point,
122                         retent->tagmem.dcache.vld_size,
123                         retent->tagmem.dcache.size
124                     );
125             }
126         }
127     }
128 }
129 
rtc_cntl_hal_disable_tagmem_retention(void * addr)130 void IRAM_ATTR rtc_cntl_hal_disable_tagmem_retention(void *addr)
131 {
132     rtc_cntl_sleep_retent_t *retent = (rtc_cntl_sleep_retent_t *)addr;
133 
134     if (addr) {
135         if (retent->tagmem.link_addr) {
136             rtc_cntl_ll_disable_tagmem_retention();
137             if (retent->tagmem.icache.enable) {
138                 rtc_cntl_ll_disable_icache_tagmem_retention();
139             }
140             if (retent->tagmem.dcache.enable) {
141                 rtc_cntl_ll_disable_dcache_tagmem_retention();
142             }
143         }
144     }
145 }
146 
147 #endif // SOC_PM_SUPPORT_TAGMEM_PD
148