1menu "ESP32S3-Specific" 2 visible if IDF_TARGET_ESP32S3 3 4 choice ESP32S3_DEFAULT_CPU_FREQ_MHZ 5 prompt "CPU frequency" 6 default ESP32S3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA 7 default ESP32S3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA 8 help 9 CPU frequency to be set on application startup. 10 11 config ESP32S3_DEFAULT_CPU_FREQ_40 12 bool "40 MHz" 13 depends on IDF_ENV_FPGA 14 config ESP32S3_DEFAULT_CPU_FREQ_80 15 bool "80 MHz" 16 config ESP32S3_DEFAULT_CPU_FREQ_160 17 bool "160 MHz" 18 config ESP32S3_DEFAULT_CPU_FREQ_240 19 bool "240 MHz" 20 endchoice 21 22 config ESP32S3_DEFAULT_CPU_FREQ_MHZ 23 int 24 default 40 if ESP32S3_DEFAULT_CPU_FREQ_40 25 default 80 if ESP32S3_DEFAULT_CPU_FREQ_80 26 default 160 if ESP32S3_DEFAULT_CPU_FREQ_160 27 default 240 if ESP32S3_DEFAULT_CPU_FREQ_240 28 29 menu "Cache config" 30 31 choice ESP32S3_INSTRUCTION_CACHE_SIZE 32 prompt "Instruction cache size" 33 default ESP32S3_INSTRUCTION_CACHE_16KB 34 help 35 Instruction cache size to be set on application startup. 36 If you use 16KB instruction cache rather than 32KB instruction cache, 37 then the other 16KB will be managed by heap allocator. 38 39 config ESP32S3_INSTRUCTION_CACHE_16KB 40 bool "16KB" 41 config ESP32S3_INSTRUCTION_CACHE_32KB 42 bool "32KB" 43 endchoice 44 45 config ESP32S3_INSTRUCTION_CACHE_SIZE 46 hex 47 default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB 48 default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB 49 50 choice ESP32S3_ICACHE_ASSOCIATED_WAYS 51 prompt "Instruction cache associated ways" 52 default ESP32S3_INSTRUCTION_CACHE_8WAYS 53 help 54 Instruction cache associated ways to be set on application startup. 55 56 config ESP32S3_INSTRUCTION_CACHE_4WAYS 57 bool "4 ways" 58 config ESP32S3_INSTRUCTION_CACHE_8WAYS 59 bool "8 ways" 60 endchoice 61 62 config ESP32S3_ICACHE_ASSOCIATED_WAYS 63 int 64 default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS 65 default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS 66 67 choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE 68 prompt "Instruction cache line size" 69 default ESP32S3_INSTRUCTION_CACHE_LINE_32B 70 help 71 Instruction cache line size to be set on application startup. 72 73 config ESP32S3_INSTRUCTION_CACHE_LINE_16B 74 bool "16 Bytes" 75 depends on ESP32S3_INSTRUCTION_CACHE_16KB 76 config ESP32S3_INSTRUCTION_CACHE_LINE_32B 77 bool "32 Bytes" 78 endchoice 79 80 config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE 81 int 82 default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B 83 default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B 84 85 config ESP32S3_INSTRUCTION_CACHE_WRAP 86 bool "Enable instruction cache wrap mode" 87 default "n" 88 help 89 If enabled, instruction cache will use wrap mode to read spi flash or spi ram. 90 The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE. 91 However, it depends on complex conditions. 92 93 choice ESP32S3_DATA_CACHE_SIZE 94 prompt "Data cache size" 95 default ESP32S3_DATA_CACHE_32KB 96 help 97 Data cache size to be set on application startup. 98 If you use 32KB data cache rather than 64KB data cache, 99 the other 32KB will be added to the heap. 100 101 config ESP32S3_DATA_CACHE_16KB 102 bool "16KB" 103 config ESP32S3_DATA_CACHE_32KB 104 bool "32KB" 105 config ESP32S3_DATA_CACHE_64KB 106 bool "64KB" 107 endchoice 108 109 config ESP32S3_DATA_CACHE_SIZE 110 hex 111 # For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup 112 default 0x8000 if ESP32S3_DATA_CACHE_16KB 113 default 0x8000 if ESP32S3_DATA_CACHE_32KB 114 default 0x10000 if ESP32S3_DATA_CACHE_64KB 115 116 choice ESP32S3_DCACHE_ASSOCIATED_WAYS 117 prompt "Data cache associated ways" 118 default ESP32S3_DATA_CACHE_8WAYS 119 help 120 Data cache associated ways to be set on application startup. 121 122 config ESP32S3_DATA_CACHE_4WAYS 123 bool "4 ways" 124 config ESP32S3_DATA_CACHE_8WAYS 125 bool "8 ways" 126 endchoice 127 128 config ESP32S3_DCACHE_ASSOCIATED_WAYS 129 int 130 default 4 if ESP32S3_DATA_CACHE_4WAYS 131 default 8 if ESP32S3_DATA_CACHE_8WAYS 132 133 choice ESP32S3_DATA_CACHE_LINE_SIZE 134 prompt "Data cache line size" 135 default ESP32S3_DATA_CACHE_LINE_32B 136 help 137 Data cache line size to be set on application startup. 138 139 config ESP32S3_DATA_CACHE_LINE_16B 140 bool "16 Bytes" 141 depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB 142 config ESP32S3_DATA_CACHE_LINE_32B 143 bool "32 Bytes" 144 config ESP32S3_DATA_CACHE_LINE_64B 145 bool "64 Bytes" 146 endchoice 147 148 config ESP32S3_DATA_CACHE_LINE_SIZE 149 int 150 default 16 if ESP32S3_DATA_CACHE_LINE_16B 151 default 32 if ESP32S3_DATA_CACHE_LINE_32B 152 default 64 if ESP32S3_DATA_CACHE_LINE_64B 153 154 config ESP32S3_DATA_CACHE_WRAP 155 bool "Enable data cache wrap mode" 156 default "n" 157 help 158 If enabled, data cache will use wrap mode to read spi flash or spi ram. 159 The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE. 160 However, it depends on complex conditions. 161 162 endmenu # Cache config 163 164 # Hint: to support SPIRAM across multiple chips, check CONFIG_SPIRAM instead 165 config ESP32S3_SPIRAM_SUPPORT 166 bool "Support for external, SPI-connected RAM" 167 default "n" 168 select SPIRAM 169 help 170 This enables support for an external SPI RAM chip, connected in parallel with the 171 main SPI flash chip. 172 173 menu "SPI RAM config" 174 depends on ESP32S3_SPIRAM_SUPPORT 175 176 choice SPIRAM_MODE 177 prompt "Mode (QUAD/OCT) of SPI RAM chip in use" 178 default SPIRAM_MODE_QUAD 179 180 config SPIRAM_MODE_QUAD 181 bool "Quad Mode PSRAM" 182 183 config SPIRAM_MODE_OCT 184 bool "Octal Mode PSRAM" 185 endchoice 186 187 choice SPIRAM_TYPE 188 prompt "Type of SPIRAM chip in use" 189 default SPIRAM_TYPE_AUTO 190 191 config SPIRAM_TYPE_AUTO 192 bool "Auto-detect" 193 194 config SPIRAM_TYPE_ESPPSRAM16 195 bool "ESP-PSRAM16 or APS1604" 196 depends on SPIRAM_MODE_QUAD 197 198 config SPIRAM_TYPE_ESPPSRAM32 199 bool "ESP-PSRAM32 or IS25WP032" 200 depends on SPIRAM_MODE_QUAD 201 202 config SPIRAM_TYPE_ESPPSRAM64 203 bool "ESP-PSRAM64 , LY68L6400 or APS6408" 204 endchoice 205 206 config SPIRAM_SIZE 207 int 208 default -1 if SPIRAM_TYPE_AUTO 209 default 2097152 if SPIRAM_TYPE_ESPPSRAM16 210 default 4194304 if SPIRAM_TYPE_ESPPSRAM32 211 default 8388608 if SPIRAM_TYPE_ESPPSRAM64 212 default 16777216 if SPIRAM_TYPE_ESPPSRAM128 213 default 33554432 if SPIRAM_TYPE_ESPPSRAM256 214 default 0 215 216 menu "PSRAM Clock and CS IO for ESP32S3" 217 depends on ESP32S3_SPIRAM_SUPPORT 218 config DEFAULT_PSRAM_CLK_IO 219 int "PSRAM CLK IO number" 220 range 0 33 221 default 30 222 help 223 The PSRAM Clock IO can be any unused GPIO, please refer to your hardware design. 224 225 config DEFAULT_PSRAM_CS_IO 226 int "PSRAM CS IO number" 227 range 0 33 228 default 26 229 help 230 The PSRAM CS IO can be any unused GPIO, please refer to your hardware design. 231 endmenu 232 config SPIRAM_FETCH_INSTRUCTIONS 233 bool "Cache fetch instructions from SPI RAM" 234 default n 235 help 236 If enabled, instruction in flash will be copied into SPIRAM. 237 If SPIRAM_RODATA also enabled, you can run the instruction when erasing or programming the flash. 238 239 config SPIRAM_RODATA 240 bool "Cache load read only data from SPI RAM" 241 default n 242 help 243 If enabled, rodata in flash will be copied into SPIRAM. 244 If SPIRAM_FETCH_INSTRUCTIONS is also enabled, 245 you can run the instruction when erasing or programming the flash. 246 247 choice SPIRAM_SPEED 248 prompt "Set RAM clock speed" 249 default SPIRAM_SPEED_40M 250 help 251 Select the speed for the SPI RAM chip. 252 253 config SPIRAM_SPEED_120M 254 depends on SPIRAM_MODE_QUAD 255 bool "120MHz clock speed" 256 config SPIRAM_SPEED_80M 257 bool "80MHz clock speed" 258 config SPIRAM_SPEED_40M 259 bool "40Mhz clock speed" 260 endchoice 261 262 # insert non-chip-specific items here 263 source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" 264 265 endmenu 266 267 config ESP32S3_MEMMAP_TRACEMEM 268 bool 269 default "n" 270 271 config ESP32S3_MEMMAP_TRACEMEM_TWOBANKS 272 bool 273 default "n" 274 275 config ESP32S3_TRAX 276 bool "Use TRAX tracing feature" 277 default "n" 278 select ESP32S3_MEMMAP_TRACEMEM 279 help 280 The esp32-s3 contains a feature which allows you to trace the execution path the processor 281 has taken through the program. This is stored in a chunk of 32K (16K for single-processor) 282 of memory that can't be used for general purposes anymore. Disable this if you do not know 283 what this is. 284 285 config ESP32S3_TRAX_TWOBANKS 286 bool "Reserve memory for tracing both pro as well as app cpu execution" 287 default "n" 288 depends on ESP32S3_TRAX && !FREERTOS_UNICORE 289 select ESP32S3_MEMMAP_TRACEMEM_TWOBANKS 290 help 291 The esp32-s3 contains a feature which allows you to trace the execution path the processor 292 has taken through the program. This is stored in a chunk of 32K (16K for single-processor) 293 of memory that can't be used for general purposes anymore. Disable this if you do not know 294 what this is. 295 296 config ESP32S3_TRACEMEM_RESERVE_DRAM 297 hex 298 default 0x8000 if ESP32S3_MEMMAP_TRACEMEM && ESP32S3_MEMMAP_TRACEMEM_TWOBANKS 299 default 0x4000 if ESP32S3_MEMMAP_TRACEMEM && !ESP32S3_MEMMAP_TRACEMEM_TWOBANKS 300 default 0x0 301 302 303 config ESP32S3_ULP_COPROC_ENABLED 304 bool "Enable Ultra Low Power (ULP) Coprocessor" 305 default "n" 306 help 307 Set to 'y' if you plan to load a firmware for the coprocessor. 308 309 If this option is enabled, further coprocessor configuration will appear in the Components menu. 310 311 config ESP32S3_ULP_COPROC_RESERVE_MEM 312 int 313 prompt "RTC slow memory reserved for coprocessor" if ESP32S3_ULP_COPROC_ENABLED 314 default 512 if ESP32S3_ULP_COPROC_ENABLED 315 range 32 8176 if ESP32S3_ULP_COPROC_ENABLED 316 default 0 if !ESP32S3_ULP_COPROC_ENABLED 317 range 0 0 if !ESP32S3_ULP_COPROC_ENABLED 318 help 319 Bytes of memory to reserve for ULP coprocessor firmware & data. 320 321 Data is reserved at the beginning of RTC slow memory. 322 323 config ESP32S3_DEBUG_OCDAWARE 324 bool "Make exception and panic handlers JTAG/OCD aware" 325 default y 326 select FREERTOS_DEBUG_OCDAWARE 327 help 328 The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and 329 instead of panicking, have the debugger stop on the offending instruction. 330 331 config ESP32S3_BROWNOUT_DET 332 bool "Hardware brownout detect & reset" 333 depends on !IDF_ENV_FPGA 334 default y 335 help 336 The ESP32-S3 has a built-in brownout detector which can detect if the voltage is lower than 337 a specific value. If this happens, it will reset the chip in order to prevent unintended 338 behaviour. 339 340 choice ESP32S3_BROWNOUT_DET_LVL_SEL 341 prompt "Brownout voltage level" 342 depends on ESP32S3_BROWNOUT_DET 343 default ESP32S3_BROWNOUT_DET_LVL_SEL_7 344 help 345 The brownout detector will reset the chip when the supply voltage is approximately 346 below this level. Note that there may be some variation of brownout voltage level 347 between each ESP3-S3 chip. 348 349 #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages 350 #of the brownout threshold levels. 351 config ESP32S3_BROWNOUT_DET_LVL_SEL_7 352 bool "2.44V" 353 config ESP32S3_BROWNOUT_DET_LVL_SEL_6 354 bool "2.56V" 355 config ESP32S3_BROWNOUT_DET_LVL_SEL_5 356 bool "2.67V" 357 config ESP32S3_BROWNOUT_DET_LVL_SEL_4 358 bool "2.84V" 359 config ESP32S3_BROWNOUT_DET_LVL_SEL_3 360 bool "2.98V" 361 config ESP32S3_BROWNOUT_DET_LVL_SEL_2 362 bool "3.19V" 363 config ESP32S3_BROWNOUT_DET_LVL_SEL_1 364 bool "3.30V" 365 endchoice 366 367 config ESP32S3_BROWNOUT_DET_LVL 368 int 369 default 1 if ESP32S3_BROWNOUT_DET_LVL_SEL_1 370 default 2 if ESP32S3_BROWNOUT_DET_LVL_SEL_2 371 default 3 if ESP32S3_BROWNOUT_DET_LVL_SEL_3 372 default 4 if ESP32S3_BROWNOUT_DET_LVL_SEL_4 373 default 5 if ESP32S3_BROWNOUT_DET_LVL_SEL_5 374 default 6 if ESP32S3_BROWNOUT_DET_LVL_SEL_6 375 default 7 if ESP32S3_BROWNOUT_DET_LVL_SEL_7 376 377 378 # Note about the use of "FRC1" name: currently FRC1 timer is not used for 379 # high resolution timekeeping anymore. Instead the esp_timer API, implemented 380 # using FRC2 timer, is used. 381 # FRC1 name in the option name is kept for compatibility. 382 choice ESP32S3_TIME_SYSCALL 383 prompt "Timers used for gettimeofday function" 384 default ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 385 help 386 This setting defines which hardware timers are used to 387 implement 'gettimeofday' and 'time' functions in C library. 388 389 - If both high-resolution and RTC timers are used, timekeeping will 390 continue in deep sleep. Time will be reported at 1 microsecond 391 resolution. This is the default, and the recommended option. 392 - If only high-resolution timer is used, gettimeofday will 393 provide time at microsecond resolution. 394 Time will not be preserved when going into deep sleep mode. 395 - If only RTC timer is used, timekeeping will continue in 396 deep sleep, but time will be measured at 6.(6) microsecond 397 resolution. Also the gettimeofday function itself may take 398 longer to run. 399 - If no timers are used, gettimeofday and time functions 400 return -1 and set errno to ENOSYS. 401 - When RTC is used for timekeeping, two RTC_STORE registers are 402 used to keep time in deep sleep mode. 403 404 config ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 405 bool "RTC and high-resolution timer" 406 select ESP_TIME_FUNCS_USE_RTC_TIMER 407 select ESP_TIME_FUNCS_USE_ESP_TIMER 408 config ESP32S3_TIME_SYSCALL_USE_RTC 409 bool "RTC" 410 select ESP_TIME_FUNCS_USE_RTC_TIMER 411 config ESP32S3_TIME_SYSCALL_USE_FRC1 412 bool "High-resolution timer" 413 select ESP_TIME_FUNCS_USE_ESP_TIMER 414 config ESP32S3_TIME_SYSCALL_USE_NONE 415 bool "None" 416 select ESP_TIME_FUNCS_USE_NONE 417 endchoice 418 419 choice ESP32S3_RTC_CLK_SRC 420 prompt "RTC clock source" 421 default ESP32S3_RTC_CLK_SRC_INT_RC 422 help 423 Choose which clock is used as RTC clock source. 424 425 config ESP32S3_RTC_CLK_SRC_INT_RC 426 bool "Internal 150kHz RC oscillator" 427 config ESP32S3_RTC_CLK_SRC_EXT_CRYS 428 bool "External 32kHz crystal" 429 select ESP_SYSTEM_RTC_EXT_XTAL 430 config ESP32S3_RTC_CLK_SRC_EXT_OSC 431 bool "External 32kHz oscillator at 32K_XP pin" 432 select ESP_SYSTEM_RTC_EXT_OSC 433 config ESP32S3_RTC_CLK_SRC_INT_8MD256 434 bool "Internal 8MHz oscillator, divided by 256 (~32kHz)" 435 endchoice 436 437 config ESP32S3_RTC_CLK_CAL_CYCLES 438 int "Number of cycles for RTC_SLOW_CLK calibration" 439 default 3000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256 440 default 1024 if ESP32S3_RTC_CLK_SRC_INT_RC 441 range 0 27000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256 442 range 0 32766 if ESP32S3_RTC_CLK_SRC_INT_RC 443 help 444 When the startup code initializes RTC_SLOW_CLK, it can perform 445 calibration by comparing the RTC_SLOW_CLK frequency with main XTAL 446 frequency. This option sets the number of RTC_SLOW_CLK cycles measured 447 by the calibration routine. Higher numbers increase calibration 448 precision, which may be important for applications which spend a lot of 449 time in deep sleep. Lower numbers reduce startup time. 450 451 When this option is set to 0, clock calibration will not be performed at 452 startup, and approximate clock frequencies will be assumed: 453 454 - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024. 455 - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more. 456 In case more value will help improve the definition of the launch of the crystal. 457 If the crystal could not start, it will be switched to internal RC. 458 459 config ESP32S3_DEEP_SLEEP_WAKEUP_DELAY 460 int "Extra delay in deep sleep wake stub (in us)" 461 default 2000 462 range 0 5000 463 help 464 When ESP32S3 exits deep sleep, the CPU and the flash chip are powered on 465 at the same time. CPU will run deep sleep stub first, and then 466 proceed to load code from flash. Some flash chips need sufficient 467 time to pass between power on and first read operation. By default, 468 without any extra delay, this time is approximately 900us, although 469 some flash chip types need more than that. 470 471 By default extra delay is set to 2000us. When optimizing startup time 472 for applications which require it, this value may be reduced. 473 474 If you are seeing "flash read err, 1000" message printed to the 475 console after deep sleep reset, try increasing this value. 476 477 config ESP32S3_NO_BLOBS 478 bool "No Binary Blobs" 479 depends on !BT_ENABLED 480 default n 481 help 482 If enabled, this disables the linking of binary libraries in the application build. Note 483 that after enabling this Wi-Fi/Bluetooth will not work. 484 485 config ESP32S3_RTCDATA_IN_FAST_MEM 486 bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment" 487 default n 488 help 489 This option allows to place .rtc_data and .rtc_rodata sections into 490 RTC fast memory segment to free the slow memory region for ULP programs. 491 492 config ESP32S3_USE_FIXED_STATIC_RAM_SIZE 493 bool "Use fixed static RAM size" 494 default n 495 help 496 If this option is disabled, the DRAM part of the heap starts right after the .bss section, 497 within the dram0_0 region. As a result, adding or removing some static variables 498 will change the available heap size. 499 500 If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region, 501 where its length is set with ESP32S3_FIXED_STATIC_RAM_SIZE 502 503 config ESP32S3_FIXED_STATIC_RAM_SIZE 504 hex "Fixed Static RAM size" 505 default 0x10000 506 range 0 0x34000 507 depends on ESP32S3_USE_FIXED_STATIC_RAM_SIZE 508 help 509 RAM size dedicated for static variables (.data & .bss sections). 510 511endmenu # ESP32S3-Specific 512
