1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include <stdlib.h>
16 #include "spi_flash_chip_generic.h"
17 #include "spi_flash_chip_issi.h"
18 #include "spi_flash_defs.h"
19
20 /* Driver for ISSI flash chip, as used in ESP32 D2WD */
21
spi_flash_chip_issi_probe(esp_flash_t * chip,uint32_t flash_id)22 esp_err_t spi_flash_chip_issi_probe(esp_flash_t *chip, uint32_t flash_id)
23 {
24 /* Check manufacturer and product IDs match our desired masks */
25 const uint8_t MFG_ID = 0x9D;
26 if (flash_id >> 16 != MFG_ID) {
27 return ESP_ERR_NOT_FOUND;
28 }
29
30 const uint16_t FLASH_ID_MASK = 0xCF00;
31 const uint16_t FLASH_ID_VALUE = 0x4000;
32 if ((flash_id & FLASH_ID_MASK) != FLASH_ID_VALUE) {
33 return ESP_ERR_NOT_FOUND;
34 }
35
36 return ESP_OK;
37 }
38
spi_flash_chip_issi_set_io_mode(esp_flash_t * chip)39 esp_err_t spi_flash_chip_issi_set_io_mode(esp_flash_t *chip)
40 {
41 /* ISSI uses bit 6 of "basic" SR as Quad Enable */
42 const uint8_t BIT_QE = 1 << 6;
43 return spi_flash_common_set_io_mode(chip,
44 spi_flash_common_write_status_8b_wrsr,
45 spi_flash_common_read_status_8b_rdsr,
46 BIT_QE);
47 }
48
spi_flash_chip_issi_get_io_mode(esp_flash_t * chip,esp_flash_io_mode_t * out_io_mode)49 esp_err_t spi_flash_chip_issi_get_io_mode(esp_flash_t *chip, esp_flash_io_mode_t* out_io_mode)
50 {
51 /* ISSI uses bit 6 of "basic" SR as Quad Enable */
52 const uint8_t BIT_QE = 1 << 6;
53 uint32_t sr;
54 esp_err_t ret = spi_flash_common_read_status_8b_rdsr(chip, &sr);
55 if (ret == ESP_OK) {
56 *out_io_mode = ((sr & BIT_QE)? SPI_FLASH_QOUT: 0);
57 }
58 return ret;
59 }
60
61 static const char chip_name[] = "issi";
62
63 // The issi chip can use the functions for generic chips except from set read mode and probe,
64 // So we only replace these two functions.
65 const spi_flash_chip_t esp_flash_chip_issi = {
66 .name = chip_name,
67 .timeout = &spi_flash_chip_generic_timeout,
68 .probe = spi_flash_chip_issi_probe,
69 .reset = spi_flash_chip_generic_reset,
70 .detect_size = spi_flash_chip_generic_detect_size,
71 .erase_chip = spi_flash_chip_generic_erase_chip,
72 .erase_sector = spi_flash_chip_generic_erase_sector,
73 .erase_block = spi_flash_chip_generic_erase_block,
74 .sector_size = 4 * 1024,
75 .block_erase_size = 64 * 1024,
76
77 .get_chip_write_protect = spi_flash_chip_generic_get_write_protect,
78 .set_chip_write_protect = spi_flash_chip_generic_set_write_protect,
79
80 .num_protectable_regions = 0,
81 .protectable_regions = NULL,
82 .get_protected_regions = NULL,
83 .set_protected_regions = NULL,
84
85 .read = spi_flash_chip_generic_read,
86 .write = spi_flash_chip_generic_write,
87 .program_page = spi_flash_chip_generic_page_program,
88 .page_size = 256,
89 .write_encrypted = spi_flash_chip_generic_write_encrypted,
90
91 .wait_idle = spi_flash_chip_generic_wait_idle,
92 .set_io_mode = spi_flash_chip_issi_set_io_mode,
93 .get_io_mode = spi_flash_chip_issi_get_io_mode,
94
95 .read_reg = spi_flash_chip_generic_read_reg,
96 .yield = spi_flash_chip_generic_yield,
97 .sus_setup = spi_flash_chip_generic_suspend_cmd_conf,
98 };
99
