1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #include "hal/i2c_hal.h"
16 
i2c_hal_txfifo_rst(i2c_hal_context_t * hal)17 void i2c_hal_txfifo_rst(i2c_hal_context_t *hal)
18 {
19     i2c_ll_txfifo_rst(hal->dev);
20 }
21 
i2c_hal_rxfifo_rst(i2c_hal_context_t * hal)22 void i2c_hal_rxfifo_rst(i2c_hal_context_t *hal)
23 {
24     i2c_ll_rxfifo_rst(hal->dev);
25 }
26 
i2c_hal_set_data_mode(i2c_hal_context_t * hal,i2c_trans_mode_t tx_mode,i2c_trans_mode_t rx_mode)27 void i2c_hal_set_data_mode(i2c_hal_context_t *hal, i2c_trans_mode_t tx_mode, i2c_trans_mode_t rx_mode)
28 {
29     i2c_ll_set_data_mode(hal->dev, tx_mode, rx_mode);
30 }
31 
i2c_hal_get_data_mode(i2c_hal_context_t * hal,i2c_trans_mode_t * tx_mode,i2c_trans_mode_t * rx_mode)32 void i2c_hal_get_data_mode(i2c_hal_context_t *hal, i2c_trans_mode_t *tx_mode, i2c_trans_mode_t *rx_mode)
33 {
34     i2c_ll_get_data_mode(hal->dev, tx_mode, rx_mode);
35 }
36 
i2c_hal_set_filter(i2c_hal_context_t * hal,uint8_t filter_num)37 void i2c_hal_set_filter(i2c_hal_context_t *hal, uint8_t filter_num)
38 {
39     i2c_ll_set_filter(hal->dev, filter_num);
40 }
41 
i2c_hal_get_filter(i2c_hal_context_t * hal,uint8_t * filter_num)42 void i2c_hal_get_filter(i2c_hal_context_t *hal, uint8_t *filter_num)
43 {
44     *filter_num = i2c_ll_get_filter(hal->dev);
45 }
46 
i2c_hal_set_scl_timing(i2c_hal_context_t * hal,int hight_period,int low_period)47 void i2c_hal_set_scl_timing(i2c_hal_context_t *hal, int hight_period, int low_period)
48 {
49     i2c_ll_set_scl_timing(hal->dev, hight_period, low_period);
50 }
51 
i2c_hal_clr_intsts_mask(i2c_hal_context_t * hal,uint32_t mask)52 void i2c_hal_clr_intsts_mask(i2c_hal_context_t *hal, uint32_t mask)
53 {
54     i2c_ll_clr_intsts_mask(hal->dev, mask);
55 }
56 
i2c_hal_enable_intr_mask(i2c_hal_context_t * hal,uint32_t mask)57 void i2c_hal_enable_intr_mask(i2c_hal_context_t *hal, uint32_t mask)
58 {
59     i2c_ll_enable_intr_mask(hal->dev, mask);
60 }
61 
i2c_hal_disable_intr_mask(i2c_hal_context_t * hal,uint32_t mask)62 void i2c_hal_disable_intr_mask(i2c_hal_context_t *hal, uint32_t mask)
63 {
64     i2c_ll_disable_intr_mask(hal->dev, mask);
65 }
66 
i2c_hal_get_intsts_mask(i2c_hal_context_t * hal,uint32_t * mask)67 void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask)
68 {
69     *mask = i2c_ll_get_intsts_mask(hal->dev);
70 }
71 
i2c_hal_set_fifo_mode(i2c_hal_context_t * hal,bool fifo_mode_en)72 void i2c_hal_set_fifo_mode(i2c_hal_context_t *hal, bool fifo_mode_en)
73 {
74     i2c_ll_set_fifo_mode(hal->dev, fifo_mode_en);
75 }
76 
i2c_hal_set_tout(i2c_hal_context_t * hal,int tout_num)77 void i2c_hal_set_tout(i2c_hal_context_t *hal, int tout_num)
78 {
79     i2c_ll_set_tout(hal->dev, tout_num);
80 }
81 
i2c_hal_set_slave_addr(i2c_hal_context_t * hal,uint16_t slave_addr,bool addr_10bit_en)82 void i2c_hal_set_slave_addr(i2c_hal_context_t *hal, uint16_t slave_addr, bool addr_10bit_en)
83 {
84     i2c_ll_set_slave_addr(hal->dev, slave_addr, addr_10bit_en);
85 }
86 
i2c_hal_set_stop_timing(i2c_hal_context_t * hal,int stop_setup,int stop_hold)87 void i2c_hal_set_stop_timing(i2c_hal_context_t *hal, int stop_setup, int stop_hold)
88 {
89     i2c_ll_set_stop_timing(hal->dev, stop_setup, stop_hold);
90 }
91 
i2c_hal_set_start_timing(i2c_hal_context_t * hal,int start_setup,int start_hold)92 void i2c_hal_set_start_timing(i2c_hal_context_t *hal, int start_setup, int start_hold)
93 {
94     i2c_ll_set_start_timing(hal->dev, start_setup, start_hold);
95 }
96 
i2c_hal_set_sda_timing(i2c_hal_context_t * hal,int sda_sample,int sda_hold)97 void i2c_hal_set_sda_timing(i2c_hal_context_t *hal, int sda_sample, int sda_hold)
98 {
99     i2c_ll_set_sda_timing(hal->dev, sda_sample, sda_hold);
100 }
101 
i2c_hal_set_txfifo_empty_thr(i2c_hal_context_t * hal,uint8_t empty_thr)102 void i2c_hal_set_txfifo_empty_thr(i2c_hal_context_t *hal, uint8_t empty_thr)
103 {
104     i2c_ll_set_txfifo_empty_thr(hal->dev, empty_thr);
105 }
106 
i2c_hal_set_rxfifo_full_thr(i2c_hal_context_t * hal,uint8_t full_thr)107 void i2c_hal_set_rxfifo_full_thr(i2c_hal_context_t *hal, uint8_t full_thr)
108 {
109     i2c_ll_set_rxfifo_full_thr(hal->dev, full_thr);
110 }
111 
i2c_hal_is_bus_busy(i2c_hal_context_t * hal)112 bool i2c_hal_is_bus_busy(i2c_hal_context_t *hal)
113 {
114     return i2c_ll_is_bus_busy(hal->dev);
115 }
116 
i2c_hal_get_sda_timing(i2c_hal_context_t * hal,int * sample_time,int * hold_time)117 void i2c_hal_get_sda_timing(i2c_hal_context_t *hal, int *sample_time, int *hold_time)
118 {
119     i2c_ll_get_sda_timing(hal->dev, sample_time, hold_time);
120 }
121 
i2c_hal_get_tout(i2c_hal_context_t * hal,int * tout_val)122 void i2c_hal_get_tout(i2c_hal_context_t *hal, int *tout_val)
123 {
124     *tout_val = i2c_ll_get_tout(hal->dev);
125 }
126 
i2c_hal_get_start_timing(i2c_hal_context_t * hal,int * setup_time,int * hold_time)127 void i2c_hal_get_start_timing(i2c_hal_context_t *hal, int *setup_time, int *hold_time)
128 {
129     i2c_ll_get_start_timing(hal->dev, setup_time, hold_time);
130 }
131 
i2c_hal_get_stop_timing(i2c_hal_context_t * hal,int * setup_time,int * hold_time)132 void i2c_hal_get_stop_timing(i2c_hal_context_t *hal, int *setup_time, int *hold_time)
133 {
134     i2c_ll_get_stop_timing(hal->dev, setup_time, hold_time);
135 }
136 
i2c_hal_get_scl_timing(i2c_hal_context_t * hal,int * high_period,int * low_period)137 void i2c_hal_get_scl_timing(i2c_hal_context_t *hal, int *high_period, int *low_period)
138 {
139     i2c_ll_get_scl_timing(hal->dev, high_period, low_period);
140 }
141 
i2c_hal_is_master_mode(i2c_hal_context_t * hal)142 bool i2c_hal_is_master_mode(i2c_hal_context_t *hal)
143 {
144     return i2c_ll_is_master_mode(hal->dev);
145 }
146 
i2c_hal_get_rxfifo_cnt(i2c_hal_context_t * hal,uint32_t * len)147 void i2c_hal_get_rxfifo_cnt(i2c_hal_context_t *hal, uint32_t *len)
148 {
149     *len =  i2c_ll_get_rxfifo_cnt(hal->dev);
150 }
151 
i2c_hal_get_txfifo_cnt(i2c_hal_context_t * hal,uint32_t * len)152 void i2c_hal_get_txfifo_cnt(i2c_hal_context_t *hal, uint32_t *len)
153 {
154     *len =  i2c_ll_get_txfifo_len(hal->dev);
155 }
156 
i2c_hal_enable_slave_tx_it(i2c_hal_context_t * hal)157 void i2c_hal_enable_slave_tx_it(i2c_hal_context_t *hal)
158 {
159     i2c_ll_slave_enable_tx_it(hal->dev);
160 }
161 
i2c_hal_disable_slave_tx_it(i2c_hal_context_t * hal)162 void i2c_hal_disable_slave_tx_it(i2c_hal_context_t *hal)
163 {
164     i2c_ll_slave_disable_tx_it(hal->dev);
165 }
166 
i2c_hal_enable_slave_rx_it(i2c_hal_context_t * hal)167 void i2c_hal_enable_slave_rx_it(i2c_hal_context_t *hal)
168 {
169     i2c_ll_slave_enable_rx_it(hal->dev);
170 }
171 
i2c_hal_disable_slave_rx_it(i2c_hal_context_t * hal)172 void i2c_hal_disable_slave_rx_it(i2c_hal_context_t *hal)
173 {
174     i2c_ll_slave_disable_rx_it(hal->dev);
175 }
176 
i2c_hal_set_bus_timing(i2c_hal_context_t * hal,int scl_freq,i2c_sclk_t src_clk)177 void i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_sclk_t src_clk)
178 {
179     i2c_ll_set_source_clk(hal->dev, src_clk);
180     uint32_t sclk = I2C_LL_CLK_SRC_FREQ(src_clk);
181     i2c_clk_cal_t clk_cal = {0};
182     uint32_t scl_hw_freq = (scl_freq == I2C_CLK_FREQ_MAX) ? (sclk / 20) : (uint32_t)scl_freq; // FREQ_MAX use the highest freq of the chosen clk.
183     i2c_ll_cal_bus_clk(sclk, scl_hw_freq, &clk_cal);
184     i2c_ll_set_bus_timing(hal->dev, &clk_cal);
185 }
186 
i2c_hal_slave_init(i2c_hal_context_t * hal,int i2c_num)187 void i2c_hal_slave_init(i2c_hal_context_t *hal, int i2c_num)
188 {
189     i2c_ll_slave_init(hal->dev);
190     //Use fifo mode
191     i2c_ll_set_fifo_mode(hal->dev, true);
192     //MSB
193     i2c_ll_set_data_mode(hal->dev, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST);
194     //Reset fifo
195     i2c_ll_txfifo_rst(hal->dev);
196     i2c_ll_rxfifo_rst(hal->dev);
197 }
198 
i2c_hal_master_clr_bus(i2c_hal_context_t * hal)199 void i2c_hal_master_clr_bus(i2c_hal_context_t *hal)
200 {
201     i2c_ll_master_clr_bus(hal->dev);
202 }
203 
i2c_hal_master_fsm_rst(i2c_hal_context_t * hal)204 void i2c_hal_master_fsm_rst(i2c_hal_context_t *hal)
205 {
206     i2c_ll_master_fsm_rst(hal->dev);
207 }
208 
i2c_hal_master_init(i2c_hal_context_t * hal,int i2c_num)209 void i2c_hal_master_init(i2c_hal_context_t *hal, int i2c_num)
210 {
211     hal->version = i2c_ll_get_hw_version(hal->dev);
212     i2c_ll_master_init(hal->dev);
213     //Use fifo mode
214     i2c_ll_set_fifo_mode(hal->dev, true);
215     //MSB
216     i2c_ll_set_data_mode(hal->dev, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST);
217     //Reset fifo
218     i2c_ll_txfifo_rst(hal->dev);
219     i2c_ll_rxfifo_rst(hal->dev);
220 }
221 
i2c_hal_update_config(i2c_hal_context_t * hal)222 void i2c_hal_update_config(i2c_hal_context_t *hal)
223 {
224     i2c_ll_update(hal->dev);
225 }
226