1menu "ESP32C3-Specific"
2    visible if IDF_TARGET_ESP32C3
3
4    choice ESP32C3_DEFAULT_CPU_FREQ_MHZ
5        prompt "CPU frequency"
6        default ESP32C3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
7        default ESP32C3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
8        help
9            CPU frequency to be set on application startup.
10
11        config ESP32C3_DEFAULT_CPU_FREQ_40
12            bool "40 MHz"
13            depends on IDF_ENV_FPGA
14        config ESP32C3_DEFAULT_CPU_FREQ_80
15            bool "80 MHz"
16        config ESP32C3_DEFAULT_CPU_FREQ_160
17            bool "160 MHz"
18    endchoice
19
20    config ESP32C3_DEFAULT_CPU_FREQ_MHZ
21        int
22        default 40 if ESP32C3_DEFAULT_CPU_FREQ_40
23        default 80 if ESP32C3_DEFAULT_CPU_FREQ_80
24        default 160 if ESP32C3_DEFAULT_CPU_FREQ_160
25
26    choice ESP32C3_REV_MIN
27        prompt "Minimum Supported ESP32-C3 Revision"
28        default ESP32C3_REV_MIN_3
29        help
30            Minimum revision that ESP-IDF would support.
31
32            Only supporting higher chip revisions can reduce binary size.
33
34        config ESP32C3_REV_MIN_0
35            bool "Rev 0"
36        config ESP32C3_REV_MIN_1
37            bool "Rev 1"
38        config ESP32C3_REV_MIN_2
39            bool "Rev 2"
40        config ESP32C3_REV_MIN_3
41            bool "Rev 3"
42    endchoice
43
44    config ESP32C3_REV_MIN
45        int
46        default 0 if ESP32C3_REV_MIN_0
47        default 1 if ESP32C3_REV_MIN_1
48        default 2 if ESP32C3_REV_MIN_2
49        default 3 if ESP32C3_REV_MIN_3
50
51    choice ESP32C3_UNIVERSAL_MAC_ADDRESSES
52        bool "Number of universally administered (by IEEE) MAC address"
53        default ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
54        help
55            Configure the number of universally administered (by IEEE) MAC addresses.
56            During initialization, MAC addresses for each network interface are generated or derived from a
57            single base MAC address.
58            If the number of universal MAC addresses is Two, all interfaces (WiFi station, WiFi softap) receive a
59            universally administered MAC address. They are generated sequentially by adding 0, and 1 (respectively)
60            to the final octet of the base MAC address. If the number of universal MAC addresses is one,
61            only WiFi station receives a universally administered MAC address.
62            It's generated by adding 0 to the base MAC address.
63            The WiFi softap receives local MAC addresses. It's derived from the universal WiFi station MAC addresses.
64            When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
65            a custom universal MAC address range, the correct setting will depend on the allocation of MAC
66            addresses in this range (either 1 or 2 per device.)
67
68        config ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
69            bool "Two"
70            select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
71            select ESP_MAC_ADDR_UNIVERSE_BT
72        config ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
73            bool "Four"
74            select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
75            select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
76            select ESP_MAC_ADDR_UNIVERSE_BT
77            select ESP_MAC_ADDR_UNIVERSE_ETH
78    endchoice
79
80    config ESP32C3_UNIVERSAL_MAC_ADDRESSES
81        int
82        default 2 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
83        default 4 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
84
85    config ESP_MAC_ADDR_UNIVERSE_BT_OFFSET
86        int
87        default 2 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
88        default 1 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
89
90    config ESP32C3_DEBUG_OCDAWARE
91        bool "Make exception and panic handlers JTAG/OCD aware"
92        default y
93        select FREERTOS_DEBUG_OCDAWARE
94        help
95            The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
96            instead of panicking, have the debugger stop on the offending instruction.
97
98    config ESP32C3_DEBUG_STUBS_ENABLE
99        bool "OpenOCD debug stubs"
100        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
101        depends on !ESP32C3_TRAX
102        help
103            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
104            e.g. GCOV data dump.
105
106    config ESP32C3_BROWNOUT_DET
107        bool "Hardware brownout detect & reset"
108        default y
109        help
110            The ESP32-C3 has a built-in brownout detector which can detect if the voltage is lower than
111            a specific value. If this happens, it will reset the chip in order to prevent unintended
112            behaviour.
113
114    choice ESP32C3_BROWNOUT_DET_LVL_SEL
115        prompt "Brownout voltage level"
116        depends on ESP32C3_BROWNOUT_DET
117        default ESP32C3_BROWNOUT_DET_LVL_SEL_7
118        help
119            The brownout detector will reset the chip when the supply voltage is approximately
120            below this level. Note that there may be some variation of brownout voltage level
121            between each chip.
122
123            #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
124            #of the brownout threshold levels.
125        config ESP32C3_BROWNOUT_DET_LVL_SEL_7
126            bool "2.51V"
127        config ESP32C3_BROWNOUT_DET_LVL_SEL_6
128            bool "2.64V"
129        config ESP32C3_BROWNOUT_DET_LVL_SEL_5
130            bool "2.76V"
131        config ESP32C3_BROWNOUT_DET_LVL_SEL_4
132            bool "2.92V"
133        config ESP32C3_BROWNOUT_DET_LVL_SEL_3
134            bool "3.10V"
135        config ESP32C3_BROWNOUT_DET_LVL_SEL_2
136            bool "3.27V"
137    endchoice
138
139    config ESP32C3_BROWNOUT_DET_LVL
140        int
141        default 2 if ESP32C3_BROWNOUT_DET_LVL_SEL_2
142        default 3 if ESP32C3_BROWNOUT_DET_LVL_SEL_3
143        default 4 if ESP32C3_BROWNOUT_DET_LVL_SEL_4
144        default 5 if ESP32C3_BROWNOUT_DET_LVL_SEL_5
145        default 6 if ESP32C3_BROWNOUT_DET_LVL_SEL_6
146        default 7 if ESP32C3_BROWNOUT_DET_LVL_SEL_7
147
148    choice ESP32C3_TIME_SYSCALL
149        prompt "Timers used for gettimeofday function"
150        default ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
151        help
152            This setting defines which hardware timers are used to
153            implement 'gettimeofday' and 'time' functions in C library.
154
155            - If both high-resolution (systimer) and RTC timers are used, timekeeping will
156              continue in deep sleep. Time will be reported at 1 microsecond
157              resolution. This is the default, and the recommended option.
158            - If only high-resolution timer (systimer) is used, gettimeofday will
159              provide time at microsecond resolution.
160              Time will not be preserved when going into deep sleep mode.
161            - If only RTC timer is used, timekeeping will continue in
162              deep sleep, but time will be measured at 6.(6) microsecond
163              resolution. Also the gettimeofday function itself may take
164              longer to run.
165            - If no timers are used, gettimeofday and time functions
166              return -1 and set errno to ENOSYS.
167            - When RTC is used for timekeeping, two RTC_STORE registers are
168              used to keep time in deep sleep mode.
169
170        config ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
171            bool "RTC and high-resolution timer"
172            select ESP_TIME_FUNCS_USE_RTC_TIMER
173            select ESP_TIME_FUNCS_USE_ESP_TIMER
174        config ESP32C3_TIME_SYSCALL_USE_RTC
175            bool "RTC"
176            select ESP_TIME_FUNCS_USE_RTC_TIMER
177        config ESP32C3_TIME_SYSCALL_USE_SYSTIMER
178            bool "High-resolution timer"
179            select ESP_TIME_FUNCS_USE_ESP_TIMER
180        config ESP32C3_TIME_SYSCALL_USE_NONE
181            bool "None"
182            select ESP_TIME_FUNCS_USE_NONE
183    endchoice
184
185    choice ESP32C3_RTC_CLK_SRC
186        prompt "RTC clock source"
187        default ESP32C3_RTC_CLK_SRC_INT_RC
188        help
189            Choose which clock is used as RTC clock source.
190
191        config ESP32C3_RTC_CLK_SRC_INT_RC
192            bool "Internal 150kHz RC oscillator"
193        config ESP32C3_RTC_CLK_SRC_EXT_CRYS
194            bool "External 32kHz crystal"
195            select ESP_SYSTEM_RTC_EXT_XTAL
196        config ESP32C3_RTC_CLK_SRC_EXT_OSC
197            bool "External 32kHz oscillator at 32K_XP pin"
198        config ESP32C3_RTC_CLK_SRC_INT_8MD256
199            bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
200    endchoice
201
202    config ESP32C3_RTC_CLK_CAL_CYCLES
203        int "Number of cycles for RTC_SLOW_CLK calibration"
204        default 3000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
205        default 1024 if ESP32C3_RTC_CLK_SRC_INT_RC
206        range 0 125000
207        help
208            When the startup code initializes RTC_SLOW_CLK, it can perform
209            calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
210            frequency. This option sets the number of RTC_SLOW_CLK cycles measured
211            by the calibration routine. Higher numbers increase calibration
212            precision, which may be important for applications which spend a lot of
213            time in deep sleep. Lower numbers reduce startup time.
214
215            When this option is set to 0, clock calibration will not be performed at
216            startup, and approximate clock frequencies will be assumed:
217
218            - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
219            - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
220              In case more value will help improve the definition of the launch of the crystal.
221              If the crystal could not start, it will be switched to internal RC.
222
223    config ESP32C3_NO_BLOBS
224        bool "No Binary Blobs"
225        depends on !BT_ENABLED
226        default n
227        help
228            If enabled, this disables the linking of binary libraries in the application build. Note
229            that after enabling this Wi-Fi/Bluetooth will not work.
230
231    config ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND
232        bool "light sleep GPIO reset workaround"
233        default y
234        select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
235        help
236            ESP32C3 will reset at wake-up if GPIO is received a small electrostatic pulse during
237            light sleep, with specific condition
238
239            - GPIO needs to be configured as input-mode only
240            - The pin receives a small electrostatic pulse, and reset occurs when the pulse
241              voltage is higher than 6 V
242
243            For GPIO set to input mode only, it is not a good practice to leave it open/floating,
244            The hardware design needs to controlled it with determined supply or ground voltage
245            is necessary.
246
247            This option provides a software workaround for this issue. Configure to isolate all
248            GPIO pins in sleep state.
249
250endmenu  # ESP32C3-Specific
251