1 // Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 /*
16  Tests for the adc device driver on ESP32 only
17 */
18 #include "sdkconfig.h"
19 #if CONFIG_IDF_TARGET_ESP32
20 
21 #include "esp_system.h"
22 #include "driver/adc.h"
23 #include "driver/rtc_io.h"
24 #include "driver/gpio.h"
25 #include "unity.h"
26 #include "esp_system.h"
27 #include "esp_event.h"
28 #include "esp_wifi.h"
29 #include "esp_log.h"
30 #include "nvs_flash.h"
31 #include "test_utils.h"
32 #include "esp_rom_sys.h"
33 #include "driver/dac.h"
34 
35 /*
36  * ADC DMA testcase
37  */
38 #include "driver/i2s.h"
39 #include "test/test_common_adc.h"
40 
41 //i2s number
42 #define EXAMPLE_I2S_NUM           (0)
43 //i2s sample rate
44 #define EXAMPLE_I2S_SAMPLE_RATE   (150000)
45 //i2s data bits
46 #define EXAMPLE_I2S_SAMPLE_BITS   (16)
47 //enable display buffer for debug
48 #define EXAMPLE_I2S_BUF_DEBUG     (0)
49 //I2S read buffer length
50 #define EXAMPLE_I2S_READ_LEN      (16 * 1024)
51 //I2S data format, ADC-I2S only support mono.
52 #define EXAMPLE_I2S_FORMAT        I2S_CHANNEL_FMT_ONLY_RIGHT
53 //I2S built-in ADC unit
54 #define I2S_ADC_UNIT              ADC_UNIT_1
55 //I2S built-in ADC channel
56 #define I2S_ADC_CHANNEL           ADC1_CHANNEL_4
57 
58 /**
59  * @brief I2S ADC/DAC mode init.
60  */
example_i2s_init(void)61 static void example_i2s_init(void)
62 {
63     int i2s_num = EXAMPLE_I2S_NUM;
64     i2s_config_t i2s_config = {
65         .mode = I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN,
66         .sample_rate =  EXAMPLE_I2S_SAMPLE_RATE,
67         .bits_per_sample = EXAMPLE_I2S_SAMPLE_BITS,
68         .channel_format = EXAMPLE_I2S_FORMAT,
69         .intr_alloc_flags = 0,
70         .dma_buf_count = 2,
71         .dma_buf_len = 1024,
72         .use_apll = 0,
73     };
74 
75     //install and start i2s driver
76     TEST_ESP_OK( i2s_driver_install(i2s_num, &i2s_config, 0, NULL) );
77     //init ADC pad
78     TEST_ESP_OK( i2s_set_adc_mode(I2S_ADC_UNIT, I2S_ADC_CHANNEL) );
79 }
80 
example_i2s_deinit(void)81 static void example_i2s_deinit(void)
82 {
83     TEST_ESP_OK( i2s_driver_uninstall(EXAMPLE_I2S_NUM) );
84 }
85 
86 /**
87  * @brief debug buffer data
88  */
example_disp_buf(uint8_t * buf,int length)89 static void example_disp_buf(uint8_t *buf, int length)
90 {
91     printf("\n======");
92     for (int i = 0; i < length; i += 2) {
93         uint16_t data = ((uint16_t)buf[i+1] << 8) | (uint16_t)buf[i];
94         adc_digi_output_data_t *p = (adc_digi_output_data_t *)&data;
95         if ((i) % 16 == 0) printf("\n");
96         printf("[%d_%d] ", p->type1.channel, p->type1.data);
97     }
98     printf("\n======\n");
99 }
100 
adc_dma_data_check(uint8_t * buf,int length,int ideal_level)101 static esp_err_t adc_dma_data_check(uint8_t *buf, int length, int ideal_level)
102 {
103     for (int i = 0; i < length; i += 2) {
104         uint16_t data = ((uint16_t)buf[i+1] << 8) | (uint16_t)buf[i];
105         adc_digi_output_data_t *p = (adc_digi_output_data_t *)&data;
106         if (p->type1.channel != I2S_ADC_CHANNEL) {
107             TEST_FAIL_MESSAGE("I2S-DMA data channel error!");
108         }
109         if (ideal_level == 1) {         // high level 3.3v
110             TEST_ASSERT_EQUAL( 0xFFF, p->type1.data );
111         } else if (ideal_level == 0) {  // low level 0v
112             TEST_ASSERT_LESS_THAN( 10, p->type1.data );
113         } else if (ideal_level == 2) {  // middle level 1.4v
114             TEST_ASSERT_INT_WITHIN( 128, 1586, p->type1.data );
115         } else if (ideal_level == 3) {  // normal level
116         } else { // no check
117         }
118     }
119     return ESP_OK;
120 }
121 
adc_dma_read(uint8_t * buf,int length)122 static void adc_dma_read(uint8_t *buf, int length)
123 {
124     size_t bytes_read = 0;
125     int flash_wr_size = 0;
126 
127     vTaskDelay(pdTICKS_TO_MS(100));
128     while (flash_wr_size < length) {
129         //read data from I2S bus, in this case, from ADC.
130         TEST_ESP_OK( i2s_read(EXAMPLE_I2S_NUM, (void *) buf + flash_wr_size, length - flash_wr_size, &bytes_read, portMAX_DELAY) );
131         flash_wr_size += bytes_read;
132         example_disp_buf((uint8_t *) buf, 128);
133     }
134 }
135 
136 TEST_CASE("ADC DMA read", "[adc dma]")
137 {
138     int i2s_read_len = EXAMPLE_I2S_READ_LEN;
139     char *i2s_read_buff = (char *) calloc(i2s_read_len, sizeof(char));
140 
141     example_i2s_init();
142     TEST_ESP_OK( i2s_adc_enable(EXAMPLE_I2S_NUM) );
143 
144     adc_fake_tie_low(I2S_ADC_UNIT, I2S_ADC_CHANNEL);
145     adc_dma_read((uint8_t *)i2s_read_buff, i2s_read_len);
146     adc_dma_data_check((uint8_t *)i2s_read_buff, i2s_read_len, 0);
147 
148     adc_fake_tie_middle(I2S_ADC_UNIT, I2S_ADC_CHANNEL);
149     adc_dma_read((uint8_t *)i2s_read_buff, i2s_read_len);
150     adc_dma_data_check((uint8_t *)i2s_read_buff, i2s_read_len, 2);
151 
152     adc_fake_tie_high(I2S_ADC_UNIT, I2S_ADC_CHANNEL);
153     adc_dma_read((uint8_t *)i2s_read_buff, i2s_read_len);
154     adc_dma_data_check((uint8_t *)i2s_read_buff, i2s_read_len, 1);
155 
156     adc_io_normal(I2S_ADC_UNIT, I2S_ADC_CHANNEL);
157 
158     TEST_ESP_OK( i2s_adc_disable(EXAMPLE_I2S_NUM) );
159     if (i2s_read_buff) {
160         free(i2s_read_buff);
161         i2s_read_buff = NULL;
162     }
163 
164     example_i2s_deinit();
165 }
166 
167 #endif // CONFIG_IDF_TARGET_ESP32
168