1 /** 2 * \file 3 * 4 * \brief Instance description for MTB 5 * 6 * Copyright (c) 2018 Microchip Technology Inc. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); you may 15 * not use this file except in compliance with the License. 16 * You may obtain a copy of the Licence at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 * \asf_license_stop 27 * 28 */ 29 30 #ifndef _SAMR35_MTB_INSTANCE_ 31 #define _SAMR35_MTB_INSTANCE_ 32 33 /* ========== Register definition for MTB peripheral ========== */ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_MTB_POSITION (0x41006000) /**< \brief (MTB) MTB Position */ 36 #define REG_MTB_MASTER (0x41006004) /**< \brief (MTB) MTB Master */ 37 #define REG_MTB_FLOW (0x41006008) /**< \brief (MTB) MTB Flow */ 38 #define REG_MTB_BASE (0x4100600C) /**< \brief (MTB) MTB Base */ 39 #define REG_MTB_ITCTRL (0x41006F00) /**< \brief (MTB) MTB Integration Mode Control */ 40 #define REG_MTB_CLAIMSET (0x41006FA0) /**< \brief (MTB) MTB Claim Set */ 41 #define REG_MTB_CLAIMCLR (0x41006FA4) /**< \brief (MTB) MTB Claim Clear */ 42 #define REG_MTB_LOCKACCESS (0x41006FB0) /**< \brief (MTB) MTB Lock Access */ 43 #define REG_MTB_LOCKSTATUS (0x41006FB4) /**< \brief (MTB) MTB Lock Status */ 44 #define REG_MTB_AUTHSTATUS (0x41006FB8) /**< \brief (MTB) MTB Authentication Status */ 45 #define REG_MTB_DEVARCH (0x41006FBC) /**< \brief (MTB) MTB Device Architecture */ 46 #define REG_MTB_DEVID (0x41006FC8) /**< \brief (MTB) MTB Device Configuration */ 47 #define REG_MTB_DEVTYPE (0x41006FCC) /**< \brief (MTB) MTB Device Type */ 48 #define REG_MTB_PID4 (0x41006FD0) /**< \brief (MTB) Peripheral Identification 4 */ 49 #define REG_MTB_PID5 (0x41006FD4) /**< \brief (MTB) Peripheral Identification 5 */ 50 #define REG_MTB_PID6 (0x41006FD8) /**< \brief (MTB) Peripheral Identification 6 */ 51 #define REG_MTB_PID7 (0x41006FDC) /**< \brief (MTB) Peripheral Identification 7 */ 52 #define REG_MTB_PID0 (0x41006FE0) /**< \brief (MTB) Peripheral Identification 0 */ 53 #define REG_MTB_PID1 (0x41006FE4) /**< \brief (MTB) Peripheral Identification 1 */ 54 #define REG_MTB_PID2 (0x41006FE8) /**< \brief (MTB) Peripheral Identification 2 */ 55 #define REG_MTB_PID3 (0x41006FEC) /**< \brief (MTB) Peripheral Identification 3 */ 56 #define REG_MTB_CID0 (0x41006FF0) /**< \brief (MTB) Component Identification 0 */ 57 #define REG_MTB_CID1 (0x41006FF4) /**< \brief (MTB) Component Identification 1 */ 58 #define REG_MTB_CID2 (0x41006FF8) /**< \brief (MTB) Component Identification 2 */ 59 #define REG_MTB_CID3 (0x41006FFC) /**< \brief (MTB) Component Identification 3 */ 60 #else 61 #define REG_MTB_POSITION (*(RwReg *)0x41006000UL) /**< \brief (MTB) MTB Position */ 62 #define REG_MTB_MASTER (*(RwReg *)0x41006004UL) /**< \brief (MTB) MTB Master */ 63 #define REG_MTB_FLOW (*(RwReg *)0x41006008UL) /**< \brief (MTB) MTB Flow */ 64 #define REG_MTB_BASE (*(RoReg *)0x4100600CUL) /**< \brief (MTB) MTB Base */ 65 #define REG_MTB_ITCTRL (*(RwReg *)0x41006F00UL) /**< \brief (MTB) MTB Integration Mode Control */ 66 #define REG_MTB_CLAIMSET (*(RwReg *)0x41006FA0UL) /**< \brief (MTB) MTB Claim Set */ 67 #define REG_MTB_CLAIMCLR (*(RwReg *)0x41006FA4UL) /**< \brief (MTB) MTB Claim Clear */ 68 #define REG_MTB_LOCKACCESS (*(RwReg *)0x41006FB0UL) /**< \brief (MTB) MTB Lock Access */ 69 #define REG_MTB_LOCKSTATUS (*(RoReg *)0x41006FB4UL) /**< \brief (MTB) MTB Lock Status */ 70 #define REG_MTB_AUTHSTATUS (*(RoReg *)0x41006FB8UL) /**< \brief (MTB) MTB Authentication Status */ 71 #define REG_MTB_DEVARCH (*(RoReg *)0x41006FBCUL) /**< \brief (MTB) MTB Device Architecture */ 72 #define REG_MTB_DEVID (*(RoReg *)0x41006FC8UL) /**< \brief (MTB) MTB Device Configuration */ 73 #define REG_MTB_DEVTYPE (*(RoReg *)0x41006FCCUL) /**< \brief (MTB) MTB Device Type */ 74 #define REG_MTB_PID4 (*(RoReg *)0x41006FD0UL) /**< \brief (MTB) Peripheral Identification 4 */ 75 #define REG_MTB_PID5 (*(RoReg *)0x41006FD4UL) /**< \brief (MTB) Peripheral Identification 5 */ 76 #define REG_MTB_PID6 (*(RoReg *)0x41006FD8UL) /**< \brief (MTB) Peripheral Identification 6 */ 77 #define REG_MTB_PID7 (*(RoReg *)0x41006FDCUL) /**< \brief (MTB) Peripheral Identification 7 */ 78 #define REG_MTB_PID0 (*(RoReg *)0x41006FE0UL) /**< \brief (MTB) Peripheral Identification 0 */ 79 #define REG_MTB_PID1 (*(RoReg *)0x41006FE4UL) /**< \brief (MTB) Peripheral Identification 1 */ 80 #define REG_MTB_PID2 (*(RoReg *)0x41006FE8UL) /**< \brief (MTB) Peripheral Identification 2 */ 81 #define REG_MTB_PID3 (*(RoReg *)0x41006FECUL) /**< \brief (MTB) Peripheral Identification 3 */ 82 #define REG_MTB_CID0 (*(RoReg *)0x41006FF0UL) /**< \brief (MTB) Component Identification 0 */ 83 #define REG_MTB_CID1 (*(RoReg *)0x41006FF4UL) /**< \brief (MTB) Component Identification 1 */ 84 #define REG_MTB_CID2 (*(RoReg *)0x41006FF8UL) /**< \brief (MTB) Component Identification 2 */ 85 #define REG_MTB_CID3 (*(RoReg *)0x41006FFCUL) /**< \brief (MTB) Component Identification 3 */ 86 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 87 88 89 #endif /* _SAMR35_MTB_INSTANCE_ */ 90
