1 /** 2 * \file 3 * 4 * \brief Component description for RTT 5 * 6 * Copyright (c) 2019 Microchip Technology Inc. 7 * 8 * \license_start 9 * 10 * \page License 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 * \license_stop 27 * 28 */ 29 30 /* file generated from device description version 2019-01-18T21:21:15Z */ 31 #ifndef _SAMV71_RTT_COMPONENT_H_ 32 #define _SAMV71_RTT_COMPONENT_H_ 33 #define _SAMV71_RTT_COMPONENT_ /**< \deprecated Backward compatibility for ASF */ 34 35 /** \addtogroup SAMV_SAMV71 Real-time Timer 36 * @{ 37 */ 38 /* ========================================================================== */ 39 /** SOFTWARE API DEFINITION FOR RTT */ 40 /* ========================================================================== */ 41 #ifndef COMPONENT_TYPEDEF_STYLE 42 #define COMPONENT_TYPEDEF_STYLE 'R' /**< Defines default style of typedefs for the component header files ('R' = RFO, 'N' = NTO)*/ 43 #endif 44 45 #define RTT_6081 /**< (RTT) Module ID */ 46 #define REV_RTT M /**< (RTT) Module revision */ 47 48 /* -------- RTT_MR : (RTT Offset: 0x00) (R/W 32) Mode Register -------- */ 49 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 50 #if COMPONENT_TYPEDEF_STYLE == 'N' 51 typedef union { 52 struct { 53 uint32_t RTPRES:16; /**< bit: 0..15 Real-time Timer Prescaler Value */ 54 uint32_t ALMIEN:1; /**< bit: 16 Alarm Interrupt Enable */ 55 uint32_t RTTINCIEN:1; /**< bit: 17 Real-time Timer Increment Interrupt Enable */ 56 uint32_t RTTRST:1; /**< bit: 18 Real-time Timer Restart */ 57 uint32_t :1; /**< bit: 19 Reserved */ 58 uint32_t RTTDIS:1; /**< bit: 20 Real-time Timer Disable */ 59 uint32_t :3; /**< bit: 21..23 Reserved */ 60 uint32_t RTC1HZ:1; /**< bit: 24 Real-Time Clock 1Hz Clock Selection */ 61 uint32_t :7; /**< bit: 25..31 Reserved */ 62 } bit; /**< Structure used for bit access */ 63 uint32_t reg; /**< Type used for register access */ 64 } RTT_MR_Type; 65 #endif 66 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 67 68 #define RTT_MR_OFFSET (0x00) /**< (RTT_MR) Mode Register Offset */ 69 70 #define RTT_MR_RTPRES_Pos 0 /**< (RTT_MR) Real-time Timer Prescaler Value Position */ 71 #define RTT_MR_RTPRES_Msk (_U_(0xFFFF) << RTT_MR_RTPRES_Pos) /**< (RTT_MR) Real-time Timer Prescaler Value Mask */ 72 #define RTT_MR_RTPRES(value) (RTT_MR_RTPRES_Msk & ((value) << RTT_MR_RTPRES_Pos)) 73 #define RTT_MR_ALMIEN_Pos 16 /**< (RTT_MR) Alarm Interrupt Enable Position */ 74 #define RTT_MR_ALMIEN_Msk (_U_(0x1) << RTT_MR_ALMIEN_Pos) /**< (RTT_MR) Alarm Interrupt Enable Mask */ 75 #define RTT_MR_ALMIEN RTT_MR_ALMIEN_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_ALMIEN_Msk instead */ 76 #define RTT_MR_RTTINCIEN_Pos 17 /**< (RTT_MR) Real-time Timer Increment Interrupt Enable Position */ 77 #define RTT_MR_RTTINCIEN_Msk (_U_(0x1) << RTT_MR_RTTINCIEN_Pos) /**< (RTT_MR) Real-time Timer Increment Interrupt Enable Mask */ 78 #define RTT_MR_RTTINCIEN RTT_MR_RTTINCIEN_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_RTTINCIEN_Msk instead */ 79 #define RTT_MR_RTTRST_Pos 18 /**< (RTT_MR) Real-time Timer Restart Position */ 80 #define RTT_MR_RTTRST_Msk (_U_(0x1) << RTT_MR_RTTRST_Pos) /**< (RTT_MR) Real-time Timer Restart Mask */ 81 #define RTT_MR_RTTRST RTT_MR_RTTRST_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_RTTRST_Msk instead */ 82 #define RTT_MR_RTTDIS_Pos 20 /**< (RTT_MR) Real-time Timer Disable Position */ 83 #define RTT_MR_RTTDIS_Msk (_U_(0x1) << RTT_MR_RTTDIS_Pos) /**< (RTT_MR) Real-time Timer Disable Mask */ 84 #define RTT_MR_RTTDIS RTT_MR_RTTDIS_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_RTTDIS_Msk instead */ 85 #define RTT_MR_RTC1HZ_Pos 24 /**< (RTT_MR) Real-Time Clock 1Hz Clock Selection Position */ 86 #define RTT_MR_RTC1HZ_Msk (_U_(0x1) << RTT_MR_RTC1HZ_Pos) /**< (RTT_MR) Real-Time Clock 1Hz Clock Selection Mask */ 87 #define RTT_MR_RTC1HZ RTT_MR_RTC1HZ_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_RTC1HZ_Msk instead */ 88 #define RTT_MR_MASK _U_(0x117FFFF) /**< \deprecated (RTT_MR) Register MASK (Use RTT_MR_Msk instead) */ 89 #define RTT_MR_Msk _U_(0x117FFFF) /**< (RTT_MR) Register Mask */ 90 91 92 /* -------- RTT_AR : (RTT Offset: 0x04) (R/W 32) Alarm Register -------- */ 93 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 94 #if COMPONENT_TYPEDEF_STYLE == 'N' 95 typedef union { 96 struct { 97 uint32_t ALMV:32; /**< bit: 0..31 Alarm Value */ 98 } bit; /**< Structure used for bit access */ 99 uint32_t reg; /**< Type used for register access */ 100 } RTT_AR_Type; 101 #endif 102 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 103 104 #define RTT_AR_OFFSET (0x04) /**< (RTT_AR) Alarm Register Offset */ 105 106 #define RTT_AR_ALMV_Pos 0 /**< (RTT_AR) Alarm Value Position */ 107 #define RTT_AR_ALMV_Msk (_U_(0xFFFFFFFF) << RTT_AR_ALMV_Pos) /**< (RTT_AR) Alarm Value Mask */ 108 #define RTT_AR_ALMV(value) (RTT_AR_ALMV_Msk & ((value) << RTT_AR_ALMV_Pos)) 109 #define RTT_AR_MASK _U_(0xFFFFFFFF) /**< \deprecated (RTT_AR) Register MASK (Use RTT_AR_Msk instead) */ 110 #define RTT_AR_Msk _U_(0xFFFFFFFF) /**< (RTT_AR) Register Mask */ 111 112 113 /* -------- RTT_VR : (RTT Offset: 0x08) (R/ 32) Value Register -------- */ 114 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 115 #if COMPONENT_TYPEDEF_STYLE == 'N' 116 typedef union { 117 struct { 118 uint32_t CRTV:32; /**< bit: 0..31 Current Real-time Value */ 119 } bit; /**< Structure used for bit access */ 120 uint32_t reg; /**< Type used for register access */ 121 } RTT_VR_Type; 122 #endif 123 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 124 125 #define RTT_VR_OFFSET (0x08) /**< (RTT_VR) Value Register Offset */ 126 127 #define RTT_VR_CRTV_Pos 0 /**< (RTT_VR) Current Real-time Value Position */ 128 #define RTT_VR_CRTV_Msk (_U_(0xFFFFFFFF) << RTT_VR_CRTV_Pos) /**< (RTT_VR) Current Real-time Value Mask */ 129 #define RTT_VR_CRTV(value) (RTT_VR_CRTV_Msk & ((value) << RTT_VR_CRTV_Pos)) 130 #define RTT_VR_MASK _U_(0xFFFFFFFF) /**< \deprecated (RTT_VR) Register MASK (Use RTT_VR_Msk instead) */ 131 #define RTT_VR_Msk _U_(0xFFFFFFFF) /**< (RTT_VR) Register Mask */ 132 133 134 /* -------- RTT_SR : (RTT Offset: 0x0c) (R/ 32) Status Register -------- */ 135 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 136 #if COMPONENT_TYPEDEF_STYLE == 'N' 137 typedef union { 138 struct { 139 uint32_t ALMS:1; /**< bit: 0 Real-time Alarm Status (cleared on read) */ 140 uint32_t RTTINC:1; /**< bit: 1 Prescaler Roll-over Status (cleared on read) */ 141 uint32_t :30; /**< bit: 2..31 Reserved */ 142 } bit; /**< Structure used for bit access */ 143 uint32_t reg; /**< Type used for register access */ 144 } RTT_SR_Type; 145 #endif 146 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 147 148 #define RTT_SR_OFFSET (0x0C) /**< (RTT_SR) Status Register Offset */ 149 150 #define RTT_SR_ALMS_Pos 0 /**< (RTT_SR) Real-time Alarm Status (cleared on read) Position */ 151 #define RTT_SR_ALMS_Msk (_U_(0x1) << RTT_SR_ALMS_Pos) /**< (RTT_SR) Real-time Alarm Status (cleared on read) Mask */ 152 #define RTT_SR_ALMS RTT_SR_ALMS_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_SR_ALMS_Msk instead */ 153 #define RTT_SR_RTTINC_Pos 1 /**< (RTT_SR) Prescaler Roll-over Status (cleared on read) Position */ 154 #define RTT_SR_RTTINC_Msk (_U_(0x1) << RTT_SR_RTTINC_Pos) /**< (RTT_SR) Prescaler Roll-over Status (cleared on read) Mask */ 155 #define RTT_SR_RTTINC RTT_SR_RTTINC_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_SR_RTTINC_Msk instead */ 156 #define RTT_SR_MASK _U_(0x03) /**< \deprecated (RTT_SR) Register MASK (Use RTT_SR_Msk instead) */ 157 #define RTT_SR_Msk _U_(0x03) /**< (RTT_SR) Register Mask */ 158 159 160 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 161 #if COMPONENT_TYPEDEF_STYLE == 'R' 162 /** \brief RTT hardware registers */ 163 typedef struct { 164 __IO uint32_t RTT_MR; /**< (RTT Offset: 0x00) Mode Register */ 165 __IO uint32_t RTT_AR; /**< (RTT Offset: 0x04) Alarm Register */ 166 __I uint32_t RTT_VR; /**< (RTT Offset: 0x08) Value Register */ 167 __I uint32_t RTT_SR; /**< (RTT Offset: 0x0C) Status Register */ 168 } Rtt; 169 170 #elif COMPONENT_TYPEDEF_STYLE == 'N' 171 /** \brief RTT hardware registers */ 172 typedef struct { 173 __IO RTT_MR_Type RTT_MR; /**< Offset: 0x00 (R/W 32) Mode Register */ 174 __IO RTT_AR_Type RTT_AR; /**< Offset: 0x04 (R/W 32) Alarm Register */ 175 __I RTT_VR_Type RTT_VR; /**< Offset: 0x08 (R/ 32) Value Register */ 176 __I RTT_SR_Type RTT_SR; /**< Offset: 0x0C (R/ 32) Status Register */ 177 } Rtt; 178 179 #else /* COMPONENT_TYPEDEF_STYLE */ 180 #error Unknown component typedef style 181 #endif /* COMPONENT_TYPEDEF_STYLE */ 182 183 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 184 /** @} end of Real-time Timer */ 185 186 #endif /* _SAMV71_RTT_COMPONENT_H_ */ 187
