1 /** 2 * \file 3 * 4 * \brief Instance description for SUPC 5 * 6 * Copyright (c) 2019 Microchip Technology Inc. 7 * 8 * \license_start 9 * 10 * \page License 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 * \license_stop 27 * 28 */ 29 30 /* file generated from device description version 2017-01-08T14:00:00Z */ 31 #ifndef _SAMV71_SUPC_INSTANCE_H_ 32 #define _SAMV71_SUPC_INSTANCE_H_ 33 34 /* ========== Register definition for SUPC peripheral ========== */ 35 #if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 36 37 #define REG_SUPC_CR (0x400E1810) /**< (SUPC) Supply Controller Control Register */ 38 #define REG_SUPC_SMMR (0x400E1814) /**< (SUPC) Supply Controller Supply Monitor Mode Register */ 39 #define REG_SUPC_MR (0x400E1818) /**< (SUPC) Supply Controller Mode Register */ 40 #define REG_SUPC_WUMR (0x400E181C) /**< (SUPC) Supply Controller Wakeup Mode Register */ 41 #define REG_SUPC_WUIR (0x400E1820) /**< (SUPC) Supply Controller Wakeup Inputs Register */ 42 #define REG_SUPC_SR (0x400E1824) /**< (SUPC) Supply Controller Status Register */ 43 #define REG_SUPC_SYSC_VERSION (0x400E190C) /**< (SUPC) Version Register */ 44 45 #else 46 47 #define REG_SUPC_CR (*(__O uint32_t*)0x400E1810U) /**< (SUPC) Supply Controller Control Register */ 48 #define REG_SUPC_SMMR (*(__IO uint32_t*)0x400E1814U) /**< (SUPC) Supply Controller Supply Monitor Mode Register */ 49 #define REG_SUPC_MR (*(__IO uint32_t*)0x400E1818U) /**< (SUPC) Supply Controller Mode Register */ 50 #define REG_SUPC_WUMR (*(__IO uint32_t*)0x400E181CU) /**< (SUPC) Supply Controller Wakeup Mode Register */ 51 #define REG_SUPC_WUIR (*(__IO uint32_t*)0x400E1820U) /**< (SUPC) Supply Controller Wakeup Inputs Register */ 52 #define REG_SUPC_SR (*(__I uint32_t*)0x400E1824U) /**< (SUPC) Supply Controller Status Register */ 53 #define REG_SUPC_SYSC_VERSION (*(__I uint32_t*)0x400E190CU) /**< (SUPC) Version Register */ 54 55 #endif /* (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 56 57 /* ========== Instance Parameter definitions for SUPC peripheral ========== */ 58 #define SUPC_INSTANCE_ID 0 59 60 #endif /* _SAMV71_SUPC_INSTANCE_ */ 61
